zephyr/dts/xtensa
Jaroslaw Stelter 9c0dd7e3be intel_adsp: ace20_lnl: Change LNL core count to 5
The ACE 2.0 LNL platform has 5 HIFI4 cores. Change number
of cores to enable 5th core on the platform.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-05-15 08:00:11 -04:00
..
espressif drivers: dma: esp32s3: Add DMA support for esp32s3 2023-05-10 10:15:05 +02:00
intel intel_adsp: ace20_lnl: Change LNL core count to 5 2023-05-15 08:00:11 -04:00
nxp boards: xtensa: nxp_adsp_imx8m: Add UART support for the ADSP from i.MX8MP 2023-05-08 13:06:12 -05:00
sample_controller.dtsi dts: Add information about CPU frequency to the cpu nodes 2019-07-17 21:53:36 +02:00
xtensa.dtsi dts: Restructure xtensa dts directory 2019-06-27 07:21:11 -04:00