Tim Lin 94ae33c20a ITE: soc/riscv/ite: policy: Add minimum residency time to enter sleep ... Adding this condition will limit the minimum residency time to enter sleep mode. This will fix tests in test\kernel\sleep\usleep.c causing longer than expected test times due to going into sleep mode with no time limit. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>		2023-03-16 09:16:34 +01:00
..
esp32c3	soc: esp32c3: fix soc architecture definition	2023-02-28 12:47:56 +01:00
litex-vexriscv	riscv: Introduce Zicsr and Zifencei extensions	2022-08-29 16:57:18 +02:00
openisa_rv32m1	arch: riscv enable flash config	2023-02-28 10:29:03 +01:00
riscv-ite	ITE: soc/riscv/ite: policy: Add minimum residency time to enter sleep	2023-03-16 09:16:34 +01:00
riscv-privilege	arch: riscv enable flash config	2023-02-28 10:29:03 +01:00
CMakeLists.txt	riscv32: rename to riscv	2019-08-02 13:54:48 -07:00