e4024e274b
Remove from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
21 lines
480 B
Plaintext
21 lines
480 B
Plaintext
/*
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* Copyright (c) 2019 Nordic Semiconductor ASA
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* Copyright (c) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Copied from linker.ld */
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/* Non-cached region of RAM */
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SECTION_PROLOGUE(_NOCACHE_SECTION_NAME,(NOLOAD),)
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{
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MPU_ALIGN(_nocache_ram_size);
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_nocache_ram_start = .;
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*(.nocache)
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*(".nocache.*")
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MPU_ALIGN(_nocache_ram_size);
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_nocache_ram_end = .;
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} GROUP_LINK_IN(RAMABLE_REGION)
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_nocache_ram_size = _nocache_ram_end - _nocache_ram_start;
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