Commit graph

193 commits

Author SHA1 Message Date
Torsten Rasmussen b2de93cff6 cmake: arc: update arc SoC to use SOC_LINKER_SCRIPT variable
This commit updates all arc SoCs to set SOC_LINKER_SCRIPT CMake
variable to point to active linker script directly.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2023-11-03 11:01:23 +01:00
Daniel Leung 9f9b4a8afa uart: ns16550: use io-mapped DT property for IO port access
The old CONFIG_UART_NS16550_ACCESS_IOPORT has been used to
indicate whether to access the NS16550 UART via IO port
before device tree is used to describe hardware. Now we have
device tree, and we can specify whether a particular UART
needs to be accessed via IO port using property io-mapped.
Therefore, CONFIG_UART_NS16550_ACCESS_IOPORT is no longer
needed (and thus also CONFIG_UART_NS16550_SIMULT_ACCESS).
Remove these two kconfigs and modify code to use device tree
to figure out how to access the UART hardware.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Evgeniy Paltsev 45e3cfc220 ARC: add scalar VPX port
Add add scalar ARC VPX port and nSIM-based VPX5 platform
(close to vpx5_integer_full template)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2023-08-11 19:45:48 +00:00
Nikolay Agishev a983abe426 ARC: Turn off stack checking for hsdk4xd
Turn off unsupported configuration for hsdk4xd

Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
2023-07-10 09:29:43 +02:00
Siyuan Cheng 4babd545cc drivers: pinctrl: add pinctrl driver for ARC emsdp
Add Synopsys ARC EMSDP board Pin controller for its Pmod
and Arduino shield interface.

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
2023-05-29 09:21:07 -04:00
Nikolay Agishev 0d8292ab6b ARC: Add HS4x support
Minimal HSDK4xD support

Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
2023-05-02 16:54:24 +02:00
Gerard Marull-Paretas a5fd0d184a init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by:

- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices

They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:

```c
struct init_entry {
	int (*init)(const struct device *dev);
	/* only set by DEVICE_*, otherwise NULL */
	const struct device *dev;
}
```

As a result, we end up with such weird/ugly pattern:

```c
static int my_init(const struct device *dev)
{
	/* always NULL! add ARG_UNUSED to avoid compiler warning */
	ARG_UNUSED(dev);
	...
}
```

This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:

```c
static int my_init(void)
{
	...
}
```

This is achieved using a union:

```c
union init_function {
	/* for SYS_INIT, used when init_entry.dev == NULL */
	int (*sys)(void);
	/* for DEVICE*, used when init_entry.dev != NULL */
	int (*dev)(const struct device *dev);
};

struct init_entry {
	/* stores init function (either for SYS_INIT or DEVICE*)
	union init_function init_fn;
	/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
	 * to know which union entry to call.
	 */
	const struct device *dev;
}
```

This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.

**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

init: convert SYS_INIT functions to the new signature

Conversion scripted using scripts/utils/migrate_sys_init.py.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

manifest: update projects for SYS_INIT changes

Update modules with updated SYS_INIT calls:

- hal_ti
- lvgl
- sof
- TraceRecorderSource

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: devicetree: devices: adjust test

Adjust test according to the recently introduced SYS_INIT
infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: kernel: threads: adjust SYS_INIT call

Adjust to the new signature: int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-12 14:28:07 +00:00
Nikolay Agishev 14ec9e9dcb ARC: Add MWDT support into qemu_arc_hs platform
Add Metaware toolchain into qemu_arc_hs* platforms

Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
2023-03-20 11:43:37 +01:00
Siyuan Cheng f9d155b7d5 dts: boards :emsdp: add SPI support
There is a spi-flash fl256s on emsdp board, which can be
contolled by DesignWare SPI driver. Now add DW SPI and
SPI-FLASH support for emsdp board.

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
2023-03-10 11:39:24 +01:00
Siyuan Cheng b475e1fcbf zdsp: add ARC DSPLIB backend for zdsp
Introduce ARC DSPLIB backend zdsp library for ARC target.
Add agu and restrict attributes to map with ARC DSPLIB

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
2023-02-21 15:06:06 +01:00
Evgeniy Paltsev f796fd34d8 boards: ARC: nsim: align compiler options for GCC & MWDT
Align MWDT compiler options to GCC ones for ARCv2 hsim hs3x boards.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2023-01-20 12:23:03 +01:00
Siyuan Cheng a147a26a2b arc: add nsim_em11d target
add nsim_em11d target specific for DSP feature

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
2022-12-19 11:56:55 +01:00
Siyuan Cheng 9a7ed58b25 arc: add XY mem support
The XY Memory is a feature commonly found in DSP processors to increase
the DSP performance. The XY component allows a ARC processor to
implicitly load source operands and store results into a closely coupled
memory using a single instruction.

Add XY memory for ARC EM9D/EM11D processors including em_starterkit,
em_starterkit_em11d. emsdp_em9d, nsim_em, iotdk.

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
2022-12-12 14:38:13 +00:00
Evgeniy Paltsev d2488d2160 ARC: control shared (common) interrupts via IDU
Control shared interrupts enabling/disabling via IDU.
With that we can easily enable and disable them for all cores
in one place.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-11-28 17:44:54 +01:00
Nikolay Agishev 6e215ce6af boards: nsim_hs: Add separate config for XIP memory organization
Add XIP support with MWDT toolchain. To have it proper tested
add separate nsim platforms for XIP (flash + sram) and
non-XIP (sram) memory organization in addition to existing
nsim_hs platfor with CCMs (ICCM + DCCM) memory organization.

This PR also enables MPU for all nsim hs3x based platforms
(like we previously enabled it for qemu_arc_hs) to have proper
memory regions permissions.

Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
2022-11-16 11:18:51 +01:00
Kumar Gala 6393a7ce5c smp: Kconfig: Move to using MP_MAX_NUM_CPUS
Continue to phase out MP_NUM_CPUS, change Kconfig to be
MP_MAX_NUM_CPUS and make MP_MAX_NUM_CPUS the main Kconfig symbol.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-20 22:04:10 +09:00
Gerard Marull-Paretas 343e900799 soc: arc: add missing aux_regs.h include
It is required for z_arc_v2_core_id()  or register read/write functions.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas 34a6848887 include: add missing arch/cpu.h include
The sys* ops like sys_clear_bit are indirectly included via arch CPU
header. Other stuff like find_msb_set end up included via this header as
well.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Nikolay Agishev a56777263e compiler: gcc: add support for tuning mcpu option for ARC targets
ARC processors are highly configurable, so ARC toolchain supports
big amount of mcpu options for all that HW configurations.
As difference in many configurations among the same processor
family usually doesn't affect Zephyr code we don't want
to create Kconfig option for each possible CPU configuration
(just to map Kconfig option to correspondent mcpu value
in 'cmake/gcc-m-cpu.cmake').
Instead we prefer being able to set proper mcpu value
individually for any ARC SoC and using 'cmake/gcc-m-cpu.cmake'
just for reasonable defaults.

To apply SoC-related changes for build-options on early stages of building
'tune_build_ops.cmake' should be created in appropriate SoC directory.
Example:
 ./soc/arc/snps_qemu/tune_build_ops.cmake
File content:
 set(GCC_ARC_TUNED_CPU hs4xd)

Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
2022-09-08 10:39:21 +02:00
Evgeniy Paltsev ee5b158e3a ARC: boards: QEMU: hs6x: minor description polish
Non-functional polish of Kconfig symbol description and
QEMU_CPU_TYPE_${ARCH} variable (used only for verbose cmake comments)
for HS6x QEMU.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-08-22 10:23:14 +00:00
Evgeniy Paltsev 2adfe5ce65 ARC: boards: ARCv3: add qemu_arc_hs5x board
Add qemu_arc_hs5x - single core ARCv3 32bit HS5x CPU.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-08-22 10:23:14 +00:00
Evgeniy Paltsev 9b6bc41692 ARC: boards: nsim: don't set ARC_HAS_ACCL_REGS to it's default
Don't setup CONFIG_ARC_HAS_ACCL_REGS option for board explicitly
if we use it default value.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-08-19 12:09:37 +02:00
Gerard Marull-Paretas 83d73f6126 soc: arc: remove unused <soc.h> files
The ARC <soc.h> headers are no longer used, so they can be removed.
Refer to the previous commits for more context.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas 1b142a5c55 soc: arc: snps_emsk: fix include list
Include only what is needed in soc_config.c

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas ac3697fe74 soc: arc: snps_emsk: remove empty soc.c
soc.c was empty, so just delete it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas 2bee9b3fbb soc: arc: snps_nsim: fix include list
Include only what is needed.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas dffbef0aff soc: arc: snps_nsim: s/soc.c/smp.c and compile only if CONFIG_SMP=y
The soc.c source only contains code relevant to SMP, and in fact, it is
a file that is left empty when pre-processed from a compiler perspective
if CONFIG_SMP=n. This change renames it to smp.c to make it clear it
contains SMP related code, and, it compiles it conditionally to
CONFIG_SMP=y.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas b2a1eeb6ac soc: arc: define ICI in DT
ICI (Inter-Core Interrupt Unit) interrupts and priorities were hardcoded
in C files. This patch moves this information to Devicetree and updates
code to make use of it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas 60d3e487a3 soc: arc: snps_emsk/nsim: remove unused definitions
Remove definitions not used in any C unit throughout the tree.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas 754c022fa2 soc: arc: snps_arc_iot: define sysconf in DT
sysconf base address was hardcoded in <soc.h>. Create a new compatible
and define it in Devicetree, where hardware needs to be described.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas 36ac01780e soc: arc: snps_arc_iot: delete unused soc_irq.h file
The definitions provided by this file seem to be unused throughout the
tree, so remove it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas ef502746c9 soc: arc: snps_emsdp/k: remove unused SYSCLK_DEFAULT_IOSC_HZ
The definition is not used, so remove it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas 80457bdc84 soc: arc: snps_arc_iot: move SYSCLK_DEFAULT_IOSC_HZ to sysconf
sysconf source file is the only user of such definition, so move it
there.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas 5f40a9f40f soc: arc: synopsys: move secure timer0 definition to DT
Use Devicetree to describe secure timer0 instead of hardcoding values in
<soc.h>.

DT files have been structured to match the following requirements: In
case of sectimer0 - it's should be only enabled for:

- emsdp_em7d_esp.dts
- em_starterkit_em7d.dts
- nsim_sem_mpu_stack_guard.dts
- nsim_sem.dts

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas 44250fe3d3 soc: arch: synopsys: move timer0/1 IRQ information to DT
timer0/1 IRQ information was hardcoded in soc.h, however, Devicetree is
nowadays a better place to describe hardware. Note that I have followed
existing upstream Linux code to do these changes.

Ref.
- https://elixir.bootlin.com/linux/latest/source/arch/arc/boot/dts/
  hsdk.dts
- https://elixir.bootlin.com/linux/latest/source/Documentation/
  devicetree/bindings/timer/snps,arc-timer.txt

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas 3f12689f4e soc: arc: snps_arch_hdsk: fix include list
Include what is necessary: <zephyr/init.h> and a platform specific
architecture header.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas 82ce3e566d soc: arc: snps_arch_hdsk: remove unused pinmux definitions
Pinmux definitions were not used, so remove them.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Kumar Gala 84575930f5 i2c: Remove unncessary HAS_I2C_DW Kconfig symbol
The HAS_I2C_DW was to limit Kconfig visibility to only platforms
that utilize the I2C DW IP.  The Kconfig for I2C_DW depends on
DT_HAS_SNPS_DESIGNWARE_I2C_ENABLED which will cause the same
visbility limitation to only platforms that have I2C DW devicetree
nodes.  Thus we can remove HAS_I2C_DW and its references.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-01 18:01:44 +02:00
Kumar Gala 9a501e0922 serial: remove Kconfig.defconfig setting of serial drivers
Now that serial drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Typically the Kconfig.defconfig* will blindly enable a
sensor and not respect the devicetree state of the serial.
Additionally we can get problems with prj.conf/defconfig
getting incorrectly overridden.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-26 09:29:24 -05:00
Anas Nashif 782b083686 soc: add mising braces to single line if statements
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-06 11:00:45 -04:00
Gerard Marull-Paretas 416dd6cd36 soc: arch: snps_arc_iot: select UART_NS16550_ACCESS_IOPORT
NS16550 driver no longer relies on definitions found in <soc.h>, SoC can
select UART_NS16550_ACCESS_IOPORT instead.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-16 11:28:13 +02:00
Gerard Marull-Paretas e928300f90 soc: remove unused UART_DEFAULT_REG_INTERVAL definitions
Information is now provided in Devicetree by each ns16550 instance.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-15 16:59:02 -05:00
Evgeniy Paltsev bb6c89bef8 ARC: boards: allow MWDT toolchain for nsim_hs6x and nsim_hs6x_smp
Allow MWDT toolchain and add corresponding compiler options
for nsim_hs6x and nsim_hs6x_smp.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Evgeniy Paltsev d5038c49ba ARC: boards: add nsim_hs5x and nsim_hs5x_smp boards
Add nSIM-based (simulator) boards with
 * nsim_hs5x - single core ARCv3 HS5x 32 bit CPU
 * nsim_hs5x_smp - SMP, two core ARCv3 HS5x 32 bit CPU

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Gerard Marull-Paretas d342e4c4c1 linker: update files with <zephyr/...> include prefix
Linker files were not migrated with the new <zephyr/...> prefix.  Note
that the conversion has been scripted, refer to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Gerard Marull-Paretas 741e838a62 soc: arc: snps_nsim: delete C file with no code
soc_config.c for snps_nsim had no actual code, just a bunch of includes.
Deleting as it has no value (and triggered a compliance warning because
file had no newline at EOF).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:59 +02:00
Gerard Marull-Paretas 0e69129fb3 soc: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all soc code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:59 +02:00
Evgeniy Paltsev 38c24cd5aa ARC: boards: nSIM: memory layout overhaul
Currently we use incorrect memory layout for SMP boards as
we put data (which need do be accessible from all cores) to
DCCM which is private for each CPU core.

This works for nSIM which doesn't simulate CCMs (as we don't pass
corresponding nSIM options for SMP configurations) however
it won't work if we run that code on real HW (we want to achieve
that nSIM configurations are also runnable on HAPS - FPGA platform).

Let's fix that issue by using DDR instead of CCMs for SMP
configurations (nsim_hs_smp and nsim_hs6x_smp).

While I'm at it - switch UP HS6x configuration (nsim_hs6x)
for DDR usage instead of CCMs - to make that configuration closer
to the HAPS config we have.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-05-06 11:31:21 +02:00
Gerard Marull-Paretas c925b5991a include: remove unnecessary autoconf.h includes
The autoconf.h header is not required because the definitions present in
the file are exposed using the compiler `-imacros` flag.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-05 11:18:20 +02:00
Alexey Brodkin 35f53b8456 ARC: QEMU: Add the second UART support
This makes the second UART of ARC QEMU's "virt" platfrom available
in Zephyr. But please note to get it used corresponding change needs
to be applied to QEMU itself, see:
https://github.com/foss-for-synopsys-dwc-arc-processors/qemu/pull/62

PR for Zephyr's SDK-NG is posted here:
https://github.com/zephyrproject-rtos/sdk-ng/pull/422

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2022-03-24 08:27:40 -04:00