"RW pinctrl" is clearly SOC specific naming for an IP
that is not necessarily constrained to live on one SOC series.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
There were missing global dppic and ipct channels configuration
that allows to deliver events from global peripherlas like GRTC
to Radio domain.
Add missing configuration to nrf54h20 dtsi file.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
The GRTC channels and irqs configuration for Radio domain
is SOC specific not board specific. Move the configuration
to SOC dtsi file.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
The child-owned-channels property of GRTC is used by nrfx_grtc
driver to exclude channels for common pool of channels allowed
for dynamic allocation. That is sort-of workaround for missing
property that allowes to remove some channels from the pool.
There are also not aligned GRTC IRQs for nRF54H20 and nRF54L15.
Only one of avaialbe IRQs was added to GRTC in DTS whereas
there should be two. That allows to find second IRQ by other
drivers that use GRTC peripehral.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
Split up the driver for the PWM controller MAX31790
into a multi function device driver.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Remove the Audio Link Hub (ALH) nodes from the ACE 2.0 LNL DTS file.
This patch cleans up the Device Tree Source by removing the individual
ALH stream/FIFO nodes. The ALH hardware is not present in the ACE 2.0
architecture, and these nodes are therefore not applicable.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch reorders the power domain definitions for the Intel ADSP ACE
2.0 LNL (Lunarlake) platform in the Device Tree Source (DTS).
Changes include:
- Removing the definitions for io2_domain, io3_domain, and ml1_domain,
which are no longer present in the ACE 2.0 LNL configuration.
- Renaming and reassigning bit positions to existing power domains to
reflect the updated power management architecture.
The reordering ensures that the DTS reflects the current power domain
architecture of the ACE 2.0 LNL platform, facilitating accurate power
management within the SoC.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Changing the power domain from 'hst_domain' to 'io0_domain' for the HDA
DMA link in/out nodes. This aligns the power domain assignments with the
actual hardware configuration and ensures that the power management
subsystem can accurately manage the power states of these interfaces.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch reorders the power domain node definitions in the ACE 1.5
Meteorlake DTS file to improve readability and facilitate comparison with
the documentation.
Changes include:
- Reordering power domain nodes by their bit positions.
- No changes to the bit positions themselves; they remain as originally
defined.
This reordering does not affect the functionality but makes the DTS file
more maintainable and easier to cross-reference with the hardware
specification.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Some SAI instances are mutliline, meaning they can have multiple
TX/RX data lines (channels). Depending on the board, the index
of the TX/RX data lines that are connected to the consumer
(e.g: the codec) may not always be 0. This commit fixes this
issue by adding support for passing the index of the used
TX/RX data lines through the DTS.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add definition of the nRF54H20 SoC with its Application, Radio,
and Peripheral Processor (PPR) cores and an initial set of
peripherals.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove all optional, initial CAN sample point properties and rely on the
CAN timing calculations to automatically pick the preferred sample point
location based on the initial bitrate.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Make the properties for setting the initial sample points for both the
classic/arbitration phase and the data phase optional.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Implement a sensor for the output diagnostics of the low side
switch BD8LB600FS.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Split up the driver for the low side switch BD8LB600FS into a GPIO
and MFD part.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>