Commit graph

6146 commits

Author SHA1 Message Date
Declan Snyder b7e301ed26 dts: bindings: Add nxp,rw-soc-ctrl binding
Add binding for the already existing rw soc ctrl node,
to mark reg property as required.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-22 08:56:10 +01:00
Declan Snyder ad393fbbfa dts: Rename RW pinctrl to MCI IO MUX
"RW pinctrl" is clearly SOC specific naming for an IP
that is not necessarily constrained to live on one SOC series.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-22 08:56:10 +01:00
Jamie McCrae e5c40ced37 dts: bindings: vendor-prefixes: Add additional vendor prefixes
Adds additional vendor prefixes which have been used for boards

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-22 00:56:51 +01:00
Declan Snyder 38117c6cbd dts: nxp: rw: Add DMA channels to flexcomm nodes
Add dma channel descriptions to the flexcomm nodes on RW SOC.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-21 16:15:59 +01:00
Piotr Pryga 3140b9585b dts: nrf54h20: Add missing global dppic and ipcst configs
There were missing global dppic and ipct channels configuration
that allows to deliver events from global peripherlas like GRTC
to Radio domain.

Add missing configuration to nrf54h20 dtsi file.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2024-03-21 15:24:06 +01:00
Piotr Pryga e0a23663f6 dts: nrf54h20: move GRTC channels allocation to the SOC dtsi
The GRTC channels and irqs configuration for Radio domain
is SOC specific not board specific. Move the configuration
to SOC dtsi file.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2024-03-21 15:24:06 +01:00
Piotr Pryga 6608ff810b boards: nordic: Add to GRTC missing child-owned-channels allocation
The child-owned-channels property of GRTC is used by nrfx_grtc
driver to exclude channels for common pool of channels allowed
for dynamic allocation. That is sort-of workaround for missing
property that allowes to remove some channels from the pool.

There are also not aligned GRTC IRQs for nRF54H20 and nRF54L15.
Only one of avaialbe IRQs was added to GRTC in DTS whereas
there should be two. That allows to find second IRQ by other
drivers that use GRTC peripehral.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2024-03-21 09:15:27 +01:00
Declan Snyder a65ae89b9e soc: nxp: rw: Support MRT counter
Add DT entries and peripheral reset for MRT on RW.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-21 09:06:48 +01:00
Declan Snyder 241d41596b soc: nxp: rw: Support CTIMER
Add DT entries and clocking for CTIMER peripherals on RW61x.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-21 09:06:48 +01:00
Declan Snyder 2cb4550dc7 soc: rw: Support WWDT
Add DT entry and SOC code for watchdog

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-20 16:19:12 +00:00
Laurentiu Mihalcea 64ba1b2210 dts: nxp: imx93: add nodes for SAI3 and EDMA4
Add DTS nodes for 93's SAI3 and EDMA4.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-03-20 15:42:55 +01:00
Sylvio Alves e48fe49a70 soc: esp32s3: appcpu: add sram dts information
Make sure SoC has defined RAM size.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-20 07:55:09 -05:00
Mateusz Michalek e0b748a6ce dts: arm: nordic: nrf54l15 write block size
write-block-size correction.

Signed-off-by: Mateusz Michalek <mateusz.michalek@nordicsemi.no>
2024-03-20 07:53:03 -05:00
Benedikt Schmidt 04f38ffba2 drivers: sensor: add sensors for MAX31790
Add sensors for fan speed and fan fault for the PWM
controller MAX31790.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-03-20 07:38:18 -05:00
Benedikt Schmidt 961c985ee4 drivers: pwm: split up driver for MAX31790 into a MFD
Split up the driver for the PWM controller MAX31790
into a multi function device driver.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-03-20 07:38:18 -05:00
Fabio Baltieri 2c5b992209 input: pmw3610: add few config options
Add config options for resolution, force awake and smart mode.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-20 09:02:50 +01:00
Declan Snyder 42ff35dc05 dts: rw6xx: Add TRNG Entry
Add DT entry for TRNG on RW6XX

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-20 08:56:19 +01:00
Tomasz Leman 81658e67e7 dts: xtensa: intel_adsp: Remove ALH nodes from ACE 2.0 LNL DTS
Remove the Audio Link Hub (ALH) nodes from the ACE 2.0 LNL DTS file.

This patch cleans up the Device Tree Source by removing the individual
ALH stream/FIFO nodes. The ALH hardware is not present in the ACE 2.0
architecture, and these nodes are therefore not applicable.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2024-03-19 14:54:29 +01:00
Tomasz Leman a39a61015c dts: xtensa: intel: Reorder LNL power domains
This patch reorders the power domain definitions for the Intel ADSP ACE
2.0 LNL (Lunarlake) platform in the Device Tree Source (DTS).

Changes include:
- Removing the definitions for io2_domain, io3_domain, and ml1_domain,
  which are no longer present in the ACE 2.0 LNL configuration.
- Renaming and reassigning bit positions to existing power domains to
  reflect the updated power management architecture.

The reordering ensures that the DTS reflects the current power domain
architecture of the ACE 2.0 LNL platform, facilitating accurate power
management within the SoC.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2024-03-19 14:54:29 +01:00
Tomasz Leman 64a81ffb23 dts: xtensa: intel_adsp: ace15: Update power domain for hda link nodes
Changing the power domain from 'hst_domain' to 'io0_domain' for the HDA
DMA link in/out nodes. This aligns the power domain assignments with the
actual hardware configuration and ensures that the power management
subsystem can accurately manage the power states of these interfaces.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2024-03-19 14:54:29 +01:00
Tomasz Leman ff2dd7f25a dts: xtensa: intel: Reorder ACE 1.5 power domain nodes
This patch reorders the power domain node definitions in the ACE 1.5
Meteorlake DTS file to improve readability and facilitate comparison with
the documentation.

Changes include:
- Reordering power domain nodes by their bit positions.
- No changes to the bit positions themselves; they remain as originally
  defined.

This reordering does not affect the functionality but makes the DTS file
more maintainable and easier to cross-reference with the hardware
specification.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2024-03-19 14:54:29 +01:00
Laurentiu Mihalcea 0ff402657b nxp: sai: add support for passing TX/RX data line through DTS
Some SAI instances are mutliline, meaning they can have multiple
TX/RX data lines (channels). Depending on the board, the index
of the TX/RX data lines that are connected to the consumer
(e.g: the codec) may not always be 0. This commit fixes this
issue by adding support for passing the index of the used
TX/RX data lines through the DTS.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-03-19 14:30:32 +01:00
Declan Snyder ab7580046a soc: rw: Support I2C Flexcomms
Support I2C flexcomms by clocking in soc.c and adding DT header

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-19 09:47:35 +01:00
Andrzej Głąbek a8bb9fd1c1 dts: Remove support for nRF54H20 EngA
This was a preview revision of the SoC that will no longer
be supported.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2024-03-18 19:11:36 +00:00
Andrzej Głąbek 029081a3f7 dts: nordic: Add initial support for nRF54H20
Add definition of the nRF54H20 SoC with its Application, Radio,
and Peripheral Processor (PPR) cores and an initial set of
peripherals.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2024-03-18 19:11:36 +00:00
Daniel DeGrasse 3bc1524f5d dts: arm: nxp: rw6xx: add dma0 definition
Add DMA0 definition for RW61x SOC

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-18 18:57:03 +01:00
Henrik Brix Andersen 41960ab366 dts: bindings: can: remove optional sample point properties
Remove all optional, initial CAN sample point properties and rely on the
CAN timing calculations to automatically pick the preferred sample point
location based on the initial bitrate.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-03-17 15:36:19 +01:00
Henrik Brix Andersen 4c06e5abba dts: bindings: can: make initial sample point properties optional
Make the properties for setting the initial sample points for both the
classic/arbitration phase and the data phase optional.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-03-17 15:36:19 +01:00
Steven Chang b27fac08de dts: i2c: kb1200 i2c device nodes
Add i2c device nodes and pinctrl nodes for ENE KB1200

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang 9cf861d6b5 dts: binding: i2c: Add kb1200 i2c
A new i2c controller addition

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang 4fe1a85658 dts: watchdog: kb1200 watchdog device nodes
Add watchdog device nodes and pinctrl nodes for ENE KB1200

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang c1bec14de0 dts: binding: watchdog: Add kb1200 watchdog
A new watchdog controller addition

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang d0bfe81ce9 dts: tach: kb1200 tach device nodes
Add tach device nodes and pinctrl nodes for ENE KB1200

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang 1b4921623d dts: binding: tach: Add kb1200 tach
A new tach controller addition

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang 14c6468bdd dts: pwm: kb1200 pwm device nodes
Add pwm device nodes and pinctrl nodes for ENE KB1200

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang 340d49e360 dts: binding: pwm: Add kb1200 pwm
A new pwm controller addition

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang 4d45103589 dts: adc: kb1200 adc device nodes
Add adc device nodes and pinctrl nodes for ENE KB1200

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang 1d08664451 dts: binding: adc: Add kb1200 adc
A new adc controller addition

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang 543d550c54 dts: uart: kb1200 uart device nodes
Add uart device nodes and pinctrl nodes for ENE KB1200

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang f66e8afe7c dts: gpio: kb1200 gpio device nodes
Add GPIO device nodes for ENE KB1200

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang 05276b63e8 dts: pinctrl: kb1200 pinctrl dtsi
Add pinctrl dtsi for ENE KB1200

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang 9897761aa5 dts: kb1200 dtsi
Add dtsi for ENE KB1200

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang 5b4c782bdf dts: binding: misc: Add kb1200 pmu
A new power manager addition

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang a3ac4af848 dts: binding: misc: Add kb1200 misc
A new general configuration addition

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang bf644dd5ae dts: binding: serial: Add kb1200 uart
A new uart controller addition

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang dc9fc3aff1 dts: binding: pinctrl: Add kb1200 pinctrl
A new pinctrl controller addition

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Steven Chang add8f5aba4 dts: binding: gpio: Add kb1200 gpio
A new gpio controller addition

Signed-off-by: Steven Chang <steven@ene.com.tw>
2024-03-15 09:39:48 +00:00
Jun Lin c2179bcef0 soc: npcx: add support for npcx9m7fb
Add new SoC npcx9m7fb support for npcx9 series.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2024-03-15 08:43:47 +00:00
Benedikt Schmidt 4e4049d939 drivers: sensor: add diagnostics sensor for BD8LB600FS
Implement a sensor for the output diagnostics of the low side
switch BD8LB600FS.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-03-15 09:00:26 +01:00
Benedikt Schmidt 31450fcb12 drivers: gpio: split up driver for BD8LB600FS into a GPIO and MFD
Split up the driver for the low side switch BD8LB600FS into a GPIO
and MFD part.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-03-15 09:00:26 +01:00