In order to bring consistency in-tree, migrate all dts code to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to zephyrproject-rtos#45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This adds the CMOS RTC node to the common devicetree files
for x86. Note that this is not added to Lakemont, as it is
usually used for embedded applications which would not have
CMOS RTC.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Kconfig options will anyway enable/disable the driver relevantly.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Added support for GPIO driver for Intel Elkhart Lake
board.
The GPIO driver will support pin value read/write operations,
pin direction and interrupt configuration. ACPI enumeration
support and support for different GPIO communities is also
present.
Verified on ehl_crb.
Signed-off-by: U Divya <u.divya@intel.com>
Start using DTS values for PCI Vendor ID and PCI BDF. For the PCI
Device ID we do not use DTS since this would require changing overlay
for different SKU board.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Move all PCIe-based DT nodes under a PCIe bus and take advantage of
the DT_ANY_INST_ON_BUS_STATUS_OKAY() and DT_INST_ON_BUS() macros.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add definitions for UART1/2 when they're accessible through fixed MMIO
addresses (instead of PCIe), and mark all UARTs not normally available
with the UEFI BIOS as "disabled".
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The existing method of testing for any of the first four DT instances
having the pcie property feels a bit clumsy and will get more so when
support for more than four UARTs is added. A much more cleaner way to
do this (and more correct probably as well) is to list any PCIe-based
UART nodes under a pcie bus in the Device Tree hierarchy.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
