The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).
To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.
All files including CMSIS have been updated.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This follows the same convention that has already been adopted by Intel
Alder Lake and Raptor Lake boards.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
- Remove raising compilation error in `float_regs_arm_gcc.h`
These macros are checked in 'load_store.c', so no need to check them
again in 'float_regs_arm_gcc.h'
- Enable this test on the VFP platform of aarch32
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
- Add integration_platforms to avoid excessive filtering
- Make sure integration platforms are actually part of the filter
- Fix some tags and test meta data
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The test case will show an unexpected exception in the idle thread after
all test cases pass. The issue is caused by the main thread
stackoverflow.
Increase the main stack configured in this test case to fix the issue.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Twister now supports using YAML lists for all fields that were written
as space-separated lists. Used twister_to_list.py script. Some artifacts
on string length are due to how ruamel dumps content.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Looks like switching the main return value to int means that stack
frame persists and increases stack usage by a few bytes. Increase the
main stack size to avoid overflows.
Signed-off-by: Keith Packard <keithp@keithp.com>
LLVM doesn't support SSE + 387 math. As such if SSE is enabled we
have to utilize SSE floating point. To utilize 387 math, SSE has
to be disabled.
Update the floating point related tests to introduce 387 only variants
that will build on both GCC & LLVM based tools. Than we exclude llvm
based (llvm, oneApi) toolchains from the CONFIG_X86_SSE_FP_MATH=n and
CONFIG_X86_SSE=y test variants.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
This test relies on one thread interrupting another to exercize the FPU
sharing. On SMP those threads get one CPU each with no sharing of their
FPU making the test rather pointless.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
With lazy FPU context switching, k_float_disable() is merely triggering
a synchronous FPU context save and k_float_enable() is a no-op.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Use namespacing with extra_configs in some tests and remove duplicated
scenarios the were made arch or platform specifc.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
integration_platforms help us control what get built/executed in CI and
for each PR submitted. They do not filter out platforms, instead they
just minimize the amount of builds/testing for a particular
tests/sample.
Tests still run on all supported platforms when not in integration mode.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
For tests that set CONFIG_MP_NUM_CPUS, switch to using
CONFIG_MP_MAX_NUM_CPUS instead as we work to phase out
CONFIG_MP_NUM_CPUS.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
This workaround is no longer needed as sparc stack footprint
is reduced in this commit:
5cf2083e8b87f918a522423a1659ae58137ceea0
Signed-off-by: Julius Barendt <julius.barendt@gaisler.com>
Add a bunch of missing "zephyr/" prefixes to #include statements in
various test and test framework files.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
When running tests/kernel/fpu_sharing/generic on qemu_leon3 with the
new ztest API, a fatal error is raised while test is reported success.
So workaround this by changing the main stack size to 2048.
Signed-off-by: Guo Lixin <lixinx.guo@intel.com>
In order to bring consistency in-tree, migrate all tests to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
For testing, assume that the Cortex-A/R platforms are using a GIC
interrupt controller. Use the last GIC SGI to trigger an interrupt for
the test.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
This test uses k_yield() to "sync" between threads, so it's implicitly
supposed to run on a single CPU. Make it explicit, to avoid issues on
platforms with more cores.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
FIXKFLOATDISABLE
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Move to CMake 3.20.0.
At the Toolchain WG it was decided to move to CMake 3.20.0.
The main reason for increasing CMake version is better toolchain
support.
Better toolchain support is added in the following CMake versions:
- armclang, CMake 3.15
- Intel oneAPI, CMake 3.20
- IAR, CMake 3.15 and 3.20
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Introduce the fpu tag to tests that explicitly enable
the FPU and FPU_SHARING Kconfig options. The tag could
be used to run all FPU-related tests in the tree.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This adds FPU sharing support with a lazy context switching algorithm.
Every thread is allowed to use FPU/SIMD registers. In fact, the compiler
may insert FPU reg accesses in anycontext to optimize even non-FP code
unless the -mgeneral-regs-only compiler flag is used, but Zephyr
currently doesn't support such a build.
It is therefore possible to do FP access in IRS as well with this patch
although IRQs are then disabled to prevent nested IRQs in such cases.
Because the thread object grows in size, some tests have to be adjusted.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This patch replaces ENOSYS into ENOTSUP to keep consistency with
the return value specification of k_float_enable().
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
* Rename CPU_ARCV2 to ISA_ARCV2. That helps to avoid conflict between
CPU families naming and ISAs naming and aligns this options
with other ARC OSS projects.
* Generalize ARCV2 check to ARC check where it is required.
NOTE: we add ISA_ARCV2 option in a choice list as a preparation
for ISA_ARCV3 addition.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
This adds qemu_x86_lakemont to the platform allow list
for the FPU sharing tests. Since Lakemont supports SSE3
and SSSE3, it is better to test them also.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds X86 keyword to the kconfigs to indicate these are
for x86. The old options are still there marked as
deprecated.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
As FPU enalbed the printf code size is changed,
so increase main stack size to make test pass on NXP RT platforms
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
