Commit graph

81960 commits

Author SHA1 Message Date
Pieter De Gendt 6758777ddf drivers: crypto: Add NXP MCUX DCP driver
Add a shim driver for NXP's Data Co-Processor (DCP) driver.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-07-26 09:09:48 +02:00
Yong Cong Sin 74f73cd535 arch/common: add 64bit register access functions for 64bit arch
Some 64bit arch SoC happens to have 64bit registers.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-07-25 19:08:48 -04:00
Fabio Baltieri b489a75403 MAINTAINERS: fix a bunch of directory paths
Fix various incorrect maintainer file entry for directories. These
are currently matching files, but would break few scripts if we were to
upgrade the CI image to Python 3.11 due to a change in behavior of
Path.glob().

Fixes various:

MAINTAINERS.yml: glob pattern '...' in 'files' in area '...' does not
match any files

on machines running Python 3.11 or newer.

Link: https://docs.python.org/3/library/pathlib.html#pathlib.Path.glob
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-07-25 18:49:34 -04:00
Fabio Baltieri 68f514fc38 scripts: compliance: always run the MaintainersFormat check
The check currently only runs if the maintainers file itself is changed,
but that means that the check is going to miss every PR that moves
directory or delete files that can potentially trigger an error.

This check is cheap to run, just run it unconditionally.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-07-25 18:49:34 -04:00
Bartosz Bilas 5b432ecda4 MAINTAINERS: fix path for xtensa/riscv esp32 soc
The correct paths are soc/xtensa/espressif_esp32
and soc/riscv/espressif_esp32, not soc/xtensa/esp32
and soc/riscv/esp32.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2023-07-25 18:17:19 +00:00
Girisha Dengi 4ca1d423c7 MAINTAINERS: Add self as maintainer for Intel Agilex platform
Add maintainer and collaborators for Intel Agilex platforms and
related drivers.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi 8df81eae71 CODEOWNERS: Add code owners for Intel Agilex5 platform drivers
Code owners for all the required Intel Agilex5 platform drivers.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi ba40e9fded samples: subsys: shell: Custom configs for intel_socfpga_agilex* boards
The intent of this change is to add custom shell configurations for
intel_socfpga_agilex* based boards. As of now, configurations are
added for 'intel_socfpga_agilex5_socdk' board.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi 62dbe72cb7 drivers: pm_cpu_ops: Add support for multiple PSCI versions
Each PSCI interface versions have different DT compatible strings
like arm,psci-0.2, arm,psci-1.1 and so on. However, the same driver
can be used for all the versions by adding #define DT_COMPAT for
required version and #undef DT_COMPAT for default version.

Add support for PSCI cold reset, warm reset and cpu-on function IDs.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Navinkumar Balabakthan <navinkumar.balabakthan@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi f0ac2347da drivers: serial: Add optional reset line for uart_ns16550
If the optional hardware reset line is available, this change
will use that reset line to assert the uart module and bring
it out of reset state to use.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi 6639756fae drivers: reset: Add reset controller for Intel Agilex5 platform
This is Intel's proprietary IP which controls individual module
reset signals. During each system driver initialization, these
reset signals will be used to bring module out of reset state.

Signed-off-by: Navinkumar Balabakthan <navinkumar.balabakthan@intel.com>
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi 81f0acd5d4 dts: arm64: Add device tree for Intel SoCFPGA Agilex5 platform
Device tree for Intel SoCFPGA Agilex5 initial bring up. This is the
first version of device tree which enable four cores SMP and basic
drivers that needed by 'hello_world' and 'cli' applications.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi 2ca6ffcd79 drivers: clock_control: clock driver for Intel Agilex5 platform
This is Intel's proprietary IP which supply the clock for all the
system peripherals. Clock manager is initialized only one time
during boot up by FSBL (ATF BL2) based on external user settings.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi 42477ed68d boards: arm64: Add Intel SoC FPGA Agilex5 development kit board
This is the initial Zephyr support for Intel SoC FPGA Agilex5 support.
Agilex5 has dual-core 64-bit ARM Cortex*-A55 and dual-core 64bit
ARM Cortex*-A76.

The Zephyr will need to be loaded by Intel Arm Trusted Firmware (ATF).
Agilex5 Zephyr boot flow:
  FSBL:ATF BL2(EL3) -> ATF BL31(EL3) -> OS:Zephyr(EL1)

Intel ATF can be loaded from:
  https://github.com/altera-opensource/arm-trusted-firmware.git

Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi 75547dd522 soc: arm64: Add agilex5 soc folder and its configurations
Add Agilex5 soc folder, MMU table and its configurations for
Intel SoC FPGA Agilex5 platform for initial bring up.
Add ARM Cortex-a76 and Cortex-a55 HMP cluster type.

Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Marek Matej 938732c00d drivers: can: fix long lines
Change the line length to comply with the rules.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Marek Matej 5e1b18526c include: dt-bingings: Fix typo
Fix minor typo in esp32s3-gpio-sigmap

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Marek Matej 6b57b3b786 soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:

- changing the CONFIG_SOC_ESP32* to refer to
  the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
  the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
  provide a SOC model config
- introducing the 'common' folder to hide all
  commonly used configs and files.
- updating west.yml to reflect previous changes in hal

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Marek Matej 7472ff97d0 boards: mark esp32 board as deprecated
Mark the 'esp32' board as deprecated after removing
it and replaced by the two real boards.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Marek Matej 3776402f40 boards: xtensa: esp32 board split
Remove virtual esp32 board and replace it with the
real word boards:

- esp32_devkitc_wroom
- esp32_devkitc_wrover (with PSRAM option)

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Marek Matej e033bf6e7a dts: riscv: esp32c3 rework soc/sip list
Introduce dtsi files representing the
current portfolio of chips and modules
based on the:

- flash size
- psram size
- gpio count
- certification status

Update the boards dts files according
to which SOC/SIP they are using.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Marek Matej 79869f8abd dts: xtensa: esp32xx rework soc/sip list
Introduce dtsi files representing the
current portfolio of chips and modules
based on the followint criteria:

- flash size
- psram size
- gpio count
- certification status

Update the boards dts files according
to which SOC/SIP they are using.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Jordan Yates f38e6aa0d1 tests: misc: check_init_priorities: update output
Update the expected output of the init priority checking.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-25 15:58:06 +00:00
Jordan Yates b65ac5b9e0 tests: misc: check_init_priorities: force two stage linking
Add `CONFIG_DEVICE_DEPS` to force two stage linking, otherwise the
following check means the test never runs:
```
if (TARGET zephyr_pre1)
  add_dependencies(zephyr_pre1 check_init_priorities_output)
endif()
```

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-25 15:58:06 +00:00
Jordan Yates 50d42dcdb2 scripts: build: check_init_priorities_test: fix
Fix the test script for the changes made to section naming.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-25 15:58:06 +00:00
Jordan Yates 23280f4a54 scripts: build: check_init_priorities: parse new naming
Update the script to parse the new section naming. The ordering type
is converted from an integer to a tuple, which still compares correctly
due to the elementwise behaviour of tuple comparison.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-25 15:58:06 +00:00
Jordan Yates 60a082b8dd tests: lib: devicetree: api: test DT_DEP_ORD_STR_SORTABLE
Add basic testing of the new `DT_DEP_ORD_STR_SORTABLE` macro.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-25 15:58:06 +00:00
Jordan Yates 96138d233f tests: kernel: device: test sub-priority
Add tests for sorting devices at the same init priority based on their
devicetree ordinals.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-25 15:58:06 +00:00
Jordan Yates 2790547cbd init: add sub-priority to internal ordering
Add a sub-priority field to `Z_INIT_ENTRY_SECTION`, which is used to
ensure that multiple drivers running at the same init priority still
run in an order that respects their devicetree dependencies.

This is primarily useful when multiple instances of the same device are
instantiated that can depend on each other, for example power domains
and i2c muxes.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-25 15:58:06 +00:00
Jordan Yates b6e03417c7 dts: gen_defines: generate _ORD_STR_SORTABLE
Generate a zero padded variant of `_ORD` that is suitable for use in
linker scripts with the `SORT` property, so that `6` is correctly placed
before `24`, and so on.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-25 15:58:06 +00:00
Marc Desvaux 76ba68cd18 drivers: ethernet: stm32 generate_mac
Ethernet MAC addresses are not unique enough
use unique_device_ID full range (96 bits)
call crc32_ieee() to generate last 3 bytes of mac address

Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
2023-07-25 16:45:53 +02:00
Fabio Baltieri 0f23cda744 scripts: drop list_issues.py
This is not used as part for the release process anymore.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-07-25 16:45:15 +02:00
Fabio Baltieri ecf29a77f8 doc: release: drop the notes about listing github issues
Drop the notes about listing all the github issues with the release
notes. That was a huge list of github issues sorted by closing time,
very noisy and hard to maintain.

The unfiltered list of changes is already in the commit history, a
distilled list is now in the blog posts and a final list is in the notes
summary.

The issue list has been skipped in 3.4 already, let's just drop it from
the process.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-07-25 16:45:15 +02:00
Jordan Yates a2395e8d5b mbedtls: add MBEDTLS_AES_FEWER_TABLES control
Add a kconfig symbol to control the mbedtls option
`MBEDTLS_AES_FEWER_TABLES`. 6KiB is a not insignificant ROM/RAM savings,
and the extra arthmetic is quite reasonable.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-25 16:44:16 +02:00
Pavel Vasilyev 4d56a318f1 bluetooth: tester: Add commands to add and delete virtual addresses
Virtual address behavior has been changed in this PR:
https://github.com/zephyrproject-rtos/zephyr/pull/57878

Now it is required to register virtual address before using it.

Corresponding PR to auto-pts:
https://github.com/auto-pts/auto-pts/pull/961

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2023-07-25 15:26:36 +02:00
Markus Fuchs fbe6ac852f drivers: bluetooth: slz_hci: Fix incoming HCI packet handling
Currently, HCI packet handling does not consider the BT_RECV_CONTEXT
choice selection. It calls bt_recv() and bt_recv_prio() only depending
on the HCI packet type and event flags.
However, for selections other than BT_RECV_BLOCKING, the "HCI driver
shall not call bt_recv_prio()". Fix that by only calling bt_recv_prio()
when CONFIG_BT_RECV_BLOCKING is enabled.

Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
2023-07-25 14:41:13 +02:00
Robert Lubos 9866a5229d samples: net: dns_resolve: Improve DHCPv4 handling
There is some ambiguity with the DHCPv4 handling in the dns_resolve
sample. On one hand, the sample uses net_config library, which does
initiate the DHCPv4 on the interface (if enabled) and may block the
initialization until the address is assigned (in case there is no other
statically assigned IPv4 addresses.) On the other hand, the sample
registers for NET_EVENT_IPV4_ADDR_ADD in case DHCPv4 is in use, delaying
the DNS queries until address is assigned.

In case net_config delayed the initialization however, this will not
work, as the event handler will be registered only after DHCPv4 address
is assigned, so the callback will not get executed.

Fix this, by checking if DHCPv4 assigned address already exists on an
interface - if so, schedule DNS queries immediately. Otherwise (for
example in case when net_config was not configured to wait for address)
register an event callback, and schedule queries from there.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2023-07-25 14:18:54 +02:00
Robert Lubos ea9d8b7295 tests: net: if: Add tests to verify net_if_ipv4/6_addr_foreach()
Add tests cases which verify that net_if_ipv4/6_addr_foreach() executes
callbacks properly on assigned addresses.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2023-07-25 14:18:54 +02:00
Robert Lubos b2314c8362 net: if: Add functions to loop over IPv4/IPv6 addresses
Add new net_if API functions which allow to loop over all valid
IPv4/IPv6 addresses assigned to the interface and execute a callback
function on them.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2023-07-25 14:18:54 +02:00
Jordan Yates f0958c62e4 Revert "dts: gen_defines: generate _ORD_STR_SORTABLE"
This reverts commit 9b77681473.
2023-07-25 14:17:11 +02:00
Jordan Yates 109fc87737 Revert "init: add sub-priority to internal ordering"
This reverts commit bb590b5b6e.
2023-07-25 14:17:11 +02:00
Jordan Yates 3c1149e058 Revert "tests: kernel: device: test sub-priority"
This reverts commit 01e98fcb5f.
2023-07-25 14:17:11 +02:00
Jordan Yates d63999af6e Revert "gpio: stellaris: implement gpio_pin_get_config"
This reverts commit c72577d709.
2023-07-25 14:17:11 +02:00
Jordan Yates 6edab1f050 Revert "pm: device: add driver init helper"
This reverts commit 84016c1cd3.
2023-07-25 14:17:11 +02:00
Jordan Yates f613074283 Revert "power_domain: gpio: compile without PM_DEVICE_POWER_DOMAIN"
This reverts commit 1f1217e832.
2023-07-25 14:17:11 +02:00
Jordan Yates 226f1c5e4b Revert "power_domain: gpio: init with pm_device_driver_init"
This reverts commit 39b2ec57a0.
2023-07-25 14:17:11 +02:00
Jordan Yates b74efbe59e Revert "tests: pm: update power domain behaviour"
This reverts commit b82bbf5e31.
2023-07-25 14:17:11 +02:00
Jordan Yates d02e49c4f0 Revert "tests: pm: test pm_device_driver_init"
This reverts commit a4cfc1eb37.
2023-07-25 14:17:11 +02:00
Robert Lubos 30382daf88 net: wifi_shell: Add user input validation for SSID and PSK
When parsing user input for "wifi connect" and "wifi ap enable"
commands, the SSID and PSK lengths were not verified. It's better to
detect invalid connect/AP enable parameters early, so that help text can
be printed, instead of letting wifi_mgmt command to fail.

For WIFI_SECURITY_TYPE_SAE, follow the Linux convention of limiting the
size to 128 bytes.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2023-07-25 14:16:17 +02:00
Robert Lubos a22f7e777b net: dhcpv4: Accept unicast replies
Some DHCPv4 servers do not respect BROADCAST flag set on DHCP Discover,
replying with unicast packet, making it impossible to obtain DHCP
address by Zephyr in such cases.

RFC1542 chapter 3.1.1 makes the following statement about the BROADCAST
flag:
    This addition to the protocol is a workaround for old host
    implementations.  Such implementations SHOULD be modified so
    that they may receive unicast BOOTREPLY messages, thus making
    use of this workaround unnecessary.  In general, the use of
    this mechanism is discouraged.

Making it clear that being able to process unicast replies from the DHCP
server is not only an optional behavior, but a recommended solution.

Therefore, introduce a support for unicast DHCPv4 in Zephyr. To achieve
this, add additional filtering rule at the IPv4 level - in case DHCPv4
is enabled, there is an active query and the packet is destined for the
DHCPv4 module, let it through for the DHCPv4 module to process,
regardless of the destination IP address.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2023-07-25 14:15:45 +02:00