Move the DWT utility functions, present in timing.c
in an internal cortex-m header.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Introduce the required Kconfig symbol framework for the
Cortex-M-specific null pointer dereferencing detection
feature. There are two implementations (based on DWT and
MPU) so we introduce the corresponding choice symbols,
including a choice symbol to signify that the feature
is to be disabled.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Either get priority from devicetree (liteeth) or remove Kconfig symbols
that aren't used anywhere for IRQ priority (gecko, stm32_hal).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The stream_flash_buffered_write, when invoked to do flush write, will
attempt to write the tail bytes from the buffer, filling the required
minimal write block size with erase value bytes; after write it rewinds
the buffer offset, bytes_written, by number of the "filler bytes".
Doe to lack of return code processing from flash_sync call, two things
would happen to context in case of failure:
1) the ctx->bytes_written would be rewind pass the value it had before
function call as it gets decremented by "filler bytes" even if write
failed;
2) the ctx->buf_bytes offset would be accounting for added "filler
bytes" which should not be counted as data in buffer.
Proper processing of return code has been added to remove effects
described above.
Unit tests have been expended to cover the scenarios.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The stream_flash_buffered_write used to read byte from flash, in front
of the current buffer pointer, to obtain value of errased flash;
the code has been replaced with obtaining the value from flash
parameters.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit moves block that checks if flash_stream_ctx.buf_bytes
is non-zero out of CONFIG_STREAM_FLASH_ERASE specific code, as that is
universal check and is valid also for not CONFIG_STREAM_FLASH_ERASE
code.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The flash_sync function is able to call, if specified, write
verification callback to check whether data flash has been correctly
written to a flash. Part of that procedure is to read date back of
the flash and call the verification callback on the buffer;
in case if the read would fail, the flash_sync would return,
with an error code, without updating stream_flash_ctx.
The same logic should be applied to failed verification, but, due to
missing return, the stream_flash_ctx gets updated with probably
incorrectly written bytes added to total bytes_written and buf_bytes,
representing number of bytes awaiting in buffer, being zeroed.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The stream_flash_erase_page would update stream_flash_ctx member
last_erased_page_start_offset, to page offset it attempted to erase,
even if such operation failed.
The commit changes this behaviour so that in case of failure the
last_erased_page_start_offset would still hold previously, successfully,
erase page offset.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Such instance is needed for building drivers that use DEVICE_DT_GET()
to get the pointer to the GPIO controller device structure.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove unused symbols and related sections from the linker script. In
particular CONFIG_IS_BOOTLOADER and CONFIG_CODE_DATA_RELOCATION are not
currently supported on AArch64.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Looking at the data sheet for the npcx section 4.15.5 CR_UART Core
Registers, the UICTRL register that is used in the npcx poll
functions is invalid when running in FIFO mode. Instead, calls to
uart_npcx_poll_in and uart_npcx_poll_out should be redirected to
their respective FIFO read/fill functions (when using interrupts).
Changes:
- When calling uart_poll_in: forward the request to uart_fifo_read.
- When calling uart_poll_out: loop until uart_fifo_fill returns
non-0 (we wrote 1 byte).
Signed-off-by: Yuval Peress <peress@chromium.org>
Simple reorg of the function declarations. This change moves
the interrupt driven functions declared at the bottom of the
uart_npcx.c file to the top, clustered under the same ifdef.
Signed-off-by: Yuval Peress <peress@chromium.org>
All dma drivers are devicetree based now so we can remove the last
bits of Kconfig associated with the old driver style.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We can utilize the devicetree macros to determine which instances to
enable. This will allow us to phase out the per instance Kconfig
symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Nothing sets the op mode to anything but master. For now default the
mode to master-only and we can determine a devicetree property in the
future if we need to support other configurations.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace Kconfig symbols SPI_DW_PORT_n_INTERRUPT_SINGLE_LINE with just
seeing how many IRQs are defined in the devicetree to determine single
or multiline interrupt support.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SoC that utilized the clock support isn't supported in Zephyr
anymore and there are no users of this code. Remove it for now as it
should get converted to utilize devicetree if needed in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The compiler was inserting additional redundant loads in many
`sys_dlist_*` APIs, in case writes aliased with previous reads.
However, these additional reads are unnecessary, as the only cases
where the aliasing would matter would be a violation of the `dlist`
API contract (e.g. if node->next == node but node->prev != node).
This is decidedly a micro-optimization.
Signed-off-by: James Harris <james.harris@intel.com>
Enable the driver for the Kinetis Digital-to-Analog (DAC) modules
present in the NXP Kinetis K2x SoC series.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Add device tree nodes for the Digital-to-Analog (DAC) modules present
in the NXP Kinetis K2x series.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
`z_impl_k_yield` unlocked sched_spinlock, only to lock it again
immediately, do a little bit more work, then unlock it again.
This causes performance issues on SMP, where `sched_spinlock`
is often fairly highly contended and cores often end up spinning
for quite a while waiting to retake the lock in `z_swap_unlocked`.
Instead directly pass the spinlock key to `z_swap` and avoid the
extra lock+unlock.
Signed-off-by: James Harris <james.harris@intel.com>
`z_is_t1_higher_prio_than_t2` was being called twice in both the
context-switch fastpath and in `z_priq_rb_lessthan`, just to
dealing with priority ties. In addition, the API was error-prone
(and too much in the fastpath to be able to assert its invarients)
- see also #32710 for a previous example of this API breaking
and returning a>b but also b>a.
Replacing this with a direct 3-way comparison `z_cmp_t1_prio_with_t2`
sidesteps most of these issues. There is still a concern that
`sgn(z_cmp_t1_prio_with_t2(a,b)) != -sgn(z_cmp_t1_prio_with_t2(b,a))`
but I don't see any way to alleviate this aside from adding an
assert to the fastpath.
Signed-off-by: James Harris <james.harris@intel.com>
The funky order was necessary when registers were stored using a
sequence of `stp x(n), x(n+1), [sp, #-16]!`. Now that absolute offsets
are being used, we can restore natural ordering.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If next_timeout() returns INT_MAX and pass it to
z_clock_set_timeout(), and machine goes to freeze or slow down.
Bad scenario as follows:
- If an argument int32_t ticks is set large value 0xffffffff,
ticks = MAX(MIN(ticks - 1, (int32_t)MAX_TICKS), 0);
replaces it into MAX_TICKS.
- uint32_t cyc will be set near by 0xffffffff
(this is 0xfffd7280 in 100 ticks per second).
- Add adjustment to cyc, adjustment max value is MAX_CYC.
(cyc = 0xffff14fd)
- Over 0x80000000 value of uint32_t is considered as negative
value of int32_t.
if ((int32_t)(cyc + last_count - now) < MIN_DELAY)
This condition is always true.
- Because cyc += CYC_PER_TICK will get overflow, driver sets mtimecmp
near value of current mtime.
(cyc = 0x00007fc0)
- Next timer interrupt will happen soon after return from interrupt
handler.
- By repeating these events, machine cannot go to next instruction,
and it's going to freeze or slow down.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Add some testcases to tesing different condition of mailbox
API. Check API robust in different input parameters is handled.
such as invoke API to get data with NULL input.
Signed-off-by: Jian Kang <jianx.kang@intel.com>
Move the ticker job_guard reset to after
ticker_job_compare_update, so that the ticks_current and
ticks_slot_previous are updated before ticker_worker gets
to execute. Without this fix, there is a possibility that
ticker_worker will use incorrect ticks_slot_previous and
ticks_current value under race conditions.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
