Commit graph

7005 commits

Author SHA1 Message Date
Daniel DeGrasse 842ee0acf3 drivers: regulator: support regulator-boot-on for PMIC driver
Add support for regulator-boot-on to PMIC driver. Many PMIC devices will
be enabled at boot, so this property allows the regulator framework
to correctly track their state.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-10-18 14:12:52 +02:00
Stephanos Ioannidis cf8f42c5e6 boards: mps3_an547: Add flash and RAM size attributes
This commit adds the flash and RAM size attributes to the board YAML
file so that the board can be properly filtered by memory sizes.

Signed-off-by: Stephanos Ioannidis <stephanos.ioannidis@nordicsemi.no>
2022-10-18 17:52:48 +09:00
Daniel DeGrasse 5ab62a4377 boards: mimxrt1160_evk_cm4: enable standalone debugging
Enable standalone debugging of secondary CM4 core on MIMXRT1160 EVK.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-10-17 13:46:37 -05:00
Gerard Marull-Paretas 178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Katarzyna Giądła 2ead05f4ed boards: Add support of network interfaces for NRF boards.
This changes add to files with boards specification
information about support of the network interface.

Signed-off-by: Katarzyna Giądła <katarzyna.giadla@nordicsemi.no>
2022-10-17 10:14:54 +02:00
Francois Ramu 634086502b boards: arm: nucleo_l073rz platform has an eeprom
Add the eeprom peripheral to the nucleo_l073rz board
from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-10-17 14:41:01 +09:00
Jay Vasanth ae9de20222 drivers: spi: Added MEC172x full duplex qmspi driver
Add MEC172x full duplex qmspi driver version to support full
duplex transfers as expected by the Zephyr spi driver model.
On every spi clock we transmit one bit and receive one bit.
This driver will work with Zephyr SPI NOR driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-14 14:09:51 -05:00
Jay Vasanth 3f1da206f8 dts: microchip: spi: move common properties to a separate include
updated dts variables naming (hyphen instead of underscore).
moved all properties in microchip ldma yaml to a separate include file,
these properties will be common with the (to be added)
full duplex spi driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-14 14:09:51 -05:00
Andriy Gelman 7f00371948 drivers: uart_xmc4xxx: Add fifo support
Adds fifo support for tx/rx.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-10-14 15:06:19 +02:00
Andriy Gelman 5313598f6a drivers: uart_xmc4xxx: Add interrupt driven support
Add interrupt driven support.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-10-14 15:06:19 +02:00
Martin Jäger cfc31830b3 boards: riscv: esp32c3_devkitm: enable TWAI peripheral
The board does not have a CAN transceiver on board, but the driver
can be tested in loopback mode with the CAN RX and TX pins shorted.

Signed-off-by: Martin Jäger <martin@libre.solar>
2022-10-14 09:55:09 +02:00
Manuel Arguelles 390f5bad8f boards: s32z270dc2_r52: add docs
Document supported features and basic how-to for s32z270dc2_r52 boards.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-14 09:51:14 +02:00
Manuel Arguelles c74d032433 boards: arm: s32z270dc2_r52: enable GPIO driver
Enable GPIO driver on s32z270dc2_r52 boards. S32Z27 pads are grouped
into GPIO ports A to N.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-14 09:51:14 +02:00
Manuel Arguelles 88685d32fa boards: arm: s32z270dc2_r52: enable serial driver
Enable serial driver and Zephyr console on this board.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-14 09:51:14 +02:00
Manuel Arguelles 396054961d boards: arm: s32z270dc2_r52: enable pinctrl driver
Enable pinctrl driver, configuration for pinctrl node to be added in
future patches.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-14 09:51:14 +02:00
Manuel Arguelles 6bee9e1157 boards: arm: introduce s32z270dc2_r52 support
This patch introduces the support for NXP X-S32Z27X-DC(2) board.
Each S32Z27 Real-Time Unit (RTU) is defined as a separate board to
allow the user to run Zephyr on a specific RTU.

Currently is only possible to use Lauterbach TRACE32 west runner to load
and execute a Zephyr application from internal SRAM.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-14 09:51:14 +02:00
Manuel Arguelles 31b3993d58 scripts: west: introduce Lauterbach TRACE32 runner
This patch introduces a West runner for flashing and debugging with
Lauterbach TRACE32 debuggers. The runner consists of a wrapper around
TRACE32 software, and allows a Zephyr board to execute a custom start-up
script (Practice Script) for the different commands supported, including
the ability to pass extra arguments from CMake. Is up to the board using
this runner to define the actions performed on each command.

The `debug` command launches TRACE32 GUI to allow debug the Zephyr
application, while the `flash` command hides the GUI and executes the
start-up script in a background process.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-14 09:51:14 +02:00
Sebastian Bøe 1dd312fd17 build: test: Update nrf91 flash yaml value
Update flash value in nrf91 board yaml file.

After evaluating the values it was found that they don't correspond
with the available amount reported by the linker.

This value is used for test case filtering.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2022-10-14 09:50:23 +02:00
Daniel DeGrasse 0f33fa9c32 boards: arm:mimxrt685_evk: update PMIC to support mode setting
Update PCA9420 PMIC to support mode setting feature

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-10-12 18:40:24 +02:00
Daniel DeGrasse 07b2145727 boards: arm:mimxrt595_evk: update PMIC to support mode setting
Update PCA9420 PMIC to support mode setting feature

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-10-12 18:40:24 +02:00
Daniel DeGrasse f367897bce drivers: regulator: refactor PMIC binding to use physical PMIC IC
Refactor binding to use root PMIC IC, so that properties can be shared
between regulator devices. Each individual regulator output is still
created as an individual device, since the regulator API aligns with
these devices better than the PMIC IC itself.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-10-12 18:40:24 +02:00
Huifeng Zhang 52cdf2aaf3 boards: fvp_baser_aemv8r: remove SOC_FVP_AEMV8R_EL2_INIT code
Now that VMPIDR_EL2 will be initialized in z_arm64_el2_init, the code
that I wrote for initializing VMPIDR_EL2 on fvp_baser_aemv8r can be
removed.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2022-10-12 18:46:49 +09:00
Gerard Marull-Paretas 343e900799 soc: arc: add missing aux_regs.h include
It is required for z_arc_v2_core_id()  or register read/write functions.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas 6a0f554ffa include: add missing kernel.h include
Some files make use of Kernel APIs without including kernel.h, fix this
problem.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas f7a5b47dff include: add missing devicetree.h include
Some files make use of DT APIs without including devicetree.h.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas 34a6848887 include: add missing arch/cpu.h include
The sys* ops like sys_clear_bit are indirectly included via arch CPU
header. Other stuff like find_msb_set end up included via this header as
well.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Anas Nashif d038eb5dc7 intel_adsp: move memory windows to DTS proper
Instead of just declaring the memory window register in DTS and have
everything else all over the place (headers, Kconfig, etc.) this change
defines the memory window instances in DTS and uses the device model to
initialize the windows. Code is still part of the SoC, given that we do
not have a driver subsystem suitable for this type of device yet.

Move FW status to own workflow and separate from window setup.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 08:28:25 -04:00
Gaël PORTAY 29eee72ed4 boards: arm: olimex_lora_stm32wl_devkit: fix typo
The board embeds a Bosch BME280 temperature, humidity, pressure
sensor[1].

[1]: https://www.olimex.com/Products/IoT/LoRa/LoRa-STM32WL-DevKit/open-source-hardware

Signed-off-by: Gaël PORTAY <gael.portay@gmail.com>
2022-10-10 13:50:25 +02:00
Henri Xavier a43b37bb07 boards: Add support for Khadas Edge-V board
This is an AArch64 board. We also add RK3399 SoC support,
as well as a very simple Synopsys 8250dw UART driver.

Signed-off-by: Henri Xavier <datacomos@huawei.com>
2022-10-08 18:32:14 +02:00
Tom Burdick a7c801fa66 boards: tdk_robokit1 jlink flasher support
Adds the needed JLink parameters and cmake includes to support flashing
and debugging the tdk_robokit1 with a segger jlink.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-10-07 12:44:52 -05:00
Gerard Marull-Paretas e049cc7621 boards: swan_r5: fix discharge gpio configuration
The 3V3 bus seems to have a resistor connected to an MCU pin to
discharge the bus by pulling the discharge line low while in open-drain
mode.

The board code was using non-existing GPIO flags (see previous commit
for more details). This patch makes it clear that this GPIO is for
discharging and uses GPIO attributes appropriately. Since the regulator
is enabled by default, discharging is disabled.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-07 10:00:55 +02:00
Gerard Marull-Paretas 01b833e2ed boards: swan_r5: fix regulator enabling code
The board.c file is using non-existing GPIO API attributes:
GPIO_SPEED_LOW and GPIO_MODE_ANALOG. The code compiles because we end up
including soc.h (via init.h -> kernel.h). soc.h pollutes the namespace
with STM32 HAL definitions, but they do not apply in the context of
Zephyr APIs.

Looking at the schematics, PE4 is really a pin controlling a regulator,
so this PR replaces such custom init code with a regulator turned on at
boot time.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-07 10:00:55 +02:00
Esteban Valverde 5528cc9d90 boards: arm: Cyclone V SoC enabling networking in config file
Enable networking and random generation in Kconfig configuration
file. This to enable Ethernet driver for Cyclone V SoC.

Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
2022-10-06 20:19:43 -07:00
Benjamin Björnsson f3cf86eaa2 boards: arm: arduino_portenta_h7: Add support for Arduino Portenta H7
This commit adds support for the Arduino Portenta H7 board.
The board functionallity has been verified by running following samples:
- hello_world on m7 core
- usb/console on m7 core
- blinky on m4 core

Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
2022-10-06 13:52:40 -05:00
Erwan Gouriou 87d7c8f6a2 boards: shields: x_nucleo_iks01a1: '-' is not allowed in nodelabels
When moving nodelabels to <device_name>_<shields_name>, '-' included
in <device_name> was then introduced in the  device nodelabel.
But '-' isn't an allowed nodelabel character, hence this is breaking
compilation with those shields.
Convert '-' to '_'.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-10-05 07:34:12 -05:00
Pieter De Gendt 1b40a17a38 boards: posix: native_posix: Handle SDL events in zephyr thread
This commit introduces a zephyr thread for SDL events. This allows
to use zephyr mutex locking with SDL callbacks.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-10-05 13:11:15 +02:00
Jaska Uimonen c9bf8ee4eb dts: xtensa: intel: add dmic dts definitions
Add Intel dmic dai dts definitions for ace15, cavs15 and cavs25
platforms.

Add also pre dts cmake files as the dmic nodes use same address and emit
warnings otherwise.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-10-05 12:41:45 +02:00
Erwan Gouriou adf927cca1 boards: shields: _nucleo_53l0a1: Fix use of nodelabels
Shield's nodelabels should now be in the form <device>_<shield_name>.
Besides changing the nodes nodelabels, their usages should be fixed.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-10-05 16:15:44 +09:00
Jay Vasanth f6e2cb9b84 drivers: uart: microchip: add support for mec15xx
update uart mchp xec driver to support mec15xx and add
pinctrl support for mec15xx uart

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-04 09:21:58 -05:00
TOKITA Hiroshi 6bf4fb39ad boards: Enable watchdog node for boards that implements GD32 SoCs
Enable watchdog in each GD32 implemented board.
Add the watchdog function as a supported function in each yaml files.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-10-03 18:07:16 +02:00
Erwan Gouriou 8cbd1bb186 boards: shields: x_nucleo_idb05a1: '-' is not an allowed nodelabel char
When adding nodelabels to shields devices, it should be taken car not to
use forbidden characters.
Fix existing occurrence.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-10-03 14:15:08 +02:00
Andriy Gelman 072a428f78 drivers: flash: Add xmc4xxx flash drivers
Add xmc4xxx flash drivers.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-10-03 13:56:49 +02:00
Erwan Gouriou ffcbc391ef boards: shields: frdm_kw41z: No reason to change chosen node
This nodelabel was changed while converting all shields to new nodelabel
scheme.
On this particular nodelabel, there was no change to be done, as it doesn't
refer to a node defined in the shield.
Revert this chagne.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-10-03 19:14:20 +09:00
Joakim Andersson c08964afd5 soc: nrf5340: Produce a Kconfig error when GPIO cannot be forwarded
Make Kconfig produce an error when GPIOs cannot be forwarded in the
current configuration instead of silently excluding the forwarding.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2022-10-03 10:17:45 +02:00
Martin Jäger 9cec058e8e boards: posix: native_posix: enable can_loopback0 by default
The .yaml file states that CAN is supported, but the basic sample
application samples/drivers/can/counter cannot be compiled without
additional configuration.

The loopback driver does not require any additional steps like the
linux SocketCAN driver, so it is safe to enable it by default and
get rid of the many overlay files in the tests.

ISO-TP tests and the counter sample are excluded via .yaml from
twister tests because of timing issues.

Signed-off-by: Martin Jäger <martin@libre.solar>
2022-10-03 10:17:12 +02:00
Erwan Gouriou 6b23044f4f boards: shields: fix indentation issues
Fix indentation issues in shield overlays seen when reviewing
previous commit.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-10-03 10:16:57 +02:00
Erwan Gouriou 07b642d94f boards: shields: Update node_label according to new naming scheme
Update existing shields to conform with new node label naming scheme.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-10-03 10:16:57 +02:00
Jun Lin 907062a3f9 boards: npcx_evb: choose kscan node to npcx_evbs
Choose keyboard scan node to npcx9 and npcx7 EVB and add pinctrl to
select pins to the keyboard function.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-10-03 10:14:51 +02:00
Ryan Erickson 52cfe2838c boards: Add MG100
Add Laird Connectivity MG100 board.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2022-10-03 10:11:28 +02:00
Dhruva Gole c82d66f319 boards: cc3220sf: add bosterpack_connector.dtsi
This can be used in DTOs

The boosterpack_connector.dtsi is an attempt to add something similar
to the arduino_r3_connectors that make using DT overlays with these
boards far easier and cleaner.
This can probably also be expanded to other CC32x TI launchpads
having similar layouts.

Referred swru465, ie. cc3220 TRM Table 5-14 and compared with launchpad
pinout. The numbering is done from 0...40 as per in the boosterpack pinout.
The pins like VCC/ GND have been skipped from the numbering. Also
the non-default pins are skipped.

Also add gpio status ok: This ensures that all the gpios are
enabled by default

Signed-off-by: Dhruva Gole <goledhruva@gmail.com>
2022-10-03 10:08:59 +02:00