Commit graph

22 commits

Author SHA1 Message Date
Wilfried Chauveau 5b3d4598a7 dts: arm: Blanket remove all usages of arm,num-mpu-regions
This removes all occurrences of arm,num-mpu-regions relying on the value
reported by the register instead.
A user may still define this property if they need to have a compile time
definition for it.

Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
2023-12-01 10:48:00 +00:00
Piotr Wojnarowski 03aa363a6c soc: arm64: viper: Move GIC version to DT
Move the GIC version to the device tree for viper
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Kumar Gala 900974362d dts: arm: Remove label property from devicetrees
Label properties are not required.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-27 18:48:10 +02:00
Kumar Gala 4aae32640f dts: arm/arm64: remove DTS 'label' property requirement from gic and timer
The armv8 timer, arm gic, and arm gic-v3-its don't use or need the
devicetree label property.  Update the dts bindings to not require it and
remove setting of the label property in dts files.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-06-16 09:48:12 -05:00
Gerard Marull-Paretas 4c8a8149de dts: add reg-shift property to all ns16550 devices
The ns16550 flags reg-shift property as optional. In case it is not
supplied, the ns16550 driver relies on a value defined in <soc.h>, or,
by default it takes 4 (shift by 2).

This patch adds the property to all ns16550 nodes, with the following
values:

- 2 if SoC did not have any custom value defined by
  UART_REG_ADDR_INTERVAL (corresponds to 1 << 2 = 4)
- If SoC defined DEFAULT_REG_INTERVAL (snps_arc_iot/it8xxx2), use such
  value (4=2, 2=1, 1=0).

These changes will allow simplifying the ns16550 driver.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-15 16:59:02 -05:00
Gerard Marull-Paretas 0d85931315 dts: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all dts code to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:54:54 +02:00
Raveendra Padasalagi 772c3620a0 dts: arm: broadcom: viper-a72: paxdma: Add interrupt property
Add interrupt parent and number property specific to a72
viper platform.

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2021-03-08 20:24:04 -06:00
Raveendra Padasalagi b1687ce9da dts: arm: broadcom: viper: rename paxdma label
To keep the generic DMA device name as defined
in the dma framework config, renamed paxdma device
label to "DMA_1".

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2021-03-08 20:24:04 -06:00
Raveendra Padasalagi 8c704ea3a8 soc: viper: update registers and interrupt numbers
Update register addresses and NVIC/GIC interrupt numbers
according to the latest viper RTL version.

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2021-03-05 07:21:54 -06:00
Raveendra Padasalagi 30110cd047 dts: arm: rename pl330 dma device label
Rename pl300 device label from "pl330" to "DMA_0"

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2021-03-04 12:59:46 +01:00
Kumar Gala 3fff3852fa dts: Rename compatible arm,arm-timer to arm,armv8-timer
The compatible for the ARMv8 timer should have been arm,armv8-timer and
not arm,arm-timer.  The dts binding file name was correct, just the
compatible was wrong.  Rename dts, binding, and associated code to use
arm,armv8-timer.

Fixes #31946

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-04 07:04:28 -05:00
Kumar Gala 1edf006d49 dts: Fix /soc/timer: missing or empty reg/ranges property warnings
The arm64 timer node has not reg property and thus shouldn't be a
child of the SoC MMIO node.  Move the arm,arm-timer up one level
to address this warning.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-03 20:55:56 -05:00
Raveendra Padasalagi 21767248e2 dts: arm: Add devicetree node for iProc PAXDMA
Add device tree node for iProc PAXDMA device.

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2021-01-18 16:58:55 -05:00
Abhishek Shah c382376bdf dts: arm: viper: Add tx/rx pl330 channels for iProc PCIe node
Add tx/rx pl330 channel IDs for the iProc PCIe client usage.
pl330 channel 0 is allocated for Tx DMA (Device to Host write) and
pl330 channel 1 is allocated for Rx DMA (Host to Device read).

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-12-01 14:56:59 -05:00
Abhishek Shah 90ef53e0a0 dts: arm: viper: m7: Add PVM interrupts for pcie node
MSI-X PVM feature requires snoop interrupt for tracking configuration
space register (msix_cap) update and PCIe PMON lite interrupt for
tracking MSI-X table update. Add both the interrupts for Viper M7 DT.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-10-22 11:07:39 +02:00
Abhishek Shah 39722412ff dts: arm: viper: m7: Add reset interrupts for pcie node
Add reset interrupts for pcie node in Viper M7 DT.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-10-22 11:07:39 +02:00
Kumar Gala 38cd37f726 dts: remove incorrect use of mmio-sram compatible
For memory that is truly device_type = "memory" we should not have a
mmio-sram compatible.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-07-28 07:31:01 -05:00
Raveendra Padasalagi 1f3b8c0267 dts: arm: Add devicetree node for pl330 dma
Add device tree node for arm pl330 dma.

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2020-07-24 11:54:31 +02:00
Abhishek Shah a8a5242249 dts: arm: viper: Add DT node for iProc PCIe EP
dts: arm: Add iProc PCIe EP node in Viper DT

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Signed-off-by: Shivaraj Shetty <shivaraj.shetty@broadcom.com>
2020-06-13 01:35:19 -07:00
Abhishek Shah f156057b20 dts: arm: Fix incorrect interrupt cells order
In aarch64 DTs, priority and flags cells have been swapped,
fix the same.

Correct interrupt property per the GIC binding document
looks like:
interrupts = <irq_type irq_num irq_flags irq_priority>;

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-05-21 13:56:00 +02:00
Arjun Jyothi d18ae2e9fb soc: arm: Add Broadcom Viper SoC support
Add initial support for Broadcom Viper SoC.
It has ARM Cortex-M7 and Cortex-A72 cores.

Signed-off-by: Arjun Jyothi <arjun.jyothi@broadcom.com>
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-05-08 10:46:23 +02:00
Scott Branden 54ce0b2d34 arm: Add Broadcom Valkyrie SoC support
Add initial support for Broadcom Valkyrie SoC as part of Zephyr.

Signed-off-by: Scott Branden <scott.branden@broadcom.com>
2020-01-30 03:54:01 -06:00