Enables setting the initialization priority of the nPM1300 independently
from other MFDs.
Signed-off-by: Bernt Johan Damslora <Bernt.Damslora@nordicsemi.no>
Enables setting the initialization priority of the nPM6001 independently
from other MFDs.
Signed-off-by: Bernt Johan Damslora <Bernt.Damslora@nordicsemi.no>
Added initial version of Infineon AIROC WIFI driver
Added initial version of binding file for Infineon AIROC WIFI
driver
Rename CONFIG_ABSTRACTION_RTOS_COMPONENT_ZEPHYR to
CONFIG_USE_INFINEON_ABSTRACTION_RTOS
Exclude cy8cproto_062_4343w platform from
drivers.modem.esp_at.build test
Change revision hal_infineon to
69c883d3bd9fac8a18dd8384624b8c472a68d06f
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Added initial version of Infineon CAT1 SDHC/SDIO driver
Added initial version of binding file for Infineon CAT1 SDHC/SDIO
driver
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
With CSL enabled, when nrf5_stop is called,
nrf_802154_sleep_if_idle() will be called, and if the radio is
busy with another task, another IEEE802154_EVENT_RX_OFF event
will be pended right away, resulting in another call
to nrf5_stop(), effectively busy waiting until the
radio has reached idle.
In simulation, this whole operation (busy wait loop) is
done without letting the CPU sleep, in an infinite loop,
and therefore without letting any time pass
(note that in the POSIX architecture,
no time passes if the CPU does not go to sleep).
And therefore the radio will never be done with whatever
it is doing, resulting in the simulation being stuck
in this loop.
Let's add a very minor delay to this loop, which is
conditionally compiled only for the POSIX architecture.
Which effectively mimics the time it takes for the CPU
to loop thru, let's time pass, and allows the radio
to eventually be done.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
MDIO is currently initialized in the ETH NXP S32 NETC
driver for Physical Station Interface (PSI), so do not
try to build the MDIO driver if the ETH driver is not built
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
There is no require to prevent building nxp s32 netc
shim driver if NET_TEST is set, so just remove this
unnecessary dependency
Fix#64944
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Add a property for I2C channel switch selection. This property will
write to the SMBxxCHS register according to the I2C node you selected,
which can make channel swapping.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Note that for some peripheral instances is needed to redefine the
HAL macros of the peripheral base address, since the naming is not
uniform for all instances.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Added boot state detection, so that the reference count is
set correctly and enable/disable work as expected.
With this fix it is no longer necessary to set
regulator-boot-on when the regulator is enabled in hardware.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Care must be taken to avoid any flash access while programming the flash
attached to the FlexSPI either via executing XIP code or reading RO data.
Remove locations where a constant device pointer might be dereferenced
within the mcux_flexspi_nor driver, to help avoid RWW hazards.
Fixes#64702
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use MDK directly instead of via USBD HAL to not mix direct register
accesses with USBD HAL. In my opinion this change is not really
necessary but reviewers are strict about consistency.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
There is no point in setting the feeder or consumer at runtime. The time
saved due to not checking conditions on each transaction is smaller than
the additional cost of calling function via pointer.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Do not enable nor disable endpoint done interrupts at runtime because it
is not necessary. Simply keep all relevant interrupts enabled when USBD
is active and disable all interrupts when USBD is disabled.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Ensure strict order within interrupt processing to eliminate workaround
in IN transfer acknowledged handler. EPDATASTATUS and DMA done events
are processed in a way that eliminates the possibility for race condions
between interrupt handler and host IN tokens.
Store last started DMA endpoint and use it in common handler for all DMA
finished events. Unify use of ep dma waiting variable because atomics
only make sense if all accesses are through atomic functions - here the
accesses are guarded with critical section.
Do not disable SETUP interrupt when DMA transfers data on endpoint 0 but
simply postpone handling if currently active DMA is on endpoint 0.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
There is no point in calling an empty function on every single DMA
transfer start. While the empty function is just BX LR the fact that is
is called on every DMA transfer makes its impact visible. This change
improves CDC ACM echo throughput by approximately 2%.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Early DMA process handling actually decreases performance in real world
scenarios because real world scenarios tend to be CPU bound. Moreover
the actual optimization is questionable because DMA semaphore can only
be released after the respective endpoint end event is handled. Remove
early DMA processing altogether and only check pending DMA at the end of
interrupt handler.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Rely on semaphore to serialize access to DMA instead of busy looping
after triggering DMA. With this change Ozone Code Profile generated with
J-Trace Pro on nrf52840dk_nrf52840 board running headphones microphone
sample shows following Load changes (trace data was reset once playback
and recording started and percentages were taken when memcpy reached
200 000 Run Count):
* usbd_dmareq_process() from 17.16% to 2.24%
* memcpy() from 9.37% to 8.36%
* nrf_usbd_common_irq_handler() from 8.89% to 10.88%
Mark nrf_usbd_common_stop() as static because the caller must acquire
DMA semaphore before calling this function and the only place where it
is used is already acquiring the semaphore.
Disable EP0 SETUP interrupt when there is active DMA on EP0 to eliminate
the need for aborting DMA on EP0. This code path should not really
happen in real life though because hosts must not issue new SETUP before
a relatively long timeout (at least 50 ms).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Rename local usbd copy from nrfx_usbd to nrf_usbd_common and use it in
both USB stacks. Renaming header to nrf_usbd_common.h allows breaking
changes in exposed interface. Mark all doxygen comments as internal
because local usbd copy should not be treated as public interface
because we are under refactoring process that aims to arrive at native
driver and therefore drop nrf_usbd_common in the future.
Use Zephyr constructs directly instead of nrfx glue macros.
No functional changes.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
One of the ARM architure files, defined since long ago
CONCAT having the exact same purpose as Zephyr's _CONCAT.
Unfortunately this header is included almost always
and the macro defined in all ARM based platforms,
which seems to have lead to many uses of this macro
instead of _CONCAT.
Fix it by using _CONCAT instead.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
If the gpio had pull previous enabled, but new config
request wants the pull disabled, the code was failing
to clear the previous pull setting.
Signed-off-by: Mike J. Chen <mjchen@google.com>
The ISR for CQ mode was unconditionally writing into the I2C message
buffer for all transfer types. The correct data was transferred on the
I2C interface, but the clobber caused CONFIG_I2C_LOG_LEVEL_DBG to
display incorrect data for I2C writes.
This change will also help performance of large I2C write transactions.
Signed-off-by: Keith Short <keithshort@google.com>
Some chips, that use Cortex-M SysTick as the system timer, disable a
clock in a low power mode, that is the input for the SysTick e.g.
STM32Fx family.
It blocks enabling power management for these chips. The wake-up
function doesn't work and the time measurement is lost.
Add an additional IDLE timer that handles these functionality when the
system is about to enter IDLE. It has to wake up the chip and update the
cycle counter by time not measured by the SysTick. The IDLE timer has to
support counter API (setting alarm and reading current value).
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics.
Note that for some peripheral instances is needed to define the
HAL macros of the peripheral base address because there are gaps
in the instances or there are SoCs with a single instance.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Fixes compile warning:
drivers/eeprom/eeprom_emulator.c:645:13:
warning: 'rc' may be used uninitialized [-Wmaybe-uninitialized]
645 | int rc;
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Fix settings for TEAR and DPHYCMD0 to match initialization data
provided by MCUX SDK driver. The following fixes were needed:
- Tear effect signal should only be sent at the VBLANK interval, so TEON
should be set to 0x0
- DPHYCMD0 LP-RX VHYS trimming was incorrectly being set to 37mV, when
it should be set to 66mV (the default value)
These changes resolve some flickering and blooming that occasionally
occurred during initialization
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit names a couple of choices to allow the default
value to be overridden by Kconfig files out of tree
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
Since the accelerometer's HM (high-performance mode) bit is forced to 1,
the 1.6Hz frequency is available by setting the ODR to 11.
1.6Hz is a low-power mode that conserves energy and is suitable for
some applications, such as determining the orientation (portrait or
landscape) of a device.
Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
Build errors where introduced by
c76d5b882c and are fixed with this
commit. They are trivial fixes of malformed lines.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Add in DT the possibility to configure both INT1 and INT2
pin. The driver will then assign one of the two (either 1
or 2, according to what value drdy_pin is set) to a gpio
for receiving drdy interrupts.
The other pin may be used in the future to receive event
interrupts.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The HCI receive path has a delay between reading the header and payload
from the controller to give the controller time to setup the SPI
peripheral for the next transaction. Add the same delay on the transmit
path for the same reasons.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add log output when the HCI interface is forced to retransmit a packet
because the controller is not ready.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
