Introduce a new RISCV_HAS_CLIC symbol for platforms using CLIC,
reorganize the Kconfigs and make the Nuclei ECLIC depending on the new
symbol.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The AIVECT (All Interrupt Vector Register) register provides us a quick
way to determine SOC interrupt number. But sometimes we get interrupt
number 0 from the register and caused assertion of unhandled interrupt.
To avoid the assertion, we look for all ISRs (Interrupt Status Register)
and IERs (Interrupt Enable Register) to find the highest priority pending
interrupt and return it to caller.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Stop relying on <soc.h> to access HAL APIs. Use generic, per-API headers
instead. Note that <soc.h> has been left as is for now, since ARM MPU
relies on a fragile chain of includes/type definitions.
This change should improve compilation efficiency, as we no longer pull
APIs that are not needed. A similar approach is followed by STM32
drivers.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Files including <zephyr/kernel.h> do not have to include
<zephyr/zephyr.h>, a shim to <zephyr/kernel.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Assembler files were not migrated with the new <zephyr/...> prefix.
Note that the conversion has been scripted, refer to #45388 for more
details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
We put disabling SOC interrupt enable register (IER) sequence in
between disable and enable core's global interrupt to prevent race
condition.
After core interrupt enable instruction has been executed, the new
configuration of IER has not yet been fully processed due to
asynchronization between core and SOC's source clock.
If SOC interrupt is fired under the above condition, we will get
IRQ number 0 in ISR due to IER disabling taken effect.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Current code uses per-core register to check interrupt status and
dispatch handlers. However to disable/enable the interrupt, core
zero register is always used.
While the handlers in _sw_isr_table are common for all cores,
the status bits should still be handled separate for each core.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The function in its current form is confusing because unlike other
similarly named functions (dt_nodelabel_has_prop(), dt_node_has_prop())
or devicetree macros (DT_NODE_HAS_COMPAT(), DT_NODE_HAS_PROP()), this
function takes into account the status of the checked node and returns
"y" only when the node is enabled.
This commit redefines dt_nodelabel_has_compat() so that it no longer
checks the node status, and for cases where the previous functionality
is needed, a new function named dt_nodelabel_enabled_with_compat()
is introduced as a replacement.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Don't leave idle state if soc isn't waked-up by an interrupt.
(We change to check interrupt controller register)
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Add get_msi_addr() callback to ITS API to retrieve the GITS_TRANSLATER
physical address to be set in the MSI message address field.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Using IRQ as source for interrupt values can
fail when installing irq_connect_dynamic, as
IRQ can previously be enabled. This updates
the logic to use source map and allows
default irq_enable() and irq_disable() to call
esp32c3 interrupt allocator implementation.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Re-running the script that checks for the const qualifier missing on
struct device ISR's parameter.
The script also changes the parameter 'arg' to 'dev' when relevant.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Refactors interrupt controller drivers to use the shared driver class
initialization priority configuration, CONFIG_INTC_INIT_PRIORITY, to
allow configuring interrupt controller drivers separately from other
devices. This is similar to other driver classes.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEFAULT to preserve
the existing default initialization priority for most drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
On 32bit compiler the BIT_MASK(32) generate a warning,
after discussion on #42226 and #42163, advise was to use
BIT64_MASK instead.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
These definitions are required to be able to use GICv3
interrupts controller on an ARMv8 AArch32 processor.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:
sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device instance can be obtained at compile time. Here
DEVICE_DT_GET_OR_NULL is used as the following code seems to accept a
NULL condition, meaning instance is optional.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some drivers explicitely casted data/config from void * to the
corresponding type. However, this is unnecessary and, in many drivers it
has been misused to drop const qualifier (refer to previous commits).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to align with macros used to obtain a device reference (e.g.
DEVICE_DT_GET), align the PM macros to use "GET" instead of "REF". This
change should have low impact since no official release has gone out yet
with the "REF" macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The gd32_exti_isr function may be unused if the GPIO driver is not
enabled but EXTI is (no IRQ will connect to it). This may be improved in
the future by requiring explicit enablement of the exti DT node.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Theoretically, source id check is not mandatory in the context we use
VT-D here (i.e. non VM one, just multi-vector MSI support)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Not sure this is requered as we do not mangle with domains, but let's
make sure this cache is clear.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
A surprising issue: while sys_set_bit() on VTD_GCMD_REG work on
apollo_lake, it seems to create border effect on elkhart_lake: it may
reset some previous bit to 0.
So switching to full write of the register at once, which works for
both.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
VT-D will only be enabled if MSI multi-vector will also be requested,
on x86_64, for all boards BUT QEMU ones.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no point to enable VT-D if PCIE MSI multi-vector support is not
requested, as VT-D is uniquely being used to remap MSI multi-vector
based interrupts.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Those MMIO registers might be mapped in RAM and thus it's
really important to keep storage space for such mapping.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
QI operation are not supposed to last forever.
It's not an actual timeout based on clock, but a dummy counter instead.
That's because system clock might not have beed initialized yet, since
VT-D's init comes first (and that same init will use QI...)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Depending on a VT-D capability, it might be necessary to flush objects
from the cache.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
