Add support for setting the target mode for a PMIC regulator. Some
regulators support multiple modes, each with distinctive voltage and
current configuration data. This function allows the consumer to switch
the PMIC into a new mode. The PMIC can then be configured to use a new
set of voltages.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update regulator binding definitions for PCA9420 to support mode setting
features. This will allow the 4 voltage modes present on the PCA9420 PMIC
to be utilized.
Note that bindings have also been updated to indicate the default
register value and target voltage for each regulator on the PCA9420.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add mode selection properties for regulator-pmic compatible. These
mode selection properties will be used with regulators that support
multiple modes, with each mode enabling specific voltage and current
limits.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move I2C register reads to regulator_read_register in regulator driver,
to enable better abstraction of regulator I2C reads
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Refactor binding to use root PMIC IC, so that properties can be shared
between regulator devices. Each individual regulator output is still
created as an individual device, since the regulator API aligns with
these devices better than the PMIC IC itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The code was missing #include <zephyr/kernel.h> which
caused a compilation error. Missing header has been added.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Some minor housekeeping prior to adding an http server
implementation. There are already a number of http headers
and that number will likely increase with subsequent work.
Moving them into a common directory cleans up the
`include/net` directory a bit.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Add a script to extract HTTP status values and format them
in a way that is both human readable and machine parseable.
Each line of output is of the form:
```
HTTP_{key}_{upper_val} = {key}, /**< val */
```
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Previously, HTTP method enumerations were only defined within
the `http_parser.h`, which may not be ideal for all use cases.
This commit moves the `enum http_method` definition to a
dedicated header in a dedicated `http` subdirectory.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
The can_set_timing_data() API function is optional and is not supported by
all CAN controller drivers.
On a board with only either classic CAN or CAN-FD capable controllers the
current behavior is fine, but on boards with a mix of classic CAN and
CAN-FD capable controllers/drivers, calling can_set_timing_data() on a
classic CAN controller will lead to a NULL pointer dereference.
To ensure a proper behavior when calling can_set_timing_data() on classic
CAN controller drivers, change the API wrapper function to return -ENOSYS
if the CAN driver does not implement CAN-FD support.
Note that the data phase timing calculation functions are fine as-is, as
the timing calculations will fail due to minimum/maximum data phase timing
parameters being all zeros for drivers only supporting classic CAN.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Changes in device_service have triggered MISRA 5.7 violation CI error
(Tag name should be unique). Renamed shell to sh, same as some other
modules.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
All init entries are already prepended with `__init_`, there's no point
in pre-pending 2 prefixes.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use the `init_id`, in line with recent device changes, as the argument
is being used as a unique identifier.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Create a sys_init entry, as init API is not strictly related to the
device model (device model re-uses it)
- Hide internals (Z_*) from public API docs.
- Give overview within the group definition of allowed levels, meaning,
etc.
- Properly document struct init_entry.
- Multiple style issues
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The _SYS_INIT_LEVEL* definitions were used to indicate the index entry
into the levels array defined in init.c (z_sys_init_run_level). init.c
uses this information internally, so there is no point in exposing this
in a public header. It has been replaced with an enum inside init.c. The
device shell was re-using the same defines to index its own array. This
is a fragile design, the shell needs to be responsible of its own data
indexing. A similar situation happened with some unit tests.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The function in charge of calling all init function was defined in
device.c, had a public prototype and was just used in init.c. Since this
is really an internal function tied to Kernel init code, move it to
init.c and make it static, there's no need to expose it publicly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Propagate vendor specific events that are not handled by the SPI driver
up the host stack, so that `bt_hci_register_vnd_evt_cb` can work
correctly.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
For 32 bit processor to read the 64 bits hpet counter, the HPET spec
2.4.7 suggest to read HPET counter high and low then checking the
high bits to decide if it rollovers or not.
But this logic seems to cause problem for 64 bits processor under SMP,
there is a possible one tick earier under tickless mode. It is likely
to be the cache coherence issue, because a mfence instruction before
reading the timer works.
So we change to read the 64 bits counter by sys_read64 on 64bit
processor to prevent this issue.
Fixes#49611
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
Now that VMPIDR_EL2 will be initialized in z_arm64_el2_init, the code
that I wrote for initializing VMPIDR_EL2 on fvp_baser_aemv8r can be
removed.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
This is a follow up to commit bb86f8b967.
Also custom IEEE 802.15.4 based L2 implementations may need to use
packet handling without the IP layer. Add support for such cases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
By using CONFIG_LWM2M_VERSION_1_0, the function
lwm2m_engine_get_binding() returns the binding
and the queue mode bytes. Therefore the buffer
must be tree bytes long.
The issue is caused by the two inconsistent defines:
lwm2m_registry.c:
#define BINDING_OPT_MAX_LEN 3 /* "UQ" */
lwm2m_rd_client.c:
#define CLIENT_BINDING_LEN sizeof("U")
Signed-off-by: Peter Tönz <peter.tonz@husqvarnagroup.com>
Attempting to access the Binding.description property
when the description is unavailable would raise KeyError: 'description'.
Known bindings that won't define a 'description' key in the
Binding.raw dictionary include the 'compatible' property's binding
of nodes such as /, /soc, /leds or /pwmleds.
Note that this may also occur when a proper YAML
binding file is available (e.g. pwmleds.yaml).
This patch simply substitutes the Binding.raw dictionary indexing
with the get() function: will return None and not raise KeyError.
Signed-off-by: Chris Duf <chris@openmarl.org>
The `ARCH` init level was added to solve a specific problem, call init
code (SYS_INIT/devices) before `z_cstart` in the `intel_adsp` platform.
The documentation claims it runs before `z_cstart`, but this is only
true if the SoC/arch takes care of calling:
```c
z_sys_init_run_level(_SYS_INIT_LEVEL_ARCH);
```
Which is only true for `intel_adsp` nowadays. So in practice, we now
have a platform specific init level. This patch proposes to do things in
a slightly different way. First, level name is renamed to `EARLY`, to
emphasize it runs in the early stage of the boot process. Then, it is
handled by the Kernel (inside `z_cstart()` before calling
`arch_kernel_init()`). This means that any platform can now use this
level. For `intel_adsp`, there should be no changes, other than
`gcov_static_init()` will be called before (I assume this will allow to
obtain coverage for code called in EARLY?).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Enable the statistics subsystem shell by default if both statistics and
shell are enabled.
Have the statistics shell imply enabling named statistics as this takes out
a lot of guesswork regarding which statistics counter is which.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Previously, the build was failing due to implicit declaration
of `IRQ_CONNECT`. Simply include `<zephyr/irq.h>` to fix.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
MTL is just one platform and this code is going to be used in multiple
platforms currently under development, so reduce the confusion and move
to a common namespace.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
File still not being removed due to out-of-tree usage. We will drop it
once the external code has stopped referencing it.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Split the defines based on domain and cleanup ace_v1x-regs.h so we can
finally remove it and stop include soc specific headers across the tree.
Future generations of this family will be able to use the same naming
scheme without having to use the version name in the file name.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert timer driver to use a light weight syscon and DTS and convert
register information to use offsets and sys_read/sys_write instead of
structs.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we have shim defined for each platform, no need to support all
platforms within the same struct. This change exposes some bugs where we
were relying on the old structure and calling into unused register space
for example for SRAM initialization on some SoC generations.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Cleanup soc.h and move interrupt defines into own headers. Rename some
of the defines for ACE to have a unified namespace.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The DW register block was duplicated into the ACE header while we had
the same thing in the driver. Move everything to the driver as the first
step with further improvements planned on top of this.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
