Introduce the basic ARM64 architecture support.
A new CONFIG_ARM64 symbol is introduced for the new architecture and new
cmake / Kconfig files are added to switch between ARM and ARM64.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
ARM cores may have a per-core architected timer, which provides per-cpu
timers, attached to a GIC to deliver its per-processor interrupts via
PPIs. This is the most common case supported by QEMU in the virt
platform.
This patch introduces support for this timer abstracting the way the
timer registers are actually accessed. This is needed because different
architectures (for example ARMv7-R vs ARMv8-A) use different registers
and even the same architecture (ARMv8-A) can actually use different
timers (ELx physical timers vs ELx virtual timers).
So we introduce the common driver here but the actual SoC / architecture
/ board must provide the three helpers (arm_arch_timer_set_compare(),
arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file
imported through the arch/cpu.h header file.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The Silicon Labs EFM32 Jade Gecko MCU includes:
* Cortex-M3 core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* multiple low power peripherals
This is basically the same as the EFM32 Pearl Gecko, but with an ARM
Cortex-M3 core instead of a Cortex-M4F.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
There are various situations where it's necessary to support turning
devices on or off at runtime, includin power rails, clocks, other
peripherals, and binary device power management. The complexity of
properly managing multiple consumers of a device in a multithreaded
system suggests that a shared implementation is desirable. This
commit provides an API that supports managing on-off resources.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This commit adds initial support for the Silicon Labs EFM32
Giant Gecko GG11 StarterKit.
Features supported for now are NVIC, SysTick, GPIO, Flash,
Counter, I2C, UART and Ethernet. Support for Watchdog and
ADC will follow as soon as their respective PRs are merged.
Signed-off-by: Oane Kingma <o.kingma@interay.com>
Add support for storing the CANopen object dictionary to non-volatile
storage.
This fixes#15278.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a Zephyr driver and abstraction layer for use by the 3rd party
CANopenNode module.
CANopenNode depends on the CO_driver.h file for platform-specific type
definitions, locking primitives, and CAN bus driver API.
This fixes#15278.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move LVGL sample from samples/gui/lvgl to samples/display/lvgl to have
a unified location for display related samples.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
As of January 2020, David is no longer working on the Zephyr
documentation, so he should not be automatically added as reviewer.
I've commented out rather than removed the lines so when a replacement
is found, the lines can easily be added back.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Add driver for the Texas Instruments LMP90xxx series of multi-channel,
low-power 16-/24-bit sensor analog frontends (AFEs).
The functionality is split into two drivers; an ADC driver and a GPIO
driver.
Tested with LMP90080 and LMP90100.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
PWM driver for LiteX SoC builder was created.
Because LiteX supports only one channel for each PWM device,
an appropriate restriction was made.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This adds I2C bitbang driver for LiteX SoC builder with its bindings.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This adds PRBS ranom number generator driver for
LiteX SoC builder with its bindings.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This adds support for the EC (embedded controller) on a Google
reference board with codename "kukui". This board uses the STM32F098RC
chip. We built an application for the board and verified UART
functionality on the board.
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.
There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Pattern being <domain>_<model>.<c/h>.
Here interrupt_controller as a domain would be far too long so
shortening it to "intc", as DTS does actually.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
wdt_install_timeout() was skipped as it installs an ISR-context
callback handler function. The rest are simple wrappers.
Added myself as the maintainer of the syscall handlers. WDT
subsystem appears to not currently have an owner.
Fixes: #21432
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
net/lib/config/ is important generic part of the network stack, and
should be reviewed by the same people as net/lib/. (Besides, I
originally factored out this lib in the first place.)
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Added leak suppression, by implementing __lsan_default_suppressions
function, for SDL2 and X11 library which are used by the SDL display
driver.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
gen_syscall_header.py is not longer necessary, it was just creating a
file including syscall.h. This header is now included directly by
gen_syscalls.py.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Szymon was removed from all Bluetooth paths a while ago, and this is
simply an overlooked leftover.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
/lib/libc/ was listed twice in the file
The first entry was overriden by the 2nd
And so was the case for
/samples/bluetooth/
In this second case, the override lost a user, so add it
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
There were two conflicting entries for sensor samples, which resulted in
the wrong person getting assigned as a reviewer.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add API for accessing Electrically Erasable Programmable Read-Only
Memory (EEPROM) devices.
EEPROMs have an erase block size of 1 byte, a long lifetime, and allows
overwriting data on byte-by-byte access.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This adds supoprt for the Atmel SAME54 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Add myself to owner of subsys/logging/log_backend_net.c so
that if there are changes to that file, I get notified.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4
series stm32.
Notice due to some bugs, this is currently not working with f7.
There are two kinds of IP blocks are used across these stm32, one is the
one that has been used on F2/F4/F7 series, and the other one is the one
that has been used on F0/F1/F3/L0/L4 series.
Memory to memory transfer is only supported on the second DMA on
F2/F4 with 'st,mem2mem' to be declared in dts.
This driver depends on k_malloc to allocate memory for stream instances,
so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them.
Common parts of the driver are in dma_stm32.c and SoC related parts are
implemented in dma_stm32_v*.c.
This driver has been tested on multiple nucleo boards, including
NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the
loop_transfer and chan_blen_transfer test cases.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Add shell commands for setting PWM period and duty cycle (in cycles,
microseconds, or nanoseconds).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
1) Add cryptographically secure random functions to provide
FIPS 140-2 compliant random functions.
2) Add name to random function choice selectors to ease
selection in SOC .defconfig files
3) Add bulk fill random functions.
Signed-off-by: David Leach <david.leach@nxp.com>
Add SPI driver and bindings for LPSPI peripheral for the RV32M1 SOC.
Based heavily on the existing mcux LPSPI driver.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
Not a top-level zephyr core API and tied to third party environment, so
move it to where the code is in lib/updatehub.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
There are two set of code supporting x86_64: x86_64 using x32 ABI,
and x86 long mode, and this consolidates both into one x86_64
architecture and SoC supporting truly 64-bit mode.
() Removes the x86_64:x32 architecture and SoC, and replaces
them with the existing x86 long mode arch and SoC.
() Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64.
() Updates samples and tests to remove reference to
qemu_x86_long.
() Renames CONFIG_X86_LONGMODE to CONFIG_X86_64.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Charles Youse (@gnuless) has left the organization. I will be
taking over most of his areas of ownership, with Daniel minding
the DW I2C driver.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Script to be used when creating a release. For regular releases this can
be called this way:
$ list_issues.py -f issues.md -s 2019-09-01
Will list all closed issues since september 1st, 2019 and will create a
markdown file with all issues that can be added as is to the release
notes.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The valgrind suppression file did not have an owner
That file is only usefull for POSIX arch based boards
=> Adding myself as owner of the file
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Reimplementation of clock control driver for nrf platform. It includes
latest API changes: asynchronous starting and getting clock status.
Additionally, it implements calibration algorithm which optionally
skips calibration based on no temperature change. Internal temperature
sensor is used for that.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The SensorTile.box is a board designed for IoT applications
embedding a wide range of intelligent low power MEMS sensors,
a STM32L4 microcontroller to manage sensor configuration and
process sensor output data, a micro-USB battery charging
interface and an ST Bluetooth Low Energy module for wireless
communication with a BLE-enabled smartphone.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
* add pinmux driver. hsdk board has arduino, mikrobus and
pmod interfaces, which can be confiured for different function,
such as: gpio, spi, uart, iic.
* add introduction for arduino, mikrobus and pmod interfaces.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
This has been subsumed by the new implementation in drivers/pcie.
We remove the legacy subsystem, related tests, shell module, and
outdated documentation/config references.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Confirms build (and run) of C++17 applications that make use of STL
containers and other features.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add a dedicated entry for Bluetooth Mesh, and include Trond from
Nordic as an owner, since he will be actively participating in
maintaining & developing the code.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This commit adds support for the Zynq UltraScale+ MPSoC as a qemu based
platform for Cortex-R based testing. This SoC only supports an
interrupt controller and serial port for limited testing.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
This commit is an implementation of 6LoCAN, a 6Lo adaption layer for
Controller Area Networks. 6LoCAN is not yet standardised.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Removes very complex boot-time generation of page tables
with a much simpler runtime generation of them at bootup.
For those x86 boards that enable the MMU in the defconfig,
set the number of page pool pages appropriately.
The MMU_RUNTIME_* flags have been removed. They were an
artifact of the old page table generation and did not
correspond to any hardware state.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
littlefs is a fail-safe filesystem from ARM Mbed that has wear-leveling
capabilities.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Signed-off-by: Jim Paris <jim@bolt.io>
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.
Redirects for the web documentation are also included.
Then zephyrbot complained about this:
"
New files added that are not covered in CODEOWNERS:
dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi
Please add one or more entries in the CODEOWNERS file to cover
those files
"
So I assigned them to those who created them. Feel free to readjust
as necessary.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add support for virtual UART device that uses Segger RTT channels
for data transfers. Due to the RTT principle, this driver supports
only polling API.
Signed-off-by: Pavel Kral <pavel.kral@omsquare.com>
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add a new DTS/binding parser to scripts/dts/ for generating
generated_dts_board.conf and generated_dts_board_unfixed.h.
The old code is kept to generate some deprecated defines, using the
--deprecated-only flag. It will be removed later.
The new parser is implemented in three files in scripts/dts/:
dtlib.py:
A low-level .dts parsing library. This is similar to devicetree.py in
the old code, but is a general robust DTS parser that doesn't rely on
preprocessing.
edtlib.py (e for extended):
A library built on top of dtlib.py that brings together data from DTS
files and bindings and creates Device instances with all the data for
a device.
gen_defines.py:
A script that uses edtlib.py to generate generated_dts_board.conf and
generated_dts_board_unfixed.h. Corresponds to extract_dts_includes.py
and the files in extract/ in the old code.
testdtlib.py:
Test suite for dtlib.py. Can be run directly as a script.
testedtlib.py (uses test.dts and test-bindings/):
Test suite for edtlib.py. Can be run directly as a script.
The test suites will be run automatically in CI.
The new code turns some things that were warnings (or not checked) in
the old code into errors, like missing properties that are specified
with 'category: required' in the binding for the node.
The code includes lots of documentation and tries to give helpful error
messages instead of Python errors.
Co-authored-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This API defines following call for eSPI bus drivers
- espi_set_config
- espi_get_channel_status
- espi_send_read_request
- espi_send_write_request
- espi_send_vwire
- espi_receive_vwire
- espi_send_oob
- espi_receive_oob
- espi_flash_read
- espi_flash_write
- espi_flash_erase
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
The name disk_access_sdhc.c is ambiguous,
actually this driver depends on SPI,
rename this file.
In addition, move the generic sdhc stuff from C file
to head file for other sdhc drivers to use.
1) disk_access_sdhc.c->disk_access_spi_sdhc.c.
2) create .h and move sdhc specifications from .c to .h.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
Provide two basic example samples to test the x-nucleo-iks01a3 shield:
- Standard (Mode 1)
- SensorHub (Mode 2)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
A comma was added to a new path in
9dbdd81abe
But GitHub's CODEOWNERS parsing cannot handle commas in paths
=> Remove it
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Add support to STM LPS22HH pressure and temperature sensor.
The driver support I2C and SPI bus communication and both
polling and drdy trigger mode.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Making room for the Intel64 subarch in this tree. This header is
32-bit specific and so it's relocated, and references rewritten
to find it in its new location.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The existing local APIC timer driver (loapic_timer.c) has bitrotted
and doesn't support TICKLESS_KERNEL, which is the preferred mode of
operation. This patch introduces a completely new driver, called
the APIC timer driver - the name is changed to allow the drivers to
continue to coexist in the short term, and also because "APIC timer"
isn't ambiguous (the I/O APICs do not have timers).
This driver makes no attempt to work with the MVIC timer as the
previous version did, because MVIC support is deprecated.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add board support for 96Boards Avenger96 board from Arrow Electronics
based on STM32MP157A MPU from ST Microelectronics. This board is one
of the consumer editions boards of the 96Boards family following the
Extented CE form factor. More information about this board can be found
in 96Boards website: https://www.96boards.org/product/avenger96/
By default Zephyr console output is available via RAM console, but it
can also be changed to UART7 exposed as UART0 on 40 pin LS header.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
The Quark D2000 is the only x86 with an MVIC, and since support for
it has been dropped, the interrupt controller is orphaned. Removed.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Removed Quark D2000 SoC files and first-order related DT bindings.
A few config options have been moved from the CONFIG_* space to
the DT_* space, as they were defined in the D2000 Kconfig files
and "leaked" into the other Quark trees.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
split ext/hal/st into two modules:
- hal_stm32: For the code meant to run on STM32
- hal_st: For the code meant to drive ST components
Fixes#16316
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add board suppor for 96Boards Meerkat96 board from Novtech based on
NXP i.MX7 multi core processor. Zephyr is ported to run on the single
core Cortex-M co-processor on this board.
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/imx7-96/
By default Zephyr console output is available via UART1 available at
the 40pin LS connector.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Create source directory for IA32-subarch specific files, and move
qualifying files to that subdirectory.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Clarify the last matching rule, as it is not too intuitive
(developers may have expected that all matching regexes would
be added as code owners)
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Due to driver refactoring there is no more match to *stm32f4*.
Also, it seems that @rsalveti and @idlethread are not more
actively contributing to zephyr, so this change should not be
a concern.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
A basic display driver is added for a generic 32-bpp framebuffer.
Glue logic is added to the x86 arch to request the intitialization
of a linear framebuffer by the Multiboot loader (GRUB) and connect
it to this generic driver.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
When booting using GRUB, some useful information about the environment
is given to us via a boot information structure. We've not made any
use of this information so far, but the x86 framebuffer driver will.
A skeletal definition of the structure is given, and provisions are
made to preserve its contents at boot if the configuration requires it.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
UpdateHub is an enterprise-grade solution which makes simple to
remotely update all your embedded devices in the field. It
handles all aspects related to sending Firmware Over-the-Air(FOTA)
updates with maximum security and efficiency, while you focus in
adding value to your product.
Signed-off-by: Christian Tavares <christian.tavares@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Due to in-tree dependencies on Kconfig options defined in modules we end
up having warnings and errors when those modules are not part of the
manifest.
Users should be able to remove unwanted modules from their downstream
manifest and still build any board configurations.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This is a graphical configuration interface written in Tkinter. Like
menuconfig.py, it supports showing all symbols (with invisible symbols
in red) and jumping directly to symbols. Symbol values can also be
changed directly from the jump-to dialog.
This interface should feel a lot smoother than menuconfig.py on Windows.
When single-menu mode is enabled, a single menu is shown at a time, like
in the terminal menuconfig. Only this mode distinguishes between symbols
defined with 'config' and symbols defined with 'menuconfig'.
Compatible with both Python 2 and Python 3. Has been tested on X11,
Windows, and macOS.
To avoid having to carry around a bunch of GIFs, the image data is
embedded in guiconfig.py. To use separate GIF files instead, change
_USE_EMBEDDED_IMAGES to False. The image files can be found in
https://github.com/ulfalizer/Kconfiglib/tree/screenshots/guiconfig.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
MHU (Message Handling Unit) enables software to raise interrupts to
the processor cores. It is enabled in SSE 200 subsystems.
This patch aims to implement inter processor communication.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
Add LiteX with softcore CPU VexRiscV SoC definitions and default
configurations.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
