Tim Lin f2c42663b4 ITE: drivers/i2c: I2C driver divided into two compatibles ... As mentioned in #42882, the I2C of IT8XXX2 is designed for two different IP blocks, so this PR divides this I2C driver into two compatibles. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>		2022-03-17 15:53:34 -05:00
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espressif	drivers: wdt: esp32: code refactor to use hal calls	2022-02-21 19:40:17 -05:00
gigadevice	dts: i2c: introduce gd32 i2c interface	2022-01-14 10:42:24 -06:00
starfive	boards: risc-v: add BeagleV Starlight JH7100 board support	2021-06-22 08:45:00 -04:00
andes_v5_ae350.dtsi	dts: riscv: add DTS and related bindings of andes_ae350 soc	2021-08-30 13:40:14 -04:00
it8xxx2-alts-map.dtsi	ITE: drivers/adc: implement ADC channels 13-16	2022-03-04 09:03:04 -06:00
it8xxx2.dtsi	ITE: drivers/i2c: I2C driver divided into two compatibles	2022-03-17 15:53:34 -05:00
microsemi-miv.dtsi	dts: bindings: add IRQ priority support for SiFive PLIC	2021-01-14 12:43:58 -06:00
neorv32.dtsi	dts: riscv: neorv32: add trng devicetree node	2021-10-26 17:53:15 -04:00
riscv32-fe310.dtsi	samples: userspace: fix syscall_perf test cannot be run	2022-01-04 15:51:43 -05:00
riscv32-litex-vexriscv.dtsi	dts: riscv32-litex-vexriscv.dtsi: drop 'spinalhdl' compatible	2021-08-17 17:51:57 -04:00
riscv64-fu540.dtsi	boards: riscv: hifive_unleashed: add GPIO support	2022-02-21 20:46:47 -05:00
riscv64-fu740.dtsi	dts: riscv: fix irq number of UART and SPI for SiFive FU740	2021-09-18 09:15:15 -04:00
rv32m1.dtsi	riscv: rv32m1: Rework device_get_binding for pinmux	2021-02-15 08:32:41 -05:00
rv32m1_ri5cy.dtsi	soc: riscv: openisa_rv32m1: Convert from Kconfig to DT_NODELABEL	2020-04-10 14:38:04 -05:00
rv32m1_zero_riscy.dtsi	soc: riscv: openisa_rv32m1: Convert from Kconfig to DT_NODELABEL	2020-04-10 14:38:04 -05:00
telink_b91.dtsi	dts: riscv: telink_b91: replace pinmux by pinctrl	2022-02-21 19:41:44 -05:00
virt.dtsi	soc/riscv: add the QEMU "RISC-V VirtIO board"	2021-01-15 13:06:33 -05:00