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zephyr/dts/bindings/cpu
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Filip Kokosinski b5859ece4d dts/riscv/microchip: add missing cpu nodes compats in mpfs.dtsi 
The cores used in the `mpfs.dtsi` file are:
* 1x SiFive E51 (RV32)
* 4x SiFive U54 (RV64)

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-01-31 10:41:49 +01:00
..
altr,nios2f.yaml yamllint: indentation: fix dts/bindings/ 2023-01-04 14:23:53 +01:00
arm,cortex-a53.yaml dts: bindings: cpu: fix up multi-line strings 2021-06-14 21:49:57 -04:00
arm,cortex-a55.yaml dts: binding: add cortex-a55 dts binding 2022-12-20 09:22:40 +01:00
arm,cortex-a72.yaml dts: bindings: cpu: fix up multi-line strings 2021-06-14 21:49:57 -04:00
arm,cortex-a76.yaml dts: arm64: Add device tree for Intel SoCFPGA Agilex5 platform 2023-07-25 16:58:01 +00:00
arm,cortex-m.yaml log: swo: enable pin control support for swo log backend 2022-06-28 16:02:09 -05:00
arm,cortex-m0+.yaml dts: bindings: Remove 'title:' and put all info. into 'description:' 2019-12-18 11:52:45 +01:00
arm,cortex-m0.yaml dts: bindings: Remove 'title:' and put all info. into 'description:' 2019-12-18 11:52:45 +01:00
arm,cortex-m1.yaml dts: bindings: cpu: Add cortex-m common properties 2021-03-15 10:23:10 +01:00
arm,cortex-m3.yaml dts: bindings: cpu: Add cortex-m common properties 2021-03-15 10:23:10 +01:00
arm,cortex-m4.yaml dts: bindings: cpu: Add cortex-m common properties 2021-03-15 10:23:10 +01:00
arm,cortex-m4f.yaml dts: bindings: cpu: Add cortex-m common properties 2021-03-15 10:23:10 +01:00
arm,cortex-m7.yaml dts: bindings: cpu: Add cortex-m common properties 2021-03-15 10:23:10 +01:00
arm,cortex-m23.yaml dts: bindings: cpu: Add cortex-m common properties 2021-03-15 10:23:10 +01:00
arm,cortex-m33.yaml dts: bindings: cpu: Add cortex-m common properties 2021-03-15 10:23:10 +01:00
arm,cortex-m33f.yaml dts: bindings: cpu: Add cortex-m common properties 2021-03-15 10:23:10 +01:00
arm,cortex-r4.yaml dts: bindings: Remove 'title:' and put all info. into 'description:' 2019-12-18 11:52:45 +01:00
arm,cortex-r4f.yaml dts: bindings: Remove 'title:' and put all info. into 'description:' 2019-12-18 11:52:45 +01:00
arm,cortex-r5.yaml dts: bindings: Remove 'title:' and put all info. into 'description:' 2019-12-18 11:52:45 +01:00
arm,cortex-r5f.yaml dts: bindings: Remove 'title:' and put all info. into 'description:' 2019-12-18 11:52:45 +01:00
arm,cortex-r7.yaml dts: bindings: Add CPU device bindings for Cortex-R7. 2021-01-13 15:04:43 +01:00
arm,cortex-r52.yaml arch: arm: Add support for Cortex-R52 2022-03-11 10:59:48 +01:00
arm,cortex-r82.yaml dts: bindings: cpu: fix up multi-line strings 2021-06-14 21:49:57 -04:00
cdns,tensilica-xtensa-lx3.yaml dts: cpu: add cdns,tensilica-xtensa-lx3 2023-08-26 16:50:40 -04:00
cdns,tensilica-xtensa-lx4.yaml dts: bindings: fix file names 2021-10-20 07:33:04 -04:00
cdns,tensilica-xtensa-lx6.yaml yamllint: indentation: fix dts/bindings/ 2023-01-04 14:23:53 +01:00
cdns,tensilica-xtensa-lx7.yaml yamllint: indentation: fix dts/bindings/ 2023-01-04 14:23:53 +01:00
cpu.yaml dts: arm64: Add device tree for Intel SoCFPGA Agilex5 platform 2023-07-25 16:58:01 +00:00
espressif,riscv.yaml dts/riscv: add missing riscv,isa fields and modify existing ones 2023-09-14 14:34:34 +02:00
gaisler,leon3.yaml dts: sparc: add cpus node to leon3 2022-01-11 10:46:20 +01:00
intel,alder-lake.yaml dts: bindings: Update compats and filenames 2023-09-28 09:35:16 +02:00
intel,apollo-lake.yaml dts: bindings: Update compats and filenames 2023-09-28 09:35:16 +02:00
intel,elkhart-lake.yaml dts: bindings: Update compats and filenames 2023-09-28 09:35:16 +02:00
intel,ish.yaml boards: x86: Add boards and SoCs for Intel ISH 2023-07-28 17:49:09 +02:00
intel,lakemont.yaml dts: bindings: rename files ending with yml 2022-07-24 17:25:13 -04:00
intel,niosv.yaml dts/riscv: add missing riscv,isa fields and modify existing ones 2023-09-14 14:34:34 +02:00
intel,raptor-lake.yaml dts: bindings: Update compats and filenames 2023-09-28 09:35:16 +02:00
intel,x86.yaml dts/bindings: Fixing x86 CPU compatibles by providing proper yaml files 2021-02-15 09:43:30 -05:00
ite,riscv-ite.yaml dts/riscv: add missing riscv,isa fields and modify existing ones 2023-09-14 14:34:34 +02:00
litex,vexriscv-standard.yaml dts/riscv/litex: add litex,vexriscv-standard compatible string 2024-01-31 10:41:49 +01:00
neorv32-cpu.yaml dts/riscv: add missing riscv,isa fields and modify existing ones 2023-09-14 14:34:34 +02:00
nuclei,bumblebee.yaml soc: riscv: gd32vf103: simplify MCAUSE exception mask handling 2024-01-15 09:58:03 +01:00
qemu,nios2-zephyr.yaml yamllint: indentation: fix dts/bindings/ 2023-01-04 14:23:53 +01:00
riscv,cpus.yaml dts/bindings: move RISC-V cores bindings to dts/bindings/cpu/ 2024-01-31 10:41:49 +01:00
sample_controller.yaml dts: bindings: Remove 'title:' and put all info. into 'description:' 2019-12-18 11:52:45 +01:00
sifive,e24.yaml dts/bindings: move RISC-V cores bindings to dts/bindings/cpu/ 2024-01-31 10:41:49 +01:00
sifive,e31.yaml dts/bindings: move RISC-V cores bindings to dts/bindings/cpu/ 2024-01-31 10:41:49 +01:00
sifive,e51.yaml dts/bindings: move RISC-V cores bindings to dts/bindings/cpu/ 2024-01-31 10:41:49 +01:00
sifive,s7.yaml dts/bindings: move RISC-V cores bindings to dts/bindings/cpu/ 2024-01-31 10:41:49 +01:00
sifive,u54.yaml dts/riscv/microchip: add missing cpu nodes compats in mpfs.dtsi 2024-01-31 10:41:49 +01:00
sifive-common.yaml dts/bindings: move RISC-V cores bindings to dts/bindings/cpu/ 2024-01-31 10:41:49 +01:00
snps,arcem.yaml dts: bindings: Remove 'title:' and put all info. into 'description:' 2019-12-18 11:52:45 +01:00
telink,b91.yaml dts/riscv: add missing riscv,isa fields and modify existing ones 2023-09-14 14:34:34 +02:00
zephyr,native-posix-cpu.yaml dts: bindings: cpu: add compatible for native_posix 2022-01-11 10:46:20 +01:00