Anas Nashif c2c6a6a245 qemu_riscv32: use hifive1 configuration ... Use hifive1 configuration for this qemu and set SYS_CLOCK_HW_CYCLES_PER_SEC to 10000000 Fixes #10043 Signed-off-by: Anas Nashif <anas.nashif@intel.com>		2018-11-05 11:00:38 -05:00
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arc	kconfig: Hide the DesignWare I2C driver on unsupported platforms	2018-10-25 07:32:05 +01:00
arm	drivers: spi_sam0: move sercom pad info to dts	2018-11-05 10:05:47 -05:00
nios2	DT: Rename from dts.fixup to dts_fixup.h	2018-10-08 11:38:56 -04:00
posix	posix arch: Improve description of posix_halt_cpu	2018-10-27 21:35:51 -04:00
riscv32	qemu_riscv32: use hifive1 configuration	2018-11-05 11:00:38 -05:00
x86	soc: apollo_lake: fix build errors for GPIO due to DTS changes	2018-11-02 21:58:02 -04:00
xtensa	soc: xtensa: intel_s1000: fix fatal exception.	2018-11-03 22:39:15 -04:00
Kconfig	linker: allow SoC to insert linker script fragments	2018-10-19 16:11:34 -04:00