Sylvio Alves f18d811c6c soc: esp32c3: fix soc architecture definition ... Update ESP32-C3 architecture as IMC instead IMA. Although not documented, ESP32-S3 supports CSR instructions. It also needs to be enabled, otherwise build will fail. Fixes #53555 Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>		2023-02-28 12:47:56 +01:00
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esp32c3	soc: esp32c3: fix soc architecture definition	2023-02-28 12:47:56 +01:00
litex-vexriscv	riscv: Introduce Zicsr and Zifencei extensions	2022-08-29 16:57:18 +02:00
openisa_rv32m1	arch: riscv enable flash config	2023-02-28 10:29:03 +01:00
riscv-ite	ITE: drivers/adc: Add config of ADC reference voltage full-scale 3300mV	2023-02-23 08:59:54 +01:00
riscv-privilege	arch: riscv enable flash config	2023-02-28 10:29:03 +01:00
CMakeLists.txt	riscv32: rename to riscv	2019-08-02 13:54:48 -07:00