zephyr/dts/xtensa
Tomasz Leman ff2dd7f25a dts: xtensa: intel: Reorder ACE 1.5 power domain nodes
This patch reorders the power domain node definitions in the ACE 1.5
Meteorlake DTS file to improve readability and facilitate comparison with
the documentation.

Changes include:
- Reordering power domain nodes by their bit positions.
- No changes to the bit positions themselves; they remain as originally
  defined.

This reordering does not affect the functionality but makes the DTS file
more maintainable and easier to cross-reference with the hardware
specification.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2024-03-19 14:54:29 +01:00
..
espressif dts: bindings: can: remove optional sample point properties 2024-03-17 15:36:19 +01:00
intel dts: xtensa: intel: Reorder ACE 1.5 power domain nodes 2024-03-19 14:54:29 +01:00
nxp dts: xtensa: nxp_imx8: add EDMA0 node 2024-03-13 22:37:04 +00:00
dc233c.dtsi xtensa: dc233c: enlarge ROM space 2023-09-14 17:07:21 -04:00
sample_controller.dtsi dts: Add information about CPU frequency to the cpu nodes 2019-07-17 21:53:36 +02:00
xtensa.dtsi dts: Restructure xtensa dts directory 2019-06-27 07:21:11 -04:00