Commit graph

61614 commits

Author SHA1 Message Date
Henrik Brix Andersen 0783b51ee1 drivers: can: add generic GPIO controlled CAN transceiver driver
Add generic driver for GPIO controlled CAN transceivers.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-15 14:32:29 -05:00
Henrik Brix Andersen 754ed399f9 drivers: can: add CAN transceiver device driver API
Add API for controlling the state of a CAN transceiver.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-15 14:32:29 -05:00
Henrik Brix Andersen 5e8399f84b devicetree: add devicetree/can.h
This contains accessor macros for getting the maximum bitrate supported
by a CAN controller/transceiver combination.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-15 14:32:29 -05:00
Henrik Brix Andersen 71c3e4c369 dts: bindings: add devicetree bindings for CAN transceivers
Add generic devicetree bindings for simple CAN transceivers.

Always-on CAN transceivers are considered passive and just provide a
maximum supported bitrate.

Active CAN controllers can typically be controlled by the MCU via either
SPI, I2C, or GPIO. Common GPIO controlled CAN transceivers provide
either a stand-by or an enable pin (or both) for controlling the state
of the CAN transceiver.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-15 14:32:29 -05:00
Henrik Brix Andersen e85add295e boards: arm: mimxrt1024_evk: enable USB1
Enable USB device controller on the NXP i.MX RT1024 Evaluation Kit.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-15 14:27:29 -05:00
Andrzej Głąbek 44feb7d527 drivers: pwm_nrfx: Add support for pinctrl
Add support for the new pinctrl API to the nRF PWM driver.
Update code of the driver and the related devicetree binding.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-15 18:38:01 +01:00
Andrzej Głąbek 1a01ca2adf drivers: sensor: qdec_nrfx: Add support for pinctrl
Add support for the new pinctrl API to the nRF QDEC driver.
Update code of the driver and the related devicetree binding.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-15 18:38:01 +01:00
Andrzej Głąbek 7d0a2ffcb7 drivers: flash: nrf_qspi_nor: Add support for pinctrl
Add support for the new pinctrl API to the nRF QSPI NOR flash driver.
Update code of the driver and the related devicetree binding.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-15 18:38:01 +01:00
Andrzej Głąbek fd7633126e drivers: pinctrl: nrf: Add support for PWM, QDEC, and QSPI peripherals
Add support for configuring pins to be used by the nRF PWM, QDEC, and
QSPI peripherals.
A new custom property "nordic,invert" is added to the pin configuration
group binding to allow configuring PWM channel outputs as inverted.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-15 18:38:01 +01:00
Andrzej Głąbek 1c20443ce0 drivers: audio: dmic_nrfx_pdm: Add support for pinctrl
Add support for the new pinctrl API to the DMIC driver that handles
the nRF PDM peripheral. Update code of the driver and the related
devicetree binding.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-15 18:38:01 +01:00
Andrzej Głąbek 3966a33c5c drivers: i2s_nrfx: Add support for pinctrl
Add support for the new pinctrl API to the nRF I2S driver. Update code
of the driver and the related devicetree binding.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-15 18:38:01 +01:00
Andrzej Głąbek 0e2af43fc6 drivers: pinctrl: nrf: Add support for I2S and PDM peripherals
Add support for configuring pins of the nRF I2S and PDM peripherals.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-15 18:38:01 +01:00
Krzysztof Chruscinski 2306a97527 tests: Remove limitation from ztress and ring_buffer tests
Test were executed on single CPU only and with qemu_cortex_a9
excluded. Removing those limitations after fixes.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-03-15 13:19:28 -04:00
Krzysztof Chruscinski 19ea3a6416 tests: ztest: ztress: Relax timing requirements in the test
Seen failures on some platforms. No harm to relax the
check for test timeout.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-03-15 13:19:28 -04:00
Krzysztof Chruscinski fe423d52a7 testsuite: ztress: Delay start of the test
Delay start of threads and timer to ensure that setup
is completed. Especially, vital on multiple CPUs.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-03-15 13:19:28 -04:00
Krzysztof Chruscinski 1916a833f3 testsuite: ztress: Make cpu load calculation multi-cpu ready
Use idle threads on all cores for cpu load calculation.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-03-15 13:19:28 -04:00
Robert Lubos 6a0df63ea0 net: sockets: Retry net_context_sendmsg if EAGAIN is reported
TCP module can report EAGAIN in case TX window is full. This should not
be forwarded to the application, as blocking socket is not supposed to
return EAGAIN.

Fix this for sendmsg by implementing the same mechanism for handling TX
errors as for regular send/sendto operations.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2022-03-15 09:50:21 -07:00
Frank Terbeck a85a76d8c0 cmake: Support ZEPHYR_BASE to be a git submodule
In 9170977 build-time version header generation was added. The test
for .git assumes this file to be a directory. In the case of git
submodules, .git is a regular file that in its contents points to
the actual git database for the submodule. This is a way to have
symlink like behaviour even on file systems that do not support
themselves support symlinks.

This consults git as to what the correct git database directory is,
in case the .git file is indeed a regular file, and adjusts the
git_dependency variable accordingly.

Fixes #43503

Signed-off-by: Frank Terbeck <ft@bewatermyfriend.org>
2022-03-15 09:43:40 -07:00
Gerard Marull-Paretas 648d71674f tests: drivers: build_all: gpio: enable pca95xx
The pca95xx driver was not compiled, add it to the list.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-15 09:39:45 -07:00
Gerard Marull-Paretas 03137a6152 drivers: gpio: pca95xx: fix build errors
I introduced some errors during the gpio_dt_spec/i2c_dt_spec conversion
process. This patch fixes the issues so that driver builds.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-15 09:39:45 -07:00
Piotr Pryga f7f6a5544b samples: Bluetooth: df: Add missing harness to DF sample.yaml
Some build configurations in direction finding samples
sample.yaml didn't have harness=bluetooth. That enables
these configurationsto be be executed on hardware by
CI. Those runs end causing CI failures.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-03-15 12:15:26 -04:00
Immo Birnbaum ec16d571ff CODEOWNERS: add owner for Xilinx PS GPIO controller driver
Add code ownership for the Xilinx Processor System MIO / EMIO GPIO
controller driver.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-03-15 08:44:46 -07:00
Immo Birnbaum b9f9d4a835 soc: arm: xilinx_zynq7000: add MMU region for PS GPIO controller
Add a 4k indentity mapping in the MMU for the Processor System GPIO
controller if the parent device node is enabled in the device tree.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-03-15 08:44:46 -07:00
Immo Birnbaum bbf16d7bd2 dts: bindings: gpio: Bindings for Xilinx PS GPIO controller
Bindings for the Xilinx Processor System GPIO controller, both for the
parent controller device as well as the GPIO pin bank child devices.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-03-15 08:44:46 -07:00
Immo Birnbaum 9c1af58b2f dts: xilinx: Add PS GPIO controller and banks to Zynq-7000/ZynqMP DTs
Add the parent controller device node plus the child nodes for all
GPIO pin banks managed by the GPIO controller to the device trees
of the Zynq-7000 and ZynqMP SoCs.

Device base addresses, IRQ lines, number of banks, number of pins
per bank and bank descriptions taken from the Zynq-7000 TRM (Xilinx
document ID ug585), the Zynq UltraScale+ TRM (Xilinx document ID
ug1085) and the Zynq UltraScale+ Devices Register Reference (Xilinx
document ID ug1087, web-based document).

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-03-15 08:44:46 -07:00
Immo Birnbaum ca33905248 drivers: gpio: Xilinx PS MIO / EMIO GPIO driver
Driver implementation for the Xilinx Processor System MIO / EMIO GPIO
controller as contained in the Zynq-7000 and ZynqMP (UltraScale) SoCs.

The driver is split up into source and header for a parent controller
device and source and header for 1..n child GPIO pin bank devices.
The parent device driver takes care of IRQ handling, the GPIO pin bank
driver provides pin / bank access according to the API defined by the
GPIO subsystem.

More than one device for this type of GPIO controller is required as
it provides access to a number of GPIO pins well in excess of the 32
pins addressable by the current GPIO API (whereever parameters or
return values come in the form of a bit mask):

- Zynq-7000: 54 MIO GPIO pins, 64 EMIO GPIO pins in 4 banks.
- ZynqMP:    78 MIO GPIO pins, 96 EMIO GPIO pins in 6 banks.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-03-15 08:44:46 -07:00
Henrik Brix Andersen cc95910957 MAINTAINERS: remove myself from the riscv collaborator group
Remove myself from the RISC-V collaborator group due to lack of time.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-15 11:32:47 -04:00
Hake Huang 084e6dfbd2 dts: binding: rename pinmux to gpr
rename pinmux to gpr
different from pinmux and io settings gpr will do more IO
settings.

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2022-03-15 10:12:57 -05:00
Hake Huang 8dda841e91 board: pinctrl: board config for RT1060
enable pin control for RT1060 EVK.

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-15 10:12:57 -05:00
Hake Huang 8c5a4fc3b0 drivers: sai: add pinctrl support in mcux sai
enable i2s pinctrl

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2022-03-15 10:12:57 -05:00
Hake Huang 40f3ab9f72 drivers: uart: add pinctrl support in mcux lpuart
enable pinctrl in lpuart driver, and clean up driver instance definition
macros

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2022-03-15 10:12:57 -05:00
Hake Huang 3fc6353b36 drivers: pinctrl: add mcux_rt pinctrl driver
Add pinctrl driver for rt1xxx

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-15 10:12:57 -05:00
Hake Huang e4793b902d dts: imx_rt: add pinctrl and gpr for rt1xxx
add dtsi settings for rt series
dtsi use gpr to replace pinmux
nxp iomuxc has gpr which has more settings than mux and io settings
current solution is to export gpr separately and access then directly

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-15 10:12:57 -05:00
Hake Huang 6be3085e73 soc: add pinctrl header file definition for RT series
Pinctrl requires header file with Z_PINCTRL_STATE_PINS_INIT macro
defined. Add header file for mcux RT pinctrl implementation.
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-15 10:12:57 -05:00
Hake Huang c93689db2f dts: bindings: add pinctrl node to sai and lpuart
enable pinctrl in i2s and lpuart driver bindings

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-15 10:12:57 -05:00
Hake Huang a6e8c3d3e1 dts: bindings: add pinctrl binding for nxp mcux rt1xxx
Add dts binding for rt1xxx pinctrl driver settings. A binding file is
present for the pinctrl node itself, and for the pinctrl child node that
defines all pinmux options

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-15 10:12:57 -05:00
Daniel DeGrasse 678f334aed west.yml: Update to pull in pinctrl header from NXP HAL
NXP hal will define constants for pinmux options in RT pinctrl
implementation. Update hal revision to pull in dtsi file.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-15 10:12:57 -05:00
Anas Nashif 460b37fbe1 kernel: SMP is Symmetric multiprocessing
Fix kconfig for SMP and use correct terminology for SMP.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-03-15 11:07:29 -04:00
Gerard Marull-Paretas 893b941938 doc: guides: dts: improve device section
- Move to 1st option DEVICE_DT_GET
- Make device_get_binding 2nd choice
- Extend details on differences between DEVICE_DT_GET/device_get_binding
- Extend the troubleshooting section.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-15 15:45:55 +01:00
Andrzej Głąbek 222d42c22a modules: hal_nordic: Improve reservation of resources for BT_CTLR
Instead of including from nrfx_glue.h a specific Zephyr Bluetooth
controller header file that defines PPI and GPIOTE resources to be
reserved for exclusive use by the controller, include a file with
only a fixed name and expect the chosen Bluetooth controller to
provide the location of this file in include paths. This way, when
a different Bluetooth controller implementation is used downstream,
a different file can be easily pointed to.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-15 14:59:35 +01:00
Anas Nashif be7a91fd54 MAINTAINERS: area updates
- Introduce formatted ouptut area
- fix BT controller paths for tests.
- fix BT mesh paths for tests.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-03-15 09:43:03 -04:00
Przemyslaw Bida 5c94549023 logging: fix msg2 creation in __LOG_VA
This commit fixes invoking of z_log_msg2_runtime_vcreate with wrong
param. This function requires to be called with dynamic or static
source based on CONFIG_LOG_RUNTIME_FILTERING.

Signed-off-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
2022-03-15 12:20:03 +01:00
Benedikt Schmidt 09d2199589 stm32: adc: use ADC properties to configure temp and vref channels
Use the devicetree properties to determine if the dedicated temperature or
voltage reference channels should be configured for the ADC.
Fixes #43750.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2022-03-15 10:50:52 +01:00
Benedikt Schmidt 0907e35bef dts: arm: stm32: introduce ADC properties for temp and vref channel
Introduce ADC properties which indicated if the ADC instances have
dedicated channels for the internal temperature sensor or voltage
reference.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2022-03-15 10:50:52 +01:00
Martin Jäger 565fc4d29c doc: release-notes: mention API change for lorawan_send
The message type parameter was changed to the more explicit enum.
Existing code with unconfirmed message type has to be updated.

Signed-off-by: Martin Jäger <martin@libre.solar>
2022-03-15 10:37:36 +01:00
Martin Jäger b6a907dd89 lorawan: make unconfirmed message type explicit
The enum did not contain an entry for unconfirmed messages. Instead, it
was only mentioned in the comment that 0 is the default for
unconfirmed messages.

This commit adds LORAWAN_MSG_UNCONFIRMED to the enum and changes the
parameter in the lorawan_send function to enum lorawan_message_type.

Signed-off-by: Martin Jäger <martin@libre.solar>
2022-03-15 10:37:36 +01:00
Marin Jurjević 2a4e47a912 net: lwm2m: fix registration update event in queue mode
When queue mode is enabled, state machine will enter state
ENGINE_REGISTRATION_DONE_RX_OFF. This state needs to be
taken into account during registration update to send
correct event.

Signed-off-by: Marin Jurjević <marin.jurjevic@hotmail.com>
2022-03-15 10:06:22 +01:00
Jamie McCrae 21cd3f2d39 boards: arm: BT510: Move button1 to button0
This prevents build issues with some sample applications e.g. system_off

Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
2022-03-15 10:06:10 +01:00
Jamie McCrae 0c91db8981 boards: arm: BT510: Disable peripherals by default in defconfig
Some non-essential peripherals peripherals including various sensors
were enabled by default in the defconfig file when they shouldn't be

Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
2022-03-15 10:06:10 +01:00
Jamie McCrae 59f496a034 boards: arm: BT510: Switch to enhanced peripheral drivers
This switches from UART to UARTE and from TWI to TWIM

Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
2022-03-15 10:06:10 +01:00