Kconfig for Seeed Grove LCD RGB Backlight was looking.
Make it depend on DT_HAS_SEEED_GROVE_LCD_RGB_ENABLED.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
When registering a target device, the driver will check if a slave address
is free in the peripheral. If so, the new slave address gets configured and
enabled.
Signed-off-by: Bram Vlerick <bram.vlerick@openpixelsystems.org>
Move slave initialization to a separate helper function. This helper will
also be needed in the multi target support during unregistration. When
unregistering, the slave needs to be reinitialized if other remaining
targets are still attached.
Signed-off-by: Bram Vlerick <bram.vlerick@openpixelsystems.org>
Add helper functions to find a free target for configuration and find a
target based on the configured slave address. These functions are in
preparation for multi-target mode.
Signed-off-by: Bram Vlerick <bram.vlerick@openpixelsystems.org>
Move target data to dedicated struct. This is in preparation for multi
target support. The target_handle can stay global since this handle is
unique per peripheral and not per slave address.
Signed-off-by: Bram Vlerick <bram.vlerick@openpixelsystems.org>
1. support the baudrate = 3MHz.
2. add baudrate = 115200 setting when UART source clock = 25/30/48/50 MHz.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This commit implement the UART asynchronous API mode support.
When the API is used, the UART hardware cooperates with the DMA (MDMA)
module to handle the the data transfer and receiving.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Adds a handler to check error flag bits. This should be called
by applications that call regulator_enable and receive -EINVAL
as a return.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
Adds support for the PGOOD pin. This pin is asserted by the
regulator when converter startup has completed and the output
is stable. If the PGOOD pin is not used, the PGOOD state is
check via the PGOOD_PIN_STS bit.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
Enables the converter via I2C as the else case when the EN pin
conditional fails. This used to not matter as no code followed,
but this will change in subsequent patches.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
* Rename w5500_hw_reset to w5500_soft_reset.
This function performs a software reset, the GPIO reset is
hardware reset.
* Set thread name "eth_w5500".
* Simplify random MAC address code.
Remove unnecessary function pointer and wrapper function.
* Remove SPI read variable length array.
The VLA causes unnecessary stack usage and its max size changes
depending on CONFIG_NET_BUF_DATA_SIZE.
Split the SPI read into two transactions, a skip of the first 3
dummy bytes, then a read of the data directly into to given buffer.
* Remove unused variables config_func and full_duplex.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
For many of the state checks with timeout, the check
should be very fast (sub 1 microseconds) and the
previous implemention involving busy waits between
checks could add unneeded latency. Change the
timeout checking method to use WAIT_FOR(), with
no extra delays between checks.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Deprecate the use of location_* properties in the i2c_gecko driver
and migrate to the pinctrl api for enhanced maintainability and
compliance with current standards.
Signed-off-by: Arunmani Alagarsamy <arunmani.a@capgemini.com>
This update integrates I2C support with the pinctrl_configure_pins api
within the pinctrl_gecko driver.
Signed-off-by: Arunmani Alagarsamy <arunmani.a@capgemini.com>
Align the SPI init priority with other devices.
Other bus-devices like UART and I2C are init at standard kernel
device level (50), but SPI is at 70 and there appears to not be
a reason for it.
GPIO is init at 40 so there should not be an issue to use the default.
Signed-off-by: Joakim Andersson <joerchan@gmail.com>
Some devices (like nRF54H20) must have PWM data buffer
stored in appropriate location.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
For some hardwares, it is very common that some aligment on the allocated
memory is required. For example, the PxP and eLCDIF of NXP require aligned
buffers so that their performances can be optimal.
Add a new video_buffer_aligned_alloc() API for these needs.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Non-secure images cannot reference NRF_RRAMC_NS because NRF_RRAMC_NS
does not exist.
TF-M will configure RRAMC according to these Kconfig's before booting
the non-secure image so we ifdef out this code.
Also, rewrite the implementation of commit_changes to also work when
the commit task is not available.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
This change restore DCDC configuration after system resumes.
When CONFIG_PM_DEVICE is enabled each of the four rails that
support DCDC handle resume in regulator_da1469x_pm_action function.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This adds automatic GPIO latching before going to extended sleep and
restoring state after wakeup.
Mode and state for each pin is stored, then ports are latched to retain
state when PD_COM is disabled during sleep. On wakeup mode and state for
each pin is restored and ports are unlatched to make it work again.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This enabled extended sleep for Renesas SmartBond(tm).
Extended sleep is low power mode where ARM core is powered off and can
be woken up by PDC. This is default sleep mode when CONFIG_PM is
enabled.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This adds timer driver for Renesas SmartBond(tm) family.
It uses TIMER2 block which is in PD_TIM power domain so it can work even
if ARM core is disabled, thus can work as a sleep timer.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This fixes the problem that `adc_raw_to_millivolts` only returns half of
the actual voltage.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
Found via static analyis. When `adc_kb1200_start_read` succeeds, no
value is set for `error` so it is still uninitialized when it is
returned.
Signed-off-by: François Baldassari <francois@memfault.com>
Use information encoded in conversion result value to validate it.
Check if MSB bit is set to zero.
Check if channel number included in the result matches channel
number selected for conversion.
Use bitmask to extract converted value instead of math calculations.
Signed-off-by: Lukasz Madej <l.madej@grinn-global.com>
k_thread_name_set() function returns an error if CONFIG_THREAD_NAME is
not enabled which may make the driver not functional.
Fix the issue by adding a check against CONFIG_THREAD_NAME avaliability
before calling k_thread_name_set() function so the driver can operate
properly with CONFIG_THREAD_NAME disabled.
Signed-off-by: Lukasz Madej <l.madej@grinn-global.com>
Add configuration of internal refference voltage value so raw ADC
readings can be converted to mV utilizing adc_raw_to_millivolts()
ADC API function.
Signed-off-by: Lukasz Madej <l.madej@grinn-global.com>
This commit refactors the Intel SSP DAI driver to support dynamic
management of SSP IP. This change additionally separates the management
of the DAI part from the management part of the SSP IP.
Key changes:
- Add new static functions to manage SSP IP power.
- Update the DAI SSP configuration functions to use the new management
approach.
- Update device tree bindings and instances to reflect the new SSP IP
management mechanism.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
Fix incorrect note that write only allows to change value of
bit to zero, where proper information is that change is only allowed
from erase-value to the opposite.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit adds missing binary or in write operation.
Assuming that program-erase devices only allow switching bits
from erase-value to opposite, in case of 0x00 erase value device
only ones can be written.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
This implements basic driver to utilize the I3C IP block
on NPCX.
1. I3C mode: Main controller mode only.
2. Transfer: Support SDR only.
3. IBI: Support Hot-Join, IBI(MDB).
Controller request is not supported.
4. Support 3 I3C modules:
I3C1(3.3V), I3C2(1.8V, espi mode), (I3C3 1.8V or 3.3V)
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
During DAA, the responding device might not be in the device list.
This CL adds target device descriptor's pointer checking to prevent
getting unexpected results.
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
1. The only valid values of MCLKD clock frequency
are between 40Mhz to 50Mhz.
2. If DMA is used, the APB4_CLK clock frequency must
be equal to or higher than 20Mhz.
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Found via static analysis. In `can_mcan_state_change_handler`, the
return value of `can_mcan_get_state` is not checked for error. In the
event of an error, both `err_cnt` and `state` are left unitialized and
accessed downstream.
The correct behavior is to return early in that case.
Signed-off-by: François Baldassari <francois@memfault.com>
- Configure a UART TX buffer; the backend would otherwise assert in
its configuration or (if the asserts are off) miserably fail when
trying to send anything to the GNSS modem.
- Fine tune the UART RX buffer size and make it depend on whether
satellite data is received.
- Remove unused k_spinlock.
- Make declaration of Kconfig items dependent on GNSS_NMEA_GENERIC
conditional.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
