Restructure the Bosch M_CAN driver backend to use per-instance Message RAM
configuration.
This removes the need for a common, artificial "can" devicetree node for
SoCs with multiple Bosch M_CAN-based CAN controllers and allows for
per-instance configuration of the number of e.g. standard (11-bit) and
extended (29-bit) filter elements.
As part of the restructure, software handling of CAN filter flags was moved
from per-flags bitfields to per-filter bitfields, solving an issue when
using more than 32 standard (11-bit) filter elements or more than 16
extended (29-bit) filter elements.
Fixes: #42030, #53417
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch the Bosch M_CAN devicetree binding to use a bosch,mram-cfg property
for specifying the memory layout of the Bosch M_CAN Message RAM. This is
identical to the Linux kernel devicetree binding for Bosch M_CAN IP core
based CAN controllers.
This introduces an offset cell which can be used for controllers with
shared Message RAM between Bosch M_CAN instances.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The BG95 pin configuration does not internally ever use the reset pin.
Because of this, there is no need to make reset pin mandatory.
Commit removes reset pin dependency [e.g. in case of BG95].
Signed-off-by: Andrei Hutanu <andrei.hutanu.i@gmail.com>
Add a property to the ADC channels which allows the configuration
of the current source pin.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Added Input/Output trigger mux address's as properties
that can be passed into the DMA driver. This is intended
to send INPUTMUX signals into the DMA.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Ports the Jinghua Display JHD1313 LCD (with RGB backlight) driver
to use the new auxdisplay driver interface. This driver is used on
the seeed grove LCD RGB display, and replaces it.
Signed-off-by: Jamie McCrae <spam@helper3000.net>
Removed few VIF properties which are being hardcoded
Updated the script to parse source VIF XML and add information to
the output
Added optional Kconfig option to configure custom source VIF XML path
Cleaned up the code
Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com>
Added intel LPSS DMA interface using dw common to support
usage of internal DMA in LPSS UART, SPI and I2C for
transfer and receive operations.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Adds PHY driver. Works via MDIO API and
exposed ADIN2111 MDIO Clause 45
functions.
Link status detection is triggered by
ADIN2111 driver within offloaded IRQ
handler.
Supports:
- LED0, LED1 enable/disable
- Fatal HW error detection
- AN 2.4V tx mode enable/disable
The initialization order is important.
PHY 2 must be initialized after PHY1.
Therefore, it shall be defined after the 1st one
in the devicetree.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds MDIO driver. Works via exposed
ADIN2111 functions.
It is possible to access Clause 45 and 22 registers.
Due to MDIO API limitation Clause 45 access
is done using driver specific MDIO functions.
Provides API and functions for PHY driver.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds initial ADIN2111 2-Port 10BASE-T1L (SPE)
switch support. Works over SPI.
The driver creates 2 interfaces, 1 per port (PHY).
Configures multicast and broadcast filters.
The same unicast is applied to both ports.
Supports:
- Link state detection
- CRC enable/disable
- Ports config set
- Ports ETH stats
Provides functions for MDIO driver.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds the pwrmgr devicetree node. This is a simple binding that holds
only the address of the registers for now.
This patch is part of the OpenTitan watchdog (AON Timer) support patch
series. It is needed to ensure that the watchdog reset functionality
is enabled.
Signed-off-by: Tyler Ng <tkng@rivosinc.com>
The OpenTitan power manager is responsible for changing the OpenTitan's
operation to and from low power state. This patch adds a simple binding
for the power manager's config registers.
This is part of the OpenTitan watchdog patch series. The power manager
HWIP block needs to be configured to enable the watchdog reset
functionality in the OpenTitan Verilator simulation.
Signed-off-by: Tyler Ng <tkng@rivosinc.com>
Adds the AON Timer device in the OpenTitan Earlgrey device tree.
Adds overlay files to enable the watchdog and set the alias to
`watchdog0`.
Adds the AON timer (watchdog part) to the supported features section
of the OpenTitan documentation.
Signed-off-by: Tyler Ng <tkng@rivosinc.com>
The OpenTitan AON Timer is a hardware device that has two features:
the wakeup timer and watchdog timer. This commit series implements the
watchdog feature.
The spec can be found here:
https://opentitan.org/book/hw/ip/aon_timer/index.html
Signed-off-by: Tyler Ng <tkng@rivosinc.com>
Flash address is updated to 0x16000000, i.e. actual location instead of
remapped one. FLASH_BASE_ADDRESS is now set via dts.
Co-authored-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Niek Ilmer <niek.ilmer.aj@renesas.com>
This selects default flash controller in device tree.
Co-authored-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Niek Ilmer <niek.ilmer.aj@renesas.com>
This adds support for the USB interface for the
Renesas Smartbond DA1469x device family.
Co-authored-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Signed-off-by: Niek Ilmer <niek.ilmer.aj@renesas.com>
RT1040 removes LPSPI3, and refers to the peripheral called LPSPI4 on
other RT devices as LPSPI3. Remove the default LPSPI3 peripheral and add
an `lpspi3` alias to LPSPI4.
Fixes#57942
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add missing USB-OTG control nodes. Like other STM32-platforms it's
disabled by default and uses the internal 48 MHz clock by default.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
Add an API-less MFD driver for nPM6001. In this case, the MFD device
driver doesn't expose any API as plain I2C API is used within other
device drivers (regulator, GPIO, watchdog). This driver just initializes
some device properties.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Update the default Flash and SRAM size to 1024kb and 288kb, Update the
mpn file overrides accordingly
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
cpu@0 node is not supported on some mpn's so it should be deleted from
the mpn files and not the package files.
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
- Remove the spi node from an older commit since its replaced with the
SCB node now
- GPIO nodes should have been part of pinctrl
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
include the infineon,cat1-scb.yaml for I2c and UART bindings to convey
that they are using SCB (Serial Control Block)
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Add a new regulator driver for Analog Devices ADP5360. While it is a MFD
device, only support for BUCK/BUCKBOOST regulators is added in this
patch.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add new vref node to the DTS definitions of supported SoCs.
Extend DTS ADC channel properties where missing.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Add VREF+ sensor driver and DT node definition.
This driver allows determining the actual voltage applied to an SoC's
VREF+ pin, by comparing the VREFINT internal bandgap voltage reference
with its factory calibration data.
In packages where VREF+ is bonded to VDDA, this permits direct measurement
of VDDA voltage.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>