Although snps,designware-usb bindings already exist, this one is
prolematic. Compatible is too general and does not reflect
the actual controller IP. It has Zephyr-specific properties,
but has no zephyr prefix. It forces properties that are not
necessary for this controller. We start here with new bare minimum
properties for DesignWare OTG USB 2.0 controller.
The STM32F4 SoC family USB controllers, which are also implement
DesignWare OTG USB 2.0 IP, can also be used with existing drivers,
but require certain quirks. To use these we need special compatible.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add GDMA support for esp32s3.
Remove suspend/resume since they are optional and do
the same as start/stop.
Fix possible null pointer derreference.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Declare SCB nodes to be used as UART/SPI/I2C by the boards, Move
common declarations from psoc6_02 to the parent dtsi file
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Added device tree bindings and implementaion for setting the
spi controllers chip select setup and hold time settings.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
As recommended in AN4760 the memory region where the QSPI flash can be
memory mapped should be configured to be Strongly ordered memory. This
works around an issue where a speculative read from the CPU may cause
later problems with using the QSPI bus.
This avoids #57466.
Signed-off-by: Ole Morten Haaland <omh@icsys.no>
Most available AT45 flash chips have their first two sectors shorter
than the consecutive ones. Usually, the first sector is marked as 0a
and has its size equal to eight pages (one block) and the second one
(usually 0b) is the complement to the size of a regular sector.
This commits modifies the driver so that erasing of these first two
sectors is performed correctly. This modified behavior is configurable
with a new DT property so that it is still possible to also use legacy
AT45 chips that do not feature such sector split. Such legacy chips
usually also do not support the chip erase and sector erase commands,
so two more DT properties are introduced to cover that.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The LSM6DSO16IS is a system-in-package featuring a 3-axis digital
accelerometer and a 3-axis digital gyroscope for industrial and IoT
solutions. The LSM6DSO16IS embeds a new ST category of processing,
ISPU (intelligent sensor processing unit) to support real-time applications
that rely on sensor data. The ISPU is an ultra-low-power, high-performance
programmable core which can execute signal processing and AI algorithms
in the edge.
https://www.st.com/en/mems-and-sensors/lsm6dso16is.html
This driver is based on stmemsc HAL i/f v2.02
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Enable UART on the DSP from the i.MX8MP target:
- add corresponding nodes in dtsi and dts;
- create a dts overlay for uart;
- add a config fragment for uart and console configuration.
So, in order to compile an application and enable UART
a user must run west build using DTC_OVERLAY_FILE and CONF_FILE.
Here's an example for hello_world:
west build -p always -b nxp_adsp_imx8m samples/hello_world/
-DDTC_OVERLAY_FILE="boards/xtensa/nxp_adsp_imx8m/
nxp_adsp_imx8m_uart.overlay" -DCONF_FILE="boards/xtensa/nxp_adsp_imx8m/
nxp_adsp_imx8m_uart.conf"
For other applications, like SOF, where we don't need UART, we simply run:
west build -p always -b nxp_adsp_imx8m ../modules/audio/sof/ --
-DTOOLCHAIN=/opt/zephyr-sdk-0.15.2/xtensa-nxp_imx8m_adsp_zephyr-elf/
bin/xtensa-nxp_imx8m_adsp_zephyr-elf -DINIT_CONFIG=imx8m_defconfig
The nxp_adsp_imx8m is using the nxp_imx_iuart driver.
For now, is used in poll mode.
Next step is to enable the interrupt controller in
DSP and use the interrupt driver UART.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
- Added initial version of Infineon CAT1 Flash driver
- Added binding file for infineon,cat1-flash-controller.yaml
- Added overlays for subsys/nvs and drivers/flash_shell
to support cy8cproto_063_ble, cy8cproto_062_4343w boards
- Defined erase-block-size in PSoC6 MPN dtsi.
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
This PR adds a driver for the BMI323, which implements
the following features:
* Enable and disable accelerometer and gyroscope respectively
* Set full scale for accelerometer and gyroscope respectively
* Set data rate for accelerometer and gyroscope respectively
* Get samples (x,y,z) from accelerometer and gyroscope respectively
* Get die temperature
* Set trigger to accelerometer data ready, and accelerometer any motion.
The driver implements device and device runtime power management. If
runtime management is used, it is initialized into the suspended state,
which soft-resets the device to achieve the lowest possible power
consumption, otherwise it is resumed when initialized. When resumed,
the bus is initialized, the feature engine is enabled, and INT1 is
initialized.
The driver only implements the SPI bus at this time. The driver is
prepared to be expanded with I2C support in the future.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Add the `full-duplex` property for the `microchip,enc28j60` node.
Replace ETH_ENC28J60_0_FULL_DUPLEX Kconfig option with this property.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Updated the code to to invoke reset using PCR block
z_mchp_xec_pcr_periph_reset() instead of resetting
using I2C Configuration register
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
The SERCOM4 is hardwired to PB30/31, PC18/19 internally for the LoRa
radio. Move the pinctrl entries to SoC dts level. The same applies for
samr35.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In general, peripherals should be disabled by default and enabled at
board level when needed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add the ability for the flash simulator to store its contents in a
memory region.
This allows filesystems on the flash simulator to survive a reboot.
And allows subsystems (e.g. coredump) to store their info on ram while
using the (existing) flash partition backend.
Add a example (for nucleo_f411re) that shows how to configure the flash
simulator for hardware (cfg discussion #54166).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Add support for a generic NTC, `ntc-thermistor-generic`. In this case,
the compensation table is provided via devicetree. Note that DT property
is prefixed with `zephyr,`, because while hardware related, it is linked
to a particular software implementation.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Refactor driver to align a bit more with its Linux counterpart, ie,
ntc_thermistor. This driver did quite a few _unconventional_ things,
like using "zephyr," compatibles, a dedicated node for pre-computed
compensation table (referenced by the actual pseudo-device node), etc.
The comparison helper function should likely be simplified as well (to
avoid the need for custom wrapper for bsearch), but this can be done
later.
In this refactor, each thermistor gets a compatible, e.g. "epcos,xxxx".
Compatibles are known by the driver, so are compensation tables. This
simplifies devicetree files. There's no need to bother about
compensation tables in **every** board file if Zephyr supports a certain
NTC model.
In general we should respect Linux bindings, which in the end influence
how drivers are implemented. In this case, this principle resulted in
simplified, easier to use code.
For future developers, this is how support for a new NTC can be added:
1. Add to the end of the driver:
```c
#undef DT_DRV_COMPAT
#define DT_DRV_COMPAT vnd_model
static __unused const struct ntc_compensation comp_vnd_model[] = {
{ x, y },
...,
};
#define DT_INST_FOREACH_STATUS_OKAY_VARGS(NTC_THERMISTOR_DEV_INIT,
DT_DRV_COMPAT, comp_vnd_model)
```
3. In driver's Kconfig make sure it depends on
DT_HAS_$DT_DRV_COMPAT$_ENABLED
Note: $X$ means _value_ of X.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It looks like the Zephyr thermistor driver bindings were half-copied
from Linux ntc-thermistor. Zephyr principle is to maintain compatibility
with Linux, when possible, so there's no reason to deviate here. Convert
the connection type from a custom enum to a boolean, as Linux does.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add Silicon Labs xG24-PK6010A (BRD4187C radio plug-in board)
support to the efr32_radio board.
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
This commit moves the `mpfs-icicle.dtsi` file to a common `microchip`
directory and updates include paths in the `mpfs_icicle` board
devicetree.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Initial sensor driver for NPM1300 PMIC charger.
Includes basic configuration of charger voltage and current.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
All Nucleo boards provide the ST Morpho connector/header, which exposes
all pins of the MCU. It is tipically used in ST shields, so provide a
nexus node to allow creating generic shields.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add Port 14/15 to device tree. These ports can only be configured as input.
Error out in gpio driver if user sets them as output.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
XMC4500 and XMC47/800 MCUs have a different memory layout. The
definitions have been moved to the derivative .dtsi of each MCU.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
This patch introduces support for NXP S32 CANEXCEL (CANXL) peripheral.
CAN protocol supporting:
- CAN classic
- CAN FD
Remote transmission request is not supported as this feature is not
available on NXP S32 CANXL HAL.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
- This includes the driver, test app, and sample app
- Only the boards\arm\cy8cproto_062_4343w board is supported for now
Signed-off-by: Bill Waters <bill.waters@infineon.com>
Added RTC driver that supports Motorola MC146818B
Enabled RTC set/get time and alarm, alarm callback
and update callback.
Counter and RTC uses same hardware in case of
Motorola MC146818, so they can't be used at a time.
Updated stand-alone mc146818 counter dts instances
to support rtc and counter with same compatible
string of "motorola,mc146818" on ia32, atom,
apollo_lake, elhart_lake and raptor_lake platforms.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
This patch adds support for the TI INA3221 current monitor.
This is the datasheet used for reference:
https://www.ti.com/lit/gpn/ina3221
Since this device has three channels, there is a custom attribute to
select which channel is to be used when getting a sample.
Measurements are done on all enabled channels.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Make it possible to use CPOL/CPHA SPI clock modes with the SDHC driver.
Some cards require the clock to switch to low when not active.
Signed-off-by: Łukasz Hejnak (LeHack) <lehack-ghub@lehack.pl>
The current configuration is too long and will block soc from
entering sleep mode. This change was made to get better power
number on EVB.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add a binding for STM32 ADC to specify the resolutions and all associated
register information (through a STM32_ADC_RES macro).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
- Remove build asserts in favor of DT enums
- Remove power level property since it is unused by SDK
- Correct voltage ref value in DT to correspond to
chip specific values documented in reference manuals
instead of corresponding to SDK enum names.
- Fix SOC devicetrees affected by these changes.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This is a new parameter to divide the LPTIM input clock
by a prescaler, changing the max reachable timeout of the LP timer.
It will divide the LPTIM input clock by 1 (reset value) up to 128.
The lptim configuration register is written with a 3bit value.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
CAVS platforms are not fully integrated with zephyr. Some of the
registers are still programed from SOF side. This feature can be enabled
for those platforms later when integration is fully done.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Implements a UART driver using PIO. Both PIOs are supported.
Only polling API is supported. Only 8N1 mode is supported.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Added a generic driver for RaspberryPi Pico PIO.
This driver is an intermediate driver for abstracting the PIO
device driver from physical pin configuration.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Signed-off-by: Ionut Catalin Pavel <iocapa@iocapa.com>
- To link image loadable by MCUboot, zephyr,code-partition
must be set in the DTS.
- Move partition definitions from SoC DTS to the board DTS.
- Remove scratch partition since MCUboot does not recommend to use it.
- Increase bootloader partitions to 48K to fit recent MCUboot.
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
The newly added "power-amplifier-output" property for STM32WL SubGHz
radio nodes is mandatory.
Add the property to all affected modules and boards with the
appropriate value for the factory-default hardware configuration.
Add the "rfo-XX-max-power" properties to all affected modules and
boards with the appropriate value for the hardware configuration.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Add STM32WL-specific sx126x_set_tx_params function based on the
STM32CubeWL modifications to LoRaMac-node.
Add the "power-amplifier-output" DT property to
"st,stm32wl-subghz-radio" for selecting between the RFO_LP and RFO_HP
output configurations provided by the above mentioned function.
Add the "rfo-lp-max-power" and "rfo-hp-max-power" DT properties for
defining the maximum design power of the respective outputs' matching
networks.
closes#48511
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Adds a retention system which builds on top of retained_mem
drivers to allow partitioning of areas and data integrity with
magic header prefixes and checksum of stored data.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Adds address cells of size 1 and size cells of size 1 to GPREGRET
instances for Nordic devices.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit adds support for the `drivers.adc` test by adding an overlay
for the `efr32bg22_brd4184a` board.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit adds the Gecko IADC driver and support for it to the
efr32bg_sltb010a board.
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
EFR32MG24 uses the Secure Element's mailbox for entropy gathering
purposes. Reflect that in the device tree structure.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
- Add Gecko BURTC sys_clock driver to handle wake up from EM2,3 states
- Remove custom PM policy and dependency on HAL sl_power_manager service
- EM1 supported in all configurations
- EM2,3 supported only if SysTick is replaced by BURTC
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
The efr32bg22-pinctrl.dtsi file was shared between bg22 and bg27 files.
It's better to name it efr32bg2x-pinctrl.dtsi.
Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
This commit splits device tree into more logical structure. Peripherals
which are on a board are in board dts files, while those which are parts of
a SoC are in SoC dtsi files.
Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
The general structure of efr32b27_sltb010a board is shared by more than one
board. This commit intrduces changes to the organization of board files,
which aim to take that into account.
Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
This commit makes the alarms-count dts property of the
rtc-device.yaml optional, setting the default to 0.
This simplifies the dts rtc dts node by not requiring
the property to be set to 0 if it is not supported.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
- Add initial version of Infineon CAT1 i2c driver.
- Add initial version of binding file for Infineon
CAT1 I2C driver
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
This adds the SPI driver for the Renesas SmartBond(tm) DA1469x MCU family.
The driver only supports controller mode. All four SPI modes are supported.
Note that the lowest supported speed is 2285714Hz.
Requesting speeds higher than 16MHz, will result in a 16MHz SCLK.
Co-authored-by: Stan Geitel <stan@geitel.nl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
Move the devicetree bindings for Analog-to-Digital Converters (ADCs)
from dts/bindings/iio/adc to dts/bindings/adc as Zephyr does not have
an IIO layer.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
1. Increase sram to 256KB.
A block sram of SCAR0~15 is 4KB.
A block sram of SCAR16~19 is 16KB.
A block sram of SCAR20~23 is 32KB.
2. Removed the register of RVILMCR which has no effect.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The alternate pins of UART2 have been remapped, and the remapped
alternate pins must be added to the pinctrl map.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add the pinctrl node that has been remapped in the chip of it82xx2.
And modify kscan's pinctrl for the it82xx2.
And swap I2C default pins.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
On iMX.RT devices, the number of GPIO pins exceeds the maximum of
64 that the PINT interrupt controller can support. Therefore, two
interrupt lines are now shared between the GPIO modules.
This patch allows the user to set the interrupt source for a GPIO
peripheral. For most LPC devices, this will always be the PINT. For some
RT devices, the PINT cannot use pins on GPIO modules other than 0 and 1
as input, and thus the INTA and INTB sources should be used.
Since Zephyr does not support sharing these interrupt between all GPIO
controllers, the user must configure a subset of all GPIO controllers to
use the shared module interrupts. An example of how to do so is provided
for the RT595 EVK.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce PINT driver, for NXP pin interrupt and pattern match engine.
The driver currently supports only the pin interrupt feature of the
PINT.
Add DTS entires for the PINT on LPC and RT devices that support this
peripheral, and remove the interrupt defintions that are PINT specific
from the GPIO module on these devices.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This patch adds HDA to device tree for LNL platforms.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The I2CLCTL_MLCS setting was recently added to MTL
platform. LNL has these registers in separate space, therefore
new field is added to intel,ssp-dai.yaml and appropraite definitions
to LNL device tree.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Repleace usage of shim2 device tree field with hdamlssp.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
In current implementation the HDAMLI2SL register is represented by
shim2 field in common SSP device tree file. This could be misleading
since the filed is is different location to I2S IP.
Adding separate device for this register following DMIC case.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
A recent change added the stop-bits and data-bits to the base
uart-controller binding, meaning it's no longer required to
be added in the Altera specific binding.
This requires no further changes because its only use is in
uart_altera.c where only the index of the enum is used,
which remains the same between the new implementation and
how it was previously implemented in the altera specific binding.
Relevant commit: 0234f12
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
PR https://github.com/zephyrproject-rtos/zephyr/pull/55129 deleted the
"port-sel" property. Delete this property from remaining Microchip SoC
variants and boards.
Test: west build -b mec172xevb_assy6906 samples/drivers/espi/
Signed-off-by: Keith Short <keithshort@google.com>
The nRF9161 is technically a SiP (System-in-Package) that consists of
the nRF9120 SoC and additional components like PMIC, FEM, and XTAL,
so for nrfx/MDK the nRF9120 SoC is to be selected as the build target,
but since the nRF9161 is what a user can actually see on a board, using
only nRF9120 in the Zephyr build infrastructure might be confusing.
That's why in the top level of SoC definitions (for user-configurable
options in Kconfig, for example) the nRF9161 term is used and nRF9120
underneath.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add the header file required for the example to work. Users get the
following error due to unresolved INPUT_BTN_* values otherwise:
parse error: expected number or parenthesized expression
Signed-off-by: Amit Kucheria <amitk@kernel.org>
Signed-off-by: Amit Kucheria <amit@mbedrock.com>
These bindings are removed because they are now handled in the
included base uart-controller.yml.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Add bindings for LTC1665/LTC1660, which is a 8/10-bit
Digital-to-Analog Converter with eight individual channels.
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
This addition should help users to better understand potential issues
with domain clock configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In ACE 2.0 platform (LNL) dmic got two new shim register ranges.
DMIC driver need to program them to configure the interface.
This patch adds new shims to device tree.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This adds USB-HS support for LPC55S16, much in the same way that
LPC55S28 support was added previously.
Signed-off-by: Maxime Vincent <maxime@veemax.be>
The temperature sensor of the STM32F0x0 is similar to C0 (with one value
for calibration) but uses a negative coefficient, so we add it to the
bindings, just like in st,stm32-temp.yaml
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add a devicetree binding for the CAN-FD capable variant of the NXP FlexCAN
controller. Add example devicetree snippets to both NXP FlexCAN and NXP
FlexCAN-FD binding documentation to limit confusion.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the nxp,kinetis-flexcan devicetree compatible to nxp,flexcan as it
is not specific to the NXP Kinetis series.
This is preparation for adding a nxp,flexcan-fd binding.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add new compatible to separate production calibrated sensors
with single and dual calibration temperatures. Also update
stm32_temp driver to support single calibration sensors.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Adds support for a devicetree property that controls the ClockDiv
value provided to the SDIO during init.
Signed-off-by: Maxmillion McLaughlin <github@maxmclau.com>
No fmc node for the stm32u5 is implemented. This commit
adds a stm32-fmc compatible node to the device tree.
Signed-off-by: Christian Spinnler <christian.spinnler@fau.de>
Without adding a RAM entry for the USB RAM in the MPU,
USB RAM is mapped in the Peripheral Memory region
where unaligned memory accesses will cause a fault error.
Unaligned access errors were uncovered when we switch
to a different Zephyr C library where the memcpy function
implementation has unaligned accesses to the USB RAM.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Zephyr SPI driver model for full-duplex operation assumes
data will be transmitted and received during each clock period.
The QMSPI driver for the XEC family also supported dual and
quad I/O use cases which are inherently half-duplex. To
support dual/quad the driver incorrectly processed spi buffers
as all transmit buffers first then all receive buffers. This
worked if only the SPI driver was used. It did not work with
the Zephyr flash SPI NOR driver which assumes SPI drivers
follow the SPI driver model. This commit implements a QMSPI
driver that follows the Zephyr SPI driver model resulting in
a slightly smaller driver. Dual/quad SPI transactions are
supported if the experimental SPI extended mode Zephyr
configuration flag is enabled. We also remove the QMSPI full duplex
driver added previously to support the flash SPI NOR driver.
Added board to spi loop-back test and spi_flash sample.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add the FDCAN peripheral to the stm32H5 serie.
Two CAN1 & 2 instances for the stm32H56x/H57x devices.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Arm fvp_baser_aemv8r and fvp_base_revc_2xaemv8a boards are using
SMSC91C111 as their ethernet adapters.
Portions of the codes are based on FreeBSD code from its
'src/sys/dev/smc/if_smc.c' and 'src/sys/dev/smc/if_smcreg.h'.
This driver has two parts, one is the ethernet controller driver, which
is MAC layer driver. The other is the MDIO driver, which is the PHY
layer driver. Both of them are in the same source file due to that they
need to share the same reading and writing register functions and
the smsc object.
The mdio driver is needed by the existing 'phy_mii' driver, which is
a driver for the generic MII-compliant PHY.
This driver was developed under the fvp_base_revc_2xaemv8a target and
has been tested on the fvp_baser_aemv8r target.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
move DT_DRV_COMPAT to bmm150.h. so that can be decide which interface
to use.
define struct bmm150_bus_io interface for bmm150_i2c.c and bmm150_spi.c
in bmm150.h.
redefined bus operation interface in bmm150.c, this allow the driver
to decide which interface to use during construction.
Signed-off-by: Weiwei Guo <guoweiwei@syriusrobotics.com>
Convert the SDL driver to use the input subsystem. This is specifically
meant to emulate touchscreen drivers, so it's setup to send triplet of
x, y, touch for touch-on events and just touch off on touch off events.
Renamed the driver to input-sdl-touch since now we can also develop an
sdl driver for simulating key events.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit adds support for ANY_MOTION and DATA_READY interrupts for
the BMI270. To implement this, a different config blob than the
"max_fifo" blob has to be used.
Signed-off-by: Benjamin Lindqvist <benjamin@eub.se>
