This enhances the description of i.MX8MPlus SoC with the Cadence HIFI4
core and thus will make this example more relevant to the benefits of
HWMv2.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Align the SPI init priority with other devices.
Other bus-devices like UART and I2C are init at standard kernel
device level (50), but SPI is at 70 and there appears to not be
a reason for it.
GPIO is init at 40 so there should not be an issue to use the default.
Signed-off-by: Joakim Andersson <joerchan@gmail.com>
Add support for a "pm" shell command to trigger suspend/resume as well
as runtime-get/put on devices. This is useful for testing during driver
development.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This property will ensure that PWM driver allocates data buffer
in appropriate location.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Some devices (like nRF54H20) must have PWM data buffer
stored in appropriate location.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
This property will allow PWM driver allocate data buffer
in appropriate memory region.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
For some hardwares, it is very common that some aligment on the allocated
memory is required. For example, the PxP and eLCDIF of NXP require aligned
buffers so that their performances can be optimal.
Add a new video_buffer_aligned_alloc() API for these needs.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Non-secure images cannot reference NRF_RRAMC_NS because NRF_RRAMC_NS
does not exist.
TF-M will configure RRAMC according to these Kconfig's before booting
the non-secure image so we ifdef out this code.
Also, rewrite the implementation of commit_changes to also work when
the commit task is not available.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
In the follow expression:
cyc_evt += UINT32_MAX + 1U
first it is evaluated (UINT32_MAX + 1U), since both types
interpreted as uint32_t, this operation causes an overflow resulting
in 0U.Then we have
cyc_evt = (uint64_t)cyc_evt + 0U
Fix it casting of the operands in the first operation to uint64_t.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Marking sysworkq as essential, so when it fails, the system will halt
instead of continuously working, and dependent components stay
in a broken state.
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
Allow the creator of a work_queue instance to choose whether
the work_queue thread should be marked as ESSENTIAL or not.
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
This change restore DCDC configuration after system resumes.
When CONFIG_PM_DEVICE is enabled each of the four rails that
support DCDC handle resume in regulator_da1469x_pm_action function.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This adds automatic GPIO latching before going to extended sleep and
restoring state after wakeup.
Mode and state for each pin is stored, then ports are latched to retain
state when PD_COM is disabled during sleep. On wakeup mode and state for
each pin is restored and ports are unlatched to make it work again.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This enables cache retainability while in sleep so there's no penalty
when executing from QSPI after wakeup.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
This enabled extended sleep for Renesas SmartBond(tm).
Extended sleep is low power mode where ARM core is powered off and can
be woken up by PDC. This is default sleep mode when CONFIG_PM is
enabled.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This adds timer driver for Renesas SmartBond(tm) family.
It uses TIMER2 block which is in PD_TIM power domain so it can work even
if ARM core is disabled, thus can work as a sleep timer.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Squash the two copies of this file found in `dts/arm` and `dts/arm64`.
Their contents were identical up to devicetree property ordering.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
This file was moved to the `dts/arm64` directory 3 years ago:
3539c2fbb3
However, the original file in `dts/arm` was left by mistake. Since then,
it's been unused and seldom updated, but it hasn't diverged much.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Add support for the Waveshare ESP32-S3-Touch-LCD-1.28 board, including
support the LCD and touchscreen controllers. Tested with samples
already available.
Signed-off-by: Joel Guittet <joelguittet@gmail.com>
This fixes the problem that `adc_raw_to_millivolts` only returns half of
the actual voltage.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
We've had threads spinning on the thread state bits, but weren't being
careful to ensure that those bits were the last things seen to change
in a halting thread. Move it to the end, and add a barrier for
correctness.
Signed-off-by: Andy Ross <andyross@google.com>
Nicolas Pitre points out that since these thread structs are just
dummies for the context swtiching, they can be presumed to be "write
only" and thus there's no point in having one per CPU, everyone can
share the same one.
The only gotcha is that we never really documented (nor really have a
place to document) that rule, so it's not theoretically impossible for
an architecture to read back what it might have written underneath
arch_switch(). Leave this in a separate commit for bisection
purposes, but the risk seems very low.
Signed-off-by: Andy Ross <andyross@google.com>
There's a easily-tripped-upon free memory write condition in the arch
layers where they will write to a cached _current pointer after that
thread has been aborted. Detect this by clobbering the thread data
after the return from k_thread_abort() and validating that it's still
clear after the ISR returns.
Note that the clobbering of the thread struct requires the removal of
a k_thread_join() that (obviously) requires that it see a DEAD flag
set. Joining aborted threads isn't actually legal, but does still
work as long as app code doesn't reuse the memory. Basically we can't
test both cases here, and we have join coverage elsewhere already.
Signed-off-by: Andy Ross <andyross@google.com>
After a k_thread_abort(), the resulting thread struct is documented as
unused/free memory that may be re-used (for example, to respawn a new
thread).
But in the special case of aborting the current thread from within an
ISR, that wasn't quite happening. The scheduler cleanup would
complete, but the architecture layer would still try to context switch
away from the aborted thread on exit, and that can include writes to
the now-reused thread struct! The specifics will depend on
architecture (some do a full context save on entry, most don't), but
in the case of USE_SWITCH=y it will at the very least write the
switch_handle field.
Fix this simply, with a per-cpu "switch dummy" thread struct for use
as a target for context switches like this. There is some non-trivial
memory cost to that; thread structs on many architectures are large.
Pleasingly, this also addresses a known deadlock on SMP: because the
"spin in ISR" step now happens as the very last stage of
k_thread_abort() handling, the existing scheduler lock works to
serialize calls such that it's impossible for a cycle of threads to
independently decide to spin on each other: at least one will see
itself as "already aborting" and break the cycle.
Fixes#64646
Signed-off-by: Andy Ross <andyross@google.com>
Spinlocks taken in ISRs were storing the _current thread pointer of
the interrupted thread as the owner, which was never strictly correct
but was benign as the thread would never run until the lock was
released.
But now k_thread_abort(_current) in an ISR has been fixed to eliminate
all references to the (now aborted) thread struct, and _current points
to a dummy thread. Handle that edge case in the validation framework.
Signed-off-by: Andy Ross <andyross@google.com>
A scheduler fix for free memory usage on aborted threads is now using
a per-CPU dummy thread instead of a single stack-based one at startup.
These static thread objects need spots in the kobj bitmasks, and a few
tests are sitting right at the default limit (16 threads).
Signed-off-by: Andy Ross <andyross@google.com>
Big change is to factor out a thread_halt_spin() utility to manage the
core complexity of this code: the situation where an ISR is asked to
abort a thread already running on another SMP CPU.
With that gone, things can be cleaned up quite a bit. Remove early
returns, most of the "#if CONFIG_SMP" usage was superfluous and will
optimize out, unify and clean up the comments, etc...
No behavioral changes (hopefully), just refactoring.
Signed-off-by: Andy Ross <andyross@google.com>
Refactor only. The surrounding ifdefs are intentionally not changed in
this patch. They will be in the near future.
Rename the pool and generalize the documentation to allow using this
pool for other events that fit the same criteria. This pool can be used
for any buffer that is processed synchronously, without negatively
affecting 'num complete' messages. E.g. 'cmd complete/status' can be put
in this pool already.
We will be working towards making the host process all event buffers
synchronously. This is because events have no dedicated flow control,
and discarding events in the driver without informing the host creates
problems. Discarding should instead happen in the host higher layers
when unavoidable.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
`CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET` shoud be taken into
account in `arch_irq_connect_dynamic`, same as it is done in
`ARCH_IRQ_CONNECT` macro.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
LinkServer does not set a breakpoint at reset by default when debugging
platforms, so if the user single steps after loading an application they
will likely step through ROM code for the target. Add a note clarifying
that users need to set a breakpoint at the reset handler or "main" in
order to pause their application there.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support of rcar_spider_ca55 to xen_dom0 snippet.
Disable CONFIG_UART_INTERRUPT_DRIVEN for xen_dom0, because
xen dom0 consoleio doesn't support interrupt driven mode.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
