Import any manifest files in a new 'submanifests' directory into
west.yml.
This lets users define custom zephyr modules or easily override
built-in modules by dropping their own manifest files into
submanifests/some-user-file.yaml.
Provide an example and a README with links to the relevant
documentation in 'submanifests' to get users started.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This name should be the same as cpus node in dtsi. After the power
policy is added, the cpu-power-states in the CPU properties can
be used.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Documents significant changes to sensor drivers in the v2.7.0 release,
including new drivers added and existing drivers modified.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes#38994, ARP messages were being sent to IPvXmcast MAC addresses
rather than the expected source MAC address or the broadcast address.
Signed-off-by: Robert Melchers <rmelch@hotmail.com>
If CONFIG_WIFI_ESP_AT_SCAN_MAC_ADDRESS: mac addr included in
scanning results.
if CONFIG_WIFI_ESP_AT_SCAN_PASSIVE: passive scanning is used instead of
default active scanning.
If CONFIG_WIFI_ESP_AT_SCAN_RESULT_RSSI_ORDERED: scanning response
ordered by RSSI.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
When mapping the following:
device_map(&base0, DEVA_BASE, DEVA_SIZE, K_MEM_CACHE_NONE);
device_map(&base1, DEVB_BASE , DEVB_SIZE, K_MEM_CACHE_NONE);
with:
- DEVA_SIZE not multiple of a 4KB granule L2 block size (0x200000)
- DEVB_SIZE more than 2 x 4KB granule L2 block size
The mmu code will fill the first device_map() in a L3 table, then
on the second mapping the mmu code will complete the previous L3
table.
At the end of this table, the actual code will select an L2 block
instead of a table because the *virtual address* is multiple with
the L2 block size.
But if the physical address is not, the virtual block offset will
be ORed to the physical address, and not added.
Leading to a weird scenario where virtual memory is duplicated
resulting of the addresses ORing and not addition.
Example:
device_map(&base0, DEVA_BASE, 0x20000, K_MEM_CACHE_NONE);
device_map(&base1, 0x44000000 , 0x400000, K_MEM_CACHE_NONE);
First will result in VA 0x5ffe0000 and second in VA 0x5fbe0000.
The MMU code will use a table to map 0x5ffe0000 to 0x5fbfffff.
For 0x5fc00000 to 0x5fdfffff, since the VA is multiple of an L2
block size, the L3 table is not used.
But the L2 block description entry address is 0x44060000, meaning
that for each access in this L2 block, the following will be done:
0x44060000 | (VA & 1FFFFF)
This is working for the 0x5fc40000 to 0x5fc5ffff access, but for the
0x5fbc60000 (0x5fbe0000 + 0x80000) access the PA gets calculated as :
0x44060000 | (0x5fc60000 & 1FFFFF) = 0x44060000 | 0x60000 = 0x44060000
Instead of the expected 0x44080000.
The solution is to check if the PA descriptor is aligned with the
level block size, if not move to the next level.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This commit allows let build echo_server sample with
overlay-netusb.conf.
USB subsystem must be enabled by the application.
Signed-off-by: Stephan Linz <linz@li-pro.net>
Implements mechanism similar to the one available in net/lib/sockets.c
(since the merge of #27054) in sockets_can to enable parallel rx/tx.
Fixes#38698
Signed-off-by: Mateusz Karlic <mkarlic@internships.antmicro.com>
On LSM6DSO sensor the INT1 pin is used for both generating the drdy
interrupt and for switching to I3C hotjoin mode just after reset if
it is at logical '1' level. It might happen that after a board
reset the logical level '1' is preserved (maybe a level shifter)
forcing the LSM6DSO to enter erroneously in I3C mode, breaking any
attempt to communicate with it. (Fix#38902)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
In some scenarios when there is a need for multiple re-transmissions of
segmented messages the default value of 2 seconds may be not enough.
In my experience this improves stability of Configuration Client tests
involving multiple PTS instances.
Signed-off-by: Michał Narajowski <michal.narajowski@codecoup.pl>
Call and validate the new function. Note that this is actually
whiteboxing the heap implementation and duplicating the internal logic
needed to compute the header size, so as to validate that the correct
number is being returned. I had to write that test code anyway, might
as well commit it (the heap header is awfully well optimized now and
very unlikely to change).
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Add a simple internal block size predicate to expose the internal
memory region reserved for an allocation. The immediate use case is
cache-incoherent systems wanting to do an invalidate of freed memory,
but it might be useful for apps doing e.g. string processing to better
optimize size changes, etc...
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Commits affecting Zephyr that are included with the new revision:
47fdde0 Fix missing else in configuration;
30cf9fe zephyr: Fix BUILD_ASSERT failing build with correct number
of images.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This kconfig is only used for one board and is simply an alias
to another kconfig. So remove CONFIG_DW_ICTL_OFFSET and apply
the value directly to the other kconfig.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
If --no-manifest is specified, '-e' is still being passed
to rimage to build the extended manifest. Fix this so
that when --no-manifest is specified, '-e' is no longer
passed to rimage.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When CONFIG_KERNEL_COHERENCE=y (e.g on the various intel_adsp
platforms under SMP) it's not legal to share stack memory between
CPUs, because the stack is cached, and the L1 cache is incoherent.
The kernel will automatically detect the mistake when the memory
contains a kernel object (spinlock, IPC object, etc...). But here the
test was just passing async buffers into the msgq layer, and nothing
watches that.
The fix is simple: make them static.
Fixes#35857
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Remove explicit disable of Channel Selection Algorithm #2
in the mesh tests that use Extended Advertising.
Fixes#39188.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
The samples/subsys/mgmt/osdp utilize GPIO so having it set in the
prj.conf is needed since not all platforms enable GPIO by default.
To address the 'No SOURCES given to Zephyr library: drivers__gpio'
add a 'depends on gpio' to the sample.yaml to only build this on
platforms that have GPIO driver support.
Fixes#39180
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We support ARCv3 HS6x SMP systems now - let's update the
status in the documentation.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Move related areas to their own files and order
documentation logically from lower to upper layer.
Fix gross errors and inconsistencies.
Co-authored-by: Carles Cufí <carles.cufi@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Previously stats were kept in a single static but would be updated by an
idle thread per cpu core. Stats/debug info is now kept per cpu core.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Uptime in milliseconds is assigned to uint32_t variable, which results
in integer overflow after enough time has expired. Additionally
milliseconds part (which should be 0-999) is assigned directly from
uptime, without subtracting full seconds.
Fix both issues by using int64_t variable and calculating milliseconds
with modulo.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Convert all CS control logic to be based on the `gpio_dt_spec` member
instead of the standalone `port`, `pin` and `flags` members.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Use the standard `struct gpio_dt_spec` type in the chip select control.
The anonymous struct and union allows previous instantiations to
continue working while letting functions operate on the new type.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Adds a helper macro, `DT_SPI_DEV_CS_GPIOS_DT_SPEC_GET`, that constructs
a `struct gpio_dt_spec` corresponding with the CS gpio of an spi device.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Add an option to force close the LwM2M connection
instead of always trying to deregister.
If on a cellular connection and the connection is dropped,
deregistering will never complete and take a long time
before retries fail. This option allows the app to close the
socket and quickly re-establish the connection when the
network connection is available again.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Configure the target board to PASS the test case.
The PCLK2 clock feeding the SPI1 is reduced by 2 (apb2 prescaler)
to accept the slow freq config.
The SPI1 MISO and MOSI pins are linked on the HW board
(on arduino CN13, D11 & D12)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
