Zephyr implementation is limited to 4 IRQ per GPIO bank when up to 8 is
theoritically possible.
It is now possible to use until 8 IRQ per GPIO bank. This can be
achieved with minimal effort in a device tree overlay:
&gpio0 {
interrupts = <4 2>,<5 2>,<6 2>,<7 2>,<32 2>,<33 2>;
};
&gpio1 {
interrupts = <34 2>,<35 2>;
};
Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
MISRA C:2012 Rule 14.4 (The controlling expression of an if statement
and the controlling expression of an iteration-statement shall have
essentially Boolean type.)
Use `do { ... } while (false)' instead of `do { ... } while (0)'.
Use comparisons with zero instead of implicitly testing integers.
The commit is a subset of the original auditable-branch commit:
5d02614e34a86b549c7707d3d9f0984bc3a5f22a
Signed-off-by: Simon Hein <SHein@baumer.com>
if ISR is called for an event on pin X but
another event occurs on pin Y in between the call
to GetStatus() and ClrStatus(), pin Y event wil get
cleared without being processed
Signed-off-by: Maxim Adelman <imax@fb.com>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
add support for setting pinmux when using IOPCTL peripheral, as well as
setting pin configuration properties.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Fixed#41945
NO_PINT_INT can have the same value as a specific pin.
E.G. For 1 byte pint_pin_int_t it equaled interrupt1.
Now is instead always 1 higher than the highest pin.
Expects fsl to keep setting values from 0 to
(number of connected outputs - 1)
Signed-off-by: Martin Koehler <koehler@metratec.com>
PRE_KERNEL_1 is to be used for devices that have no dependencies
and do not use kernel features, such as those that rely solely on
hardware present in the processor/SOC. This commit updates these
gpios to initialize during the PRE_KERNEL_1 rather than the
POST_KERNEL. Some SoC drivers are moved to PRE_KERNEL_2 due
to dependencies.
A lot of 'other' drivers can depend on GPIOs though phandles
(such as reset lines, data or command gpios, etc...). Most of these
drivers that would need this would come up on the POST_KERNEL,
and it's likely the driver may not be up yet as it should be defined.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
Refactors all of the on-chip GPIO drivers to use a shared driver class
initialization priority configuration, CONFIG_GPIO_INIT_PRIORITY, to
allow configuring GPIO drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_DEFAULT or
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new
option is the lower of the two, which means earlier initialization.
Driver-specific options for off-chip I2C- or SPI-based GPIO drivers are
left intact because they often need to be initialized at a different
priority than on-chip GPIO drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Refactors the mcux lpc driver to use DT_INST_FOREACH_STATUS_OKAY instead
of hardcoding each instance. Tested with samples/basic/button and
samples/basic/blinky on mimxrt685_evk_cm33.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Move to using port property for a few cases in which we need to know
which specific hardware port a device is for. This allows us to
remove the PORT0/1 Kconfig options. This also fixes the issue that
assumed pio0 would map to DT_INST(0) and pio1 would map to DT_INST(1)
Fixes#35693
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert gpio drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
DEVICE_GET -> DEVICE_DT_GET
DEVICE_DECLARE -> DEVICE_DT_INST_DECLARE
etc..
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fixes gpio_mcux_lpc_port_set_masked_raw function inside gpio_mcux_lpc
driver. Writing masked data is correctly done using device registers.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Enable input buffer for both input and output pins.
The buffer must be enabled when the pin is used as
an input. Enabling the buffer enables reading back
the GPIO value when configured as output
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Need to call PINT_Init to initialize the block
before using it. This fixes the issue seen on
RT600 with the button example
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
- Use common clock names to avoid build error.
- Use GPIO_PortInit() to do reset/clock initialization. Only clock
enable is not adequate for RT600.
- Update to support differences between IOCON and IOPCTL modules
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit removes API functions and macros which were deprecated in
2.2 release. GPIO drivers are updated accordingly.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The mcux lpc driver assumes that PINT interrupts are assigned to GPIO
port instances in groups of four, meaning that GPIO0 uses PIN_INT0-3 and
GPIO1 uses PIN_INT4-7. There was a mistake in the pin assignment
calculation that caused GPIO1 to incorrectly attach pins to PIN_INT0-3.
This caused the gpio isr to be invoked with what appeared to be the
wrong device argument and therefore not invoke any of the expected gpio
callbacks. But actually, it was the wrong irq that fired.
Found when adding support for the accelerometer interrupt on the
lpcxpresso55s69 board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Use gpio_pin_t uniformly when passing pin indexes to the driver. Use
gpio_flags_t uniformly when passing flags to the driver. Change name
of pin configuration function in API function table to be consistent
with other API functions.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The only remaining port operations have dedicated API function table
entries. Remove the defines for access op (mode), and remove support
for access op from all implementations.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The last external reference to these was removed when the pin
write/read functions were deprecated. Remove the syscall support, API
function table entries, and implementation from all drivers.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
These have been replaced by the appropriate call to
gpio_pin_interrupt_configure(). While the disable function could be
implemented using the new functionality, the enable function cannot
because the interrupt mode is not available. Consequently we cannot
replace these with equivalent functionality using the legacy API.
Clean up the internal implementation by removing the inaccessible
port-based enable/disable feature, leaving the pin-based capability in
place.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
LPC GPIO architecture uses multiple devices.
GPIO input is routed via INPUTMUX to the PINT
device which roots the interrupt to NVIC.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Updates the mcux lpc driver and all associated boards to use new
device tree compatible gpio configuration flags. Implements new port
get/set/clear/toggle functions recently added to the gpio api.
ISR functions to be added later.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
move gpio.h to drivers/gpio.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Validates the gpio pin number before using it to index into a
memory-mapped register array. Otherwise, a user could send a high pin
number and cause an out-of-bounds access.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
We have been combining imported mcux drivers into a flattened directory
structure to maximize driver reuse, but the introduction of additional
nxp soc families (lpc and imx) to zephyr has introduced driver naming
conflicts. This caused us to rename and modify imported files, such as
fsl_gpio.c/h, to make them unique across all three nxp soc families.
This makes updating the the mcux drivers complicated, especially for the
lpc family.
Reoganize the mcux drivers into soc family subfolders, so we can just
copy all the drivers from an mcux distribution (which is done on an
soc-basis) into the appropriate soc family folder. Undo all of the
naming changes that occurred when lpc and imx drivers were originally
imported. Undo the accidental squashing of the kinetis watchdog and dcdc
drivers that occurred when the imx drivers were introduced.
The drawback to this approach is that we have duplicate files when the
same hw ip modules exist in multiple soc families, however there are
only few cases where this occurs, such as fsl_lpuart and fsl_trng.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add gpio mcux driver which can be used for lpcxpresso54114 and other lpc
socs. In this driver, CMSIS register access is made for GPIO.
Option for access by GPIO Pin is provided as of now.
Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
