Commit graph

211 commits

Author SHA1 Message Date
Felipe bd705e68b0 soc: xtensa: esp32: increase shared memory region
for esp32 and esp32_net because the default 2048
bytes are not sufficient for rpmsg usage.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2023-03-16 16:42:13 +01:00
Lucas Tamborrino fd2191b2b1 dts: esp32s3: Add wdt support
Add watchdog support for esp32s3

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-03-15 09:11:42 +01:00
Lucas Tamborrino c530eca285 dts: esp32s3: Add timers support
Add timer support for esp32s3

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-03-14 10:50:37 +01:00
Lucas Tamborrino fa358f9757 dts: esp32s3: Add SPI support
Add SPI support for esp32s3

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-03-13 14:02:06 +01:00
Iuliana Prodan 9d5c21d580 dts: xtensa: nxp: remove unused include
Remove unused include file from dtsi.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2023-03-11 08:44:07 +02:00
Marc Herbert 68c1cafb41 intel_adsp: dts: ace: lower case 71C00 to fix DTC warning
Fixes the warning below. This commit does not change the firmware
binary. Thanks Kumar Gala for the suggestion.

  build-mtl/zephyr/zephyr.dts:279.42-285.5: Warning (simple_bus_reg):
  /soc/ace_comm_widget@71C00: simple-bus unit address format error,
  expected "71c00"

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-03-07 08:33:30 +01:00
Lucas Tamborrino ca0c46604f dts: esp32s3: add i2c support
Add i2c support for esp32s3

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-02-28 14:44:47 +01:00
Sylvio Alves bbd40b85c0 soc: esp32s3: add base source content
This brings esp32s3 linker, DTS and all
necessary files to allow the soc support.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-02-27 19:41:33 +01:00
Adrian Warecki 55be5d81f2 ace: dts: Add watchdog device to the device tree
Added watchdog devices to the device tree of mtl platform.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-02-19 20:42:52 -05:00
Felipe Neves 865f4e64b5 dts: xtensa: esp32: modify esp32 dts
To split ipm area into ipm memory and
general use shared memory.

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2023-02-19 20:41:18 -05:00
Adrian Warecki 8794de2934 intel_adsp: soc: ace: Add communication widget driver
Intel DSP Communication Widget is a device for generic sideband
message transmit/receive between IPs in a SOC.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-01-18 10:47:21 +01:00
Jaska Uimonen a9b3d93550 intel_adsp: dai: Add support for ALH up to 16 nodes
ALH dts definitions need to have 16 nodes, thus add them to supported
platforms (cavs25 and ace15).

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2023-01-17 13:06:39 -05:00
Marek Matej 937ea00e7a drivers: adc: esp32: Add support for single-shot conversion
Allow single-shot adc conversion on all supported targets.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2022-12-23 23:45:05 +00:00
Tomasz Leman 73feb35e99 ace: dts: gpdma: add third controller
Meteorlake has three GPDMA controllers.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-12-21 10:11:41 +01:00
Jakub Dabek d76419973a devicetree: add virtual memory entry for intel platform
Add virtual memory entry in dt to use as virtual space
regions for aplication.
Add virtual memory definition in adsp_memory.h

Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
2022-12-20 07:03:55 -05:00
Serhiy Katsyuba 9cf89603df intel_adsp: dai: Add support for ALH streams 2 and 3
Adds two additional alh2 and alh3 "devices" to already defined
alh0 and alh1. This (seems) is a temporarily solution as
the hardware actually supports 16 streams and future update
to device tree is required.

Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
2022-12-17 06:47:55 -05:00
Tomasz Leman d9432ebcb9 ace: dts: hda: add power domain
Assigning power domain to the HDA DMA.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-12-16 11:03:15 +00:00
Tomasz Leman ff01458111 ace: dts: gpdma: add power domain
Assigning power domain to the GP DMA.

NOTE: Only controllers 1 and 2 are under IO_0 domain, controller 0 is
      under HUB-ULP domain.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-12-15 19:17:21 +01:00
Marek Matej 45d55205db drivers: esp32: temp: CPU die temperature sensor
Support for the measuring the CPU die temperature
for the ESP32 targets S2,C3. The ESP32 support
was ommited due to lack of offset calibration.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2022-12-15 18:21:39 +01:00
Marek Matej f86a7d2c25 drivers: dac: esp32: Add support for DAC controller
Initial DAC driver for the ESP32/ESP32-S2 SOCs

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2022-12-13 16:29:38 +00:00
Kai Vehmanen 2dd4cbc755 dts: xtensa: intel: update cavs25_tgph to match cavs25
Add definitions for DMAs, Digital Audio Interfaces (DAIs) and
the necessary clocks to enable full use of audio peripherals
in the intel_adsp_cavs25_tgph boards.

Link: https://github.com/thesofproject/sof/issues/6710
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-12-07 10:36:34 -05:00
Tomasz Leman 6052d9d1e6 ace: dts: dmic: add power domain
Assigning power domain to the DMIC interface.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-11-30 17:46:17 -05:00
Tomasz Leman 4dc4327f19 dts: xtensa: intel: fix typo in domain name
Fixing typo in HUB-HP domain name in dts.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-11-30 17:46:17 -05:00
Adrian Bonislawski a45caf868f drivers: dai: add Intel HDA dai
add Intel HDA DAI driver
Long device list in dtsi needs to be refactored in the future

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-11-29 19:42:33 -05:00
Arsen Eloglian 14adcc52db dts: add clkctl definition
Add clkctl definition for Intel ACE

Signed-off-by: Arsen Eloglian <ArsenX.Eloglian@intel.com>
2022-11-28 17:45:20 -05:00
Adrian Warecki 1c5f924628 ace: cavs: dts: Add d-cache and i-cache line size
Added i-cache-line-size and d-cache-line-size values
to device tree for cavs and ace platforms. These values
are used by sys_cache_instr_line_size_get and
sys_cache_data_line_size_get functions.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2022-11-23 15:39:05 -05:00
Adrian Warecki a8dd856042 dma: dts: gpdma: Add controller attributes to DT
Added to the device tree values of the dma-copy-alignment
and dma-buf-size-alignment attributes.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2022-11-23 15:36:31 -05:00
Adrian Warecki 17916833d3 dma: dts: hda: Add controller attributes to DT
Added to the device tree values of the dma-copy-alignment
and dma-buf-size-alignment attributes.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2022-11-23 15:36:31 -05:00
Adrian Warecki aac03280ec dma: dts: Rename of the dma_buf_alignment to dma-buf-addr-alignment
Renamed the dma-buf-alignment field to a more explicit
and descriptive name dma-buf-addr-alignment.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2022-11-23 15:36:31 -05:00
Arsen Eloglian c67666ae1b board: rename dtsi node 'lps' to 'dfpmcch'
dfpmcch covers lps memory mapping.
Making lps a part of dfpmcch.

Signed-off-by: Arsen Eloglian <ArsenX.Eloglian@intel.com>
2022-11-22 20:03:06 -05:00
Arsen Eloglian 692189d3b5 dts: add dfpmcch & dfpmccu definition
Adding DfPMCCH & DfPMCCU block register definitions.

Signed-off-by: Arsen Eloglian <ArsenX.Eloglian@intel.com>
2022-11-22 20:03:06 -05:00
Kumar Gala a1d0120d91 intel_adsp: Sort SoC nodes by address
Sort SoC nodes by address to make it easier to find them.  As part
of this also move the intel-sha node under SoC where it belongs.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-11-10 22:09:14 -05:00
Adrian Bonislawski 728e387aa2 dts: xtensa: intel: fix alh instances
"alh0: alh1:" will create only one instance and this needs to be
reverted to original form with two instances

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-11-09 09:09:20 -06:00
Kumar Gala bf5afbf823 intel_adsp: Move power domains under lps node for now
As the power domain nodes don't represent something accessible via
a MMIO register move those under the lps node to address warnings
generated when building the DTS.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-11-09 06:39:58 -05:00
Jaska Uimonen dd1c88d548 dts: xtensa: intel: fix alh base addr for cavs25
Cavs25 alh definition is currently the same as in ace platform, which is
wrong, thus fix it.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-11-03 10:23:49 +01:00
Flavio Ceolin d486bd1033 intel: ace15: Add adsp-sha entry in DT
Add a DT entry for intel-adsp-sha device in ace15 dts.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-10-31 12:45:33 -07:00
Anas Nashif 52297422fc timer: intel_adsp: use DTS for hardware information
Convert timer driver to use a light weight syscon and DTS and convert
register information to use offsets and sys_read/sys_write instead of
structs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Anas Nashif f33fb23810 intel_adsp: mem_window: do not depend on instance numbering from DT
This is not guaranteed to match the physical layout of the memory, so
get them individually based on node label.

For initialization, use bbzero.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 08:28:25 -04:00
Anas Nashif d148ea1d7f intel_adsp: mem_window: support read-only flag
Some windows might need to be set as writtable, so add a flag read-only
to DTS bindings which is set to true for all windows right now. This can
be set to false where needed.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 08:28:25 -04:00
Anas Nashif d038eb5dc7 intel_adsp: move memory windows to DTS proper
Instead of just declaring the memory window register in DTS and have
everything else all over the place (headers, Kconfig, etc.) this change
defines the memory window instances in DTS and uses the device model to
initialize the windows. Code is still part of the SoC, given that we do
not have a driver subsystem suitable for this type of device yet.

Move FW status to own workflow and separate from window setup.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 08:28:25 -04:00
Adrian Bonislawski 147d9cb127 dts: ace15: add Intel ALH to device tree
Add Intel ALH device tree entries to ace15

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-10-10 21:03:40 -04:00
Jaska Uimonen c9bf8ee4eb dts: xtensa: intel: add dmic dts definitions
Add Intel dmic dai dts definitions for ace15, cavs15 and cavs25
platforms.

Add also pre dts cmake files as the dmic nodes use same address and emit
warnings otherwise.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-10-05 12:41:45 +02:00
Lucas Tamborrino a11a103518 drivers: spi: esp32/s2: add DMA support
Add SPI DMA support for esp32/s2.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-10-04 10:35:14 +02:00
Grant Ramsay 897952370e drivers: ethernet: Add ESP32 Ethernet driver
This is to enable ESP32 Ethernet support

Signed-off-by: Grant Ramsay <grant.ramsay@hotmail.com>
2022-10-01 14:51:28 -04:00
Grant Ramsay 113f868ddf drivers: mdio: Add ESP32 MDIO driver
The MDIO driver is required to for ESP32 Ethernet

Signed-off-by: Grant Ramsay <grant.ramsay@hotmail.com>
2022-10-01 14:51:28 -04:00
Martí Bolívar 55f4075f92 dts: intel: cavs25: hack around awkward DT representation
Apparently, downstream drivers are allocating devices using
DT_NODELABEL(alh0) and DT_NODELABEL(alh1) on a node with compatible
intel,alh-dai. These represent something like "channels" within the
device.

This is a strange choice. It would be better to do something like have
a property with the count of "channels", or one child node per
channel.

It is also a dtc error to have duplicate node names like this, and
will be an error in Zephyr's dtlib soon.

For now, work around this representation issue by replacing it with
something equivalent that doesn't have duplicate nodes. The
representation should be addressed at some point, but not by me.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2022-09-21 07:55:40 -07:00
Lauren Murphy 85445474f2 boards, dts: fix filenames and dts refs for adsp clock
Changes filenames and DTS references from CAVS clock to
ADSP clock.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2022-09-14 07:23:08 -04:00
Lauren Murphy 1983a4c50c boards, dts: fix namespace for intel adsp cavs, ace
Fixes namespace for Intel ADSP CAVS and ACE boards.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2022-09-14 07:23:08 -04:00
Ederson de Souza fcdc9c78e2 soc/xtensa/intel_adsp: Get register address from DTS
Instead of hardcoding it where it's used.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-09-08 18:03:33 -04:00
Ederson de Souza 03a947850d drivers/mm: Get some bit configurations from DTS instead of SoC version
Migrate information to DTS and get it from there on the code. Note that
for CAVS 15, the information is not migrated as there's no DTS entry for
it. It can be brought back (in the DTS) if TLB support is enabled for
it.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-09-08 18:03:33 -04:00