Provide jtag port pins description, so they can be used to be set in
analog mode when not required to save power (around 40uA saved in total).
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
At chip startup, jtag pins are configured by default to enable
debug.
This configuration adds consumption and when using PM profile,
we can save ~40uA by resetting this configuration and setting pins
to analog mode.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
In some hardware designs it might happen that the reset signal
for the TLE9104 is not used only for this purpose, but instead for
instance to reset other devices at the same time. For such a hardware
design it is then necessary to make the reset GPIO optional. The reset
will have to be triggered earlier on.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This implements the daisy chain feature of the low side switch
BD8LB600FS. The daisy chaining is in hardware achieved via
connecting the MISO and MOSI lines of multiple instances of the IC
in a row. It is implemented in the driver through a variable number
of GPIOs on one instance. Therefore, one device tree instance of the
IC will handle multiple daisy chained physical instances.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
The STM32G0 soc has 2 CAN controllers. The 2nd on was not working
with zephyr yet as both controllers shares the same IRQ. Recently, the
shared irq system was integrated on now, both can controllers can work
on this chip. Shared interrupts must be enabled only if both can
controllers are enabled.
Signed-off-by: Adrien MARTIN <adrienmar@kickmaker.net>
When set, this GPIO controller has pins associated with the
keyboard controller. In this case the reg_gpcr property is
overloaded and used to write the keyboard GCTRL register
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit adds source and header files required for bmp581 I2C driver.
I have used bmp581_user.h to add more usage related definitions
but bmp581.h to add hardware related definitions.
Signed-off-by: Talha Can Havadar <havadartalha@gmail.com>
Signed-off-by: Gerhard Jörges <joerges@metratec.com>
Updated the files present in device_init, hfxo_manager, power_manager
and sleeptimer folder as per latest version of gecko_sdk.
Added SL_DEVICE_INIT_HFXO_PRECISION in sl_device_init_hfxo_config.
Signed-off-by: Sateesh Kotapati <sateesh.kotapati@silabs.com>
Many sensors have multiple functions, for example, icm42688 supports
accel, gyro and temperature, and the sensor streaming api always mixes
the multiple functions in one function call. So we need add a layer in
sensing subsystem to dispatch the result returned from sensor streaming
api for each function.
I changed the sensor-type(int) to sensor-types(array) in sensing sensor
device bindings, so that one device can map to multiple instances of
sensing sensor.
Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
Add hinge angle virtual sensor for sensing subsystem, hinge angle sensor
takes both base accel and lid accel as reporter.
Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
This commit introduces a driver for NXP's eDMA IP.
The main reasons for introducing a new driver are the following:
1) The HAL EDMA wrappers don't support well different
eDMA versions (e.g: i.MX93 and i.MX8QM). As such, a new
revision had to be introduced, thus requiring a new Zephyr
driver.
2) The eDMA versions found on i.MX93, i.MX8QM, and i.MX8QXP
don't use the DMAMUX IP (instead, channel MUX-ing is performed
through an eDMA register in the case of i.MX93).
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit updates the driver to use the flash layout pages,
rewriting it to utilize the flash_page_layout.c driver to
avoid duplicate code.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
This commit adds layput page cells to the atmel sam flash
controller and the flash node. These allow for describing
the actual flash page layout of each soc, allowing the
flash driver to fully utilize the capabilities of the
flash.
With this update, we unlock the following capabilties:
- utilize 2048 erase block size for small sectors
- utilize 16384 erase block size for large sectors
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Change the gpio_qdec driver to support optical encoders.
Add a property to use for defining an arbitrary number of GPIOs for the
sensing devices (typically infrared LEDs, but could also be the
biasing for the phototransistor), and one for adding a delay between
turning those on and reading the pin status.
The infrared LEDs typically consume a non negligible amount of power, so
there's also a new idle-poll-time-us property that enables two possible
modes of operation:
- if idle-poll-time-us is zero (default) the LEDs are enabled all the
time and the driver enters polling mode using the GPIO interrupt as
with mechanical encoders. This is usable for mains powered devices and
has the lowest overhead on the CPU.
- if idle-poll-time-us is non zero, then the driver polls the encoder
all the time, turning on the LEDs just before reading the state and
shutting them off immediately after, but when the encoder is idle it
switches the polling rate to idle-poll-time-us to save power, and only
polls at sample-time-us when some movement is detected.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Added new test for `DT_IRQ_LEVEL` and `DT_INST_IRQ_LEVEL`.
Introduced a new `vnd.cpu-intc` compatible so that we have a
root level interrupt controller that acts as level 1
aggregator, and modified `test_intc` to be level 2 aggregator,
updated test of `DT_IRQN(TEST_I2C_BUS)` accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
The meaning of txpo is was a bit confusing, as it's an enumeration
rather than a pad number. This confusion extended to the atsamd21_xpro
board using the wrong pins.
This commit adds ASCII-art tables that explain the meaning of rxpo
and txpo on different platforms.
Signed-off-by: Tom Rothamel <tom@rothamel.us>
The max size was determined by looking at the ARCH of the cpu. This really
comes from the ip configuration when generated. Add `max-xfer-size`
property to the devicetree.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
This cleans up the instantiation macro. DBG_COUNTER was also removed
as that appears to be unnecessary. This also allows for if it is a
serial target to be configured from the devicetree.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Adding driver for GC9A01A 240x240 based LCD displays.
Should be working with GC9C01 as well (untested).
Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
FU540 SoC has 16 GPIOs, this way, the GPIO API can perform correct
asserts when a pin is provided. Note that default is 32, correct for eg
FE310.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Change the synchronization of RMC and GGA NMEA messages from a
timeout to matching their UTC timestamps.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Add driver for NXP nx20p3483 power path controller that can be used
to control and protect sink and source path of USB-C connector.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Add calls to the PPC API that enables and disables the sink and source
paths in the appropriate USB-C stack states.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Add support of voltage control to Renesas PFC driver. Voltage register
mappings have been added to r8a77951 and r8a77961 SoCs.
Allow 'power-source' property for 'renesas,rcar-pfc' node. This property
will be used for configuring IO voltage on appropriate pin. For now it
is possible to have only two voltages: 1.8 and 3.3.
Note: it is possible to change voltage only for SD/MMC pins on r8a77951
and r8a77961 SoCs.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add definition of the DMIC to the RT5xx devicetree, including all
PDM channels.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Co-authored-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Add driver for NXP DMIC peripheral. This peripheral is present on the
iMX RT5xx and iMX RT6xx parts, as well as some LPC SOCs. The following
features are supported:
- up to 2 simultaneous channels of L/R PCM data (4 channels are not
supported due to limitations of the DMA engine)
- individual configuration of gain and filter parameters for each DMIC
channel input
The driver has been tested with up to 4 PCM data streams (2 L/R channels),
as well as the MEMS microphones present on the RT595 EVK.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Co-authored-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Extend api test suite to cover the new devicetree macros. This
includes extending the devicetree overlay with two new bindings:
- GPIO device which is also an interrupt controller
- interrupt holder using interrupts-extended to point to both
existing interrupt controller test_intc, and the newly added
GPIO device
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
add Master Inter-Data Idleness and
Master SS Idleness field. That fields
are integers.
Signed-off-by: Mustafa Abdullah Kus <mustafa.kus@sparsetechnology.com>
Add RGPIO gpio driver. This driver is used for i.MX93 and i.MX8ULP.
GPIO pinctrl, read/write and interrupt is supported. Runtime mmio
configuration is enabled, so no need for region definition in
mimx9/mmu_region.c
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
The wakeup-source is not used by the driver. Most probably this was
inadvertently left when copying the binding from pcf8523 driver.
Signed-off-by: Martin Jäger <martin@libre.solar>
Move the nRF comparator devicetree bindings from ADC to sensors, where the
rest of the comparator bindings are placed.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Since the pins of bt-spi instance are wired internally in the chip, it will
make sense to move the definition to soc dts so no need for every board
using the chip to redefine the same.
Signed-off-by: Aaron Ye <aye@ambiq.com>
