Add basic functionality of Renesas SD/MMC driver. It can be used
for both gen3 and gen4 R-car boards, but tested only with H3ULCB,
Salvator XS M3 and Spider boards. This driver working with SDHC
subsystem.
The driver supports regularal reading/writing throught SD/MMC
controller buffer, DMA mode w/o interrupts and timing tuning.
Add gpio5 and sd0 nodes to h3ulcb and salvator xs which are needed
for working with SD cards. The GPIO node is needed for switching
voltage on SD card through gpio regulator driver.
Notes:
* the driver doesn't support SPI mode;
* SCC tuning and DMA mode based on IRQs are enabled by default;
* an address of a data buffer has to be aligned to 128 bytes if it
is not, driver will use non-DMA mode automatically;
* Renesas MMC DMAC doesn't support 64-bit DMA addresses, so for
case when we have 64-bit xref data address we use non-DMA mode;
* SD/MMC controller supports block size between 512 and 1 with
a lot of restrictions, more details you can find in code;
* support of HS400 mode isn't implemented inside driver.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
This change marks each instance of the 'api' as 'static const'.
The rationale is that 'api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
In sdhc_spi_response_get, the logic for slow cards previously only
retried reads 16 times. Instead of using this approach, read from the
card every 10 ms until the command timeout is reached or it responds.
This way, the command timeout will be respected for cards that do not
respond.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
* Internal Clock not getting stable during initialization
* SD clock was not enabled
* Removed duplicate file.
* Removed write to readonly registers
* Moved function pointer structure from data section to RO section
* Wrong macro names
* Refactoring of lower layer header file.
Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@intel.com>
Fixes uninitialized variable return by returning zero
at the end of function.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
DDR50/DDR52 modes should use PINCTRL_STATE_SLOW (50MHz), so the lack of a
break statement after enabling DDR mode is expected. Add an explicit
__fallthrough to resolve the issue flagged by coverity scan
Fixes#65324
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Explicitly set host_io fields, instead of using memset(). This way the
fields should have values that are defined in the enum types for each
field.
Fixes#63130
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Added initial version of Infineon CAT1 SDHC/SDIO driver
Added initial version of binding file for Infineon CAT1 SDHC/SDIO
driver
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
add host controller driver support for emmc version 5.1.
The driver expose zephyr sdhc api interface for emmc host controller.
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
This commit adds support for the ATMEL HSMCI peripheral
for the SAM4E MCU series, enabling native SD card support.
Signed-off-by: Vincent van Beveren <v.van.beveren@nikhef.nl>
Enable SPI SDHC driver to manage card power via pwr-gpios property.
Control for this property was previously partially implemented. When
this property is present, the SPI SDHC driver will use it to control
power to the SD card.
Power is toggled during SD init, so this power control can make SD init
more reliable as the power toggle will insure the SD card state is reset.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Make it possible to use CPOL/CPHA SPI clock modes with the SDHC driver.
Some cards require the clock to switch to low when not active.
Signed-off-by: Łukasz Hejnak (LeHack) <lehack-ghub@lehack.pl>
The iMX platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".
Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for configuring power on delay when using SPI SDHC. This
allows cards that reliably initialize with a shorter (1ms) delay to
avoid the long initialize delay otherwise imposed.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add CONFIG_CRC for building CRC related routines.
CRC routines are now being built for each application, whether used or
not and are add in the build system unconditionally.
Keep CONFIG_CRC enabled by default for now and until all users have
converted to use the new option.
Partial fix for #50654
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Currently, the sdhc_card_busy function is unimplemented in the
SDHC SPI-driver. This causes some functions which rely on f_sync(),
such as fs_close(), to fail as it will timeout the busy-check. This PR
implements sdhc_card_busy by checking if the MISO-line is kept high to
check if the SD-card is idle (not busy).
Solves https://github.com/zephyrproject-rtos/zephyr/issues/49982
Signed-off-by: Ivan Herrera Olivares <ivan.herreraolivares@uantwerpen.be>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move to using SPI_CONFIG_DT_INST macro to initialization the
struct spi_config cfg_a. This fixes an issue with how the old
code was initializing the deprecated fields of spi_cs_control.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add SD response type masks, to allow drivers to mask out the
SPI or SD native mode response type based on the SD host controller
mode they use.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
with the legacy USDHC driver fully removed from the tree, the
nxp,imx-usdhc binding can now be used for the new SD host controller
driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add SDHC driver implementing spi mode support for SD cards. This driver
implements the standard SD host controller APIs, and sets the host
property "is_spi" to indicate to the SD subsystem the card will be
running in SPI mode.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Implement SDHC driver for NXP USDHC peripheral, supporting all api calls
available in the sdhc driver. This implementation leverages NXP's HAL,
and simply implements a shim layer over the HAL itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
