zephyr/dts/bindings/cpu/ite,riscv-ite.yaml
Filip Kokosinski 806c95163a dts/riscv: add missing riscv,isa fields and modify existing ones
This commit adds/modifies `riscv,isa` strings using the following rules:
* the ISA string is lowercase
* multi-letter extensions are preceded with the underscore mark
* if an extension is implied by another one, it is not specified - e.g. the
  D extension implies the F extension, so writing `rv32ifd` is redundant

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2023-09-14 14:34:34 +02:00

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YAML

# Copyright (c) 2020 ITE Corporation. All Rights Reserved.
# SPDX-License-Identifier: Apache-2.0
description: ITE IT8XXX2 RISC-V CPU
compatible: "ite,riscv-ite"
include: riscv,cpus.yaml