The workaround for the nRF52 anomaly 109 that is implemented in
the nrfx_pwm driver uses interrupts generated by a selected EGU
instance and by the enabled PWM instances (even if the interrupts
are not used in generation of the PWM output signals).
Add required IRQ_CONNECT calls so that those interrupts are
properly handled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This introduces pwm capture shim driver for NXP S32 EMIOS,
the driver uses SAIC mode that is supported for all channels,
to capture the counter value on each edge for period/pulse
measurement
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This prepares support pwm capture APIs by extended current pwm
shim driver but use a differrence hal component:
- Introduce a Kconfig options that will be set when PWM pulse
generation API is used, it is also used to select the hal
component. Guarding current code inside this Kconfig option
- Increase #pwm-cells to 3, flags is supported for PWM capture
- Do not require duty-cycle and polarity be set in dt, PWM
capture doesn't need it.
- Rename emum value for pwm-mode to keep only key information
- Add preprocessor in case no channel is configured for generate
PWM output, to avoid warning when build
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
NOCACHE_MEMORY depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT, so
don't try to select the symbol if not supported.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Drivers for nRF SoCs using pinctrl did not select PINCTRL. This means
boards are forced to enable PINCTRL.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Previously the pwm capture only support capturing on channel 1
and 2, because the slave mode controller was used, which uses
the signal TIxFP which is not available for channel 3 and 4.
This commit adds optional support for four channel capturing by
changing the method of capturing PWM signals to not use the
slave mode controller to reset the counter register. Instead the
counter is reset in the ISR. This will result in a slight loss
of accuracy but is still within an acceptable range.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
This introduces PWM driver with supporting PWM output
APIs based on NXP S32 EMIOS peripheral. This supports
three mode: OPWFMB, OPWMCB and OPWMB.
OPWFMB uses internal counter, the new period and duty
cycle takes effect immediately.
OPWMCB and OPWMB use external counter as timebase, changing
PWM period at runtime will impact to all channels share the
same timebase. Also the new period and duty cycle take effect
in next period boundary of the timebase
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Since the driver can now be also used on nRF91 Series, its name need to
be updated to not cause confusion.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Instead of directly configuring PPI channels, use the GPPI helper
provided by nrfx. This allows using the driver on nRF53 an nRF91
Series where DPPI is available instead of PPI.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
When possible, use separate GPIOTE tasks for setting the PWM output
high and low instead of using one task to toggle it. This is crucial
for DPPI where the same task cannot be used in more than one channel.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Otherwise a glitch can appear on the PWM output when the GPIOTE channel
is reconfigured (when GPIOTE releases the pin, GPIO takes control and
drives it to the last written state which may be different than that
used recently by GPIOTE).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This change introduces a new PWM driver for all CC13/26xx SoC.
See the documentation in ti,cc13xx-cc26xx-timer-pwm.yaml for detailed
usage instructions.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Adds driver for pwm on xmc4xxx using Capture Compare Unit 8 (CCU8)
module. There are two CCU8 nodes with each one having four slices.
Each slice has two output channels.
Unlike CCU4, this module can generate complementary high-side/low-side
signals for each output channel. A variable dead time can be added
during the off to on transitions to make sure that the
high-side/low-side signals are not on at the same time.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Adds driver for pwm on xmc4xxx using Capture Compare Unit 4 (CCU4)
module. There are four CCU4 with each one having four channels
Thus it's possible to have up to 16 pwm output signals. The output of
each channel can only be connected to a specific port/pin. The possible
connection and gpio configurations are defined using pinctrl.
The CCU4 module also has a capture mode. Capture support will be added
in the future.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
and enabled proper nrfx driver instance; instead, use one option per
peripheral type and include the corresponding shim driver flavor into
compilation basing on that option (not the one that enables the nrfx
driver as it was incorrectly done so far in some cases)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Updated the driver to support low power mode.
Introduced "enable-low-power" flag in device tree to
control(on/off) low power mode.
If flag added in DTS, during sleep BBLED will switch off the LEDs.
Otherwise BBLED will continue the configured blinking pattern on LEDs.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Implement a driver for the PWM controller MAX31790. This driver
also implements the RPM mode of the controller, which can
be accessed via setting pwm_flags_t accordingly to macros
defined in the driver specific header.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
If a timer is left running on an stm32mp1, (most likely) on the next run
the timer is stuck.
A simple timer reset before initialization fixes the issue.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
This patch adds support for PWM blink which is found in intel's
PCH hardwares.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Fix `PWM_SetupPwm` function being called with `numOfChnls`
argument equal to 2, when in fact only one channel is being set up.
Also add 'U' suffix to `pwmFreq_Hz` unsigned integer argument in
the function call.
Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
Since clocks aren't declared in the devicetree for the stm32mp1
co-processor. Read the resulting clock divider here instead.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Write PWM match registers directly instead of using the frequency and
duty cycle fields of the MCUX HAL driver. This allows the driver to take
full advantage of the resolution supported by the FlexPWM when setting
duty cycle and carrier frequency.
Fixes#59080
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Current implementation of `nrfx_pwm_stopped_check()` doesn't work
as expected when user doesn't provide event handler.
Workaround for that is to use low level function for checking whether
STOPPED event arrived.
The workaround should be removed when `nrfx_pwm_stopped_check()`
will contain needed functionality.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
The HAL function PWM_SetupPwm does the inverse division to get the
number of pulses from the frequency.
In the case of a prescaler of 1 and a period of UINT16_MAX cycles
this would result in an uint16_t overflow.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
New nrfx release aligns PWM fields in driver instance structure
to common nrfx naming convention.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Some STM32 timers have more than one interrupt available.
When such timer is used it's likely that the first found interrupt
will not be the proper, 'cc' interrupt for input capture.
Existing implementation always connected the first irq, which worked
for timers with single, 'global' interrupt but broke input capture
for advanced timers with more interrupts.
Improve the IRQ connection logic by connecting the 'cc' interrupt
if it exists. Only if not found use the fallback mechanism of taking the
first index
Signed-off-by: Marek Metelski <marek@metelski.dev>
The rvm32m1 platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The Microchip XEC platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
HAL API changes in ethernet and pwm
SoC RT595 power management code change
west.yml update
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
MISRA Rule 5.7 requires uniqueness of tag identifiers. Shell is
frequently problematic because many code uses `const struct shell
*shell`. This causes CI noise every time one of these shell files is
edited, so let's update all of them with `const struct shell *sh`
instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add LEDC device for esp32s3
Update PWM LED binding
Remove invalid comment from driver source file
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".
Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
