These list of files add basic support for StarFive
JH7110 SOC Device Tree includes for VisionFive2
board.
Signed-off-by: Pratik Farkase <pratik.farkase@wsisweden.com>
Split the common keyboard scanning code out of the XEC specific driver
and use the generic code instead.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert the XEC keyboard scanning driver from kscan to input, add the
corresponding kscan compatibility node to the current board, build test
only.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This is a follow-up to commit 4db40601dd.
There are two ECB instances in nRF54H20 and the above commit added
only one of them.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
And add the corresponding bindings.
Move alse the already existing bindings for nrf-dppic, nrf-ppi,
and nrf-ipc so they are located together with the new ones and
in more appropriate folders (DPPIC and PPI peripherals are not
related to ARM, and IPC is for sending and receiving events,
not messages, so ipm/ does not seem to be the best fit for it).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enabling peripherals at SoC dts files should not be done, unless there
are good reasons (e.g. always needed peripherals). NFCT node should
either be enabled at board level, or, at application level.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Some CAN transceivers have a lower limit on their supported bitrate. Add an
optional "min-bitrate" for specifying this limit via devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The pit had a few warnings about
the format of the register address
being uppser case and one of the
reg index values were incorrect.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Add new devicetree bindings for F4 and L1 series for configuration of
block size used in flash write operations.
Allow byte-size write operations in `flash_stm32f1x.c`. This file is
being shared between F0, F1, F3, L0 and L1 series. L0 and L1 series
allows for single byte writes.
Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
This commit enables the IRQSTEER interrupt controller
on NXP's XTENSA-based i.MX8QM and i.MX8QXP.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Define the MPU attribute to be ATTR_MPU_EXTMEM for the
external region (qspi- or octo-spi NOR flash)
starting at 0x90000000 of the stm32h7 serie.
A XiP region should be Included inside with attribute
ATTR_MPU_IO, to access the external memory in XIP.
The stm32h7a/h7b serie as another external area at 0x70000000.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add Nuvoton numaker series flash memory controller(RMC) with erase,
read & write features of soc-flash.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Add Open Alliance spi protocol support.
Open Alliance is a chunk-based SPI protocol, based on sending
over SPI an ethernet frame divided in smaller chunks, using a
specific 32-bit header for each chunk transferred. All chunks
can be sent or received by a single dma transfer.
Default mode is set to Open Alliance SPI without protection,
since the adin2111 dev. board comes shipped this way.
Tested:
- Open Alliance SPI, no protection (default board shipped)
- Open Alliance SPI, protection
- Generic SPI, no crc
- Generic SPI, with crc8
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Define a single node that reflects the LCDC IP. Instead of defining
the same IP block twice with different compatibles (mipi dbi, display)
we define a single node for the default display interface and
other interfaces like the MIPI DBI should override the compatible entry
with the appropriate one within its DTS overlay file.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
Exhibit Renesas LCD controller's driver implementation. The driver
is intended to employ the controller in the continuous mode so
it can drive display panels in the parallel RGB mode.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
The MRAM has no concept of erase blocks or pages, so this is treated as
driver configuration.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Enabled the PIT and Multi channel support
for some of the rtXXXX devices.
- rt1010
- rt1060
- rt1160
- rt1170
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Updating the nxp,pit driver to support mutliple
channels. Updating the dts and board overlays
to account for the changes.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Add a new binding that should help with samples or MBOX tests by getting
information from DT.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
For sharing pin definition property with `worldsemi,ws2812-gpio`,
rename `output-pin` to `gpios`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
ws2812-gpio's `in-gpios` property is not used as an input pin.
Renaming it to `gpios` to reflect the actual situation.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
By default N_VBUSEN signal is used by the host to define if VBUS
signal should be used for power supply (VBUS-IPSOUT).
This feature enables the possbibility to change this behaviour.
When N_VBUSEN detection is disabled, axp192 will automatically
decide to use VBUS (REG10H[7] = 1).
Please refer to datasheet for details.
Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
AXP192 features an EXTEN pin that is on output only.
This commit appends control of EXTEN pin to gpio functionality
of AXP192.
Port-Mapping is as follows:
- [0..4]: GPIO0..4
- [5]: EXTEN
Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
This adds the minimal get_time/set_time support for the rp2040 and
enables support by default on the Pico boards. This doesn't support
configuring the clock source or alarm interrupts yet.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Utilization of chip interrupt line is mandatory to assure proper
charger state control. Handle interrupt to prepare the driver for
implementation of such functionality.
Modify charger status update so the current state is fetched in the
interrupt handler.
Use level based interrupts combined with interrupt disabling for a
period of time after interrupt handling to reduce number of interrupts
triggered by the charger. There may be a case where the charger
produces burst of interrupts for a several seconds and if the code
attempts to handle every single interrupt separatery then the system
might be significantly overloaded.
Co-authored-by: Bartosz Bilas <b.bilas@grinn-global.com>
Signed-off-by: Lukasz Madej <l.madej@grinn-global.com>
Add new bindings to describe the BELLBOARD peripheral in its two
_programming modes_ local or remote.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add a new nodes for PPR's VEVIF. In app cores, VEVIF registers are part
of the VPR peripheral, so it is exposed as a child node (since it
requires its own properties, eg #mbox-cells). In VPR, it's a CPU child
since it's not a memory-mapped peripheral, but used with CSRs.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
To allow EDMA configuration with the help of the DT_INST_DMAS_*
and DT_DMAS_* macros, all that a consumer node needs to know
is which channel to configure and what MUX value needs to be
used. As such, this commit allows doing this by forcing the
dma-cells property to 2, each cell representing one of the
aforementioned properties.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
To enable per peripheral queue pool sizing options add some bindings to
the i2c controller to setup sq/cq pool sizing.
Its possible this could go away with a shared application pair of pools.
The shared pool would require some added function pointers though to
deal with the variants as the shared pools would need a lock.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Added is_enabled devicetree property to fake regulator.
Allows testing of init behaviour when regulator is enabled
in hardware.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
On HAL RTD version 1.0.0, there is available Canexcel_Ip_DeactivateMD()
API that have similar capabilities as can_nxp_s32_abort_msg() API,
can use to instead.
Remove the reg grp_ctrl and reg base_dsc_ctrl that unused
after implementation this.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
