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630 commits

Author SHA1 Message Date
Jordan Montgomery a7014d01da drivers: adc: Add support for TI ADS1112 ADCs
This PR adds a custom driver for the ADS1112 ADCs. Unlike ADS1113/4/5
family served by the ADS1x1x driver, the ADS1112 does not use an address
pointer to address config registers. Instead, there is only one writable
register and all i2c writes will set it. The registers resemble the
ADS1119 device, but config bitmap is different, include a distinct data
rate table, gain table, and input multiplexing table. There is also not a
status register to be monitored with the ADS1112, as it uses config bit 7
for the same purpose instead of a separate register.

The driver was tested on hardware using the ADC shell interface. Manual
probing validated the voltages for the MUX_SINGLE configs at datarate 15
in CM_SINGLE. Higher gains were not tested and CM_CONTINUOUS is not
supported in this initial implementation.

The new driver has also been added to the existing ADC test using adc_emul
for completeness.

Origin: original
License: Apache 2.0
Purpose: Adding support for ADS1112 ADCs

Signed-off-by: Jordan Montgomery <jordan.montgomery@getcruise.com>
2023-06-17 07:49:59 -04:00
Ryan McClelland 77fb2025a8 drivers: adc: ads1x1x: fix pga enum comment
The pga enum internal reference voltage and gain values
were fixed in the code, but a comment was forgotten to be
updated. Correct the comment to match how the code uses
the enum.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2023-05-31 10:35:53 +02:00
Benedikt Schmidt 4540c833a8 drivers: adc: Implement the current sources of ADS114S08
Implement support for the current sources of ADS114S08.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-05-27 05:33:52 -04:00
Benedikt Schmidt bb679532f4 dts: bindings: adc: Add configurable current source pin for ADCs
Add a property to the ADC channels which allows the configuration
of the current source pin.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-05-27 05:33:52 -04:00
Guillaume Gautier ec73e7dae5 drivers: adc: stm32: use feature macros instead of series macros
Define two macros for calibration and oversampling for STM32 series that
possess these features, and use these macros instead of a list of series.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-05-25 13:32:08 +00:00
Guillaume Gautier 3ee6ddff29 drivers: adc: rework oversampling for stm32 adc
Rework oversampling by creating a const table containing possible
oversampling values and using this table instead of switch case.
Also disable ADC for all series before setting oversampling.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-05-25 13:32:08 +00:00
Rihards Skuja ecc3315cf8 drivers: adc: stm32: allow to use multiple ADCs with STM32F3 series
STM32F3 have multiple ADCs that share the same IRQ.

Signed-off-by: Rihards Skuja <rihards.s@origin-robotics.com>
2023-05-22 15:26:26 +02:00
Jerzy Kasenberg ce4018511f drivers: adc: add adc support for Smartbond devices
Renesas Renesas SmartBond(tm) have two ADC blocks:
GPADC and SDADC.
This change adds drivers for both.
Each ADC supports only one channel setup, drivers allow
to have multiply channels in sequence. Switching
between ADC sources in done in software.

GPADC has 10 bit resolution (accuracy can be increase
with oversampling). Values up to 3.6V can be measured
on selected pins. V30 and VBAT1 can also be measured.
SDADC has 14 bit resolution and can take measurements
from 8 pins (single of differential) and VBAT.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2023-05-22 12:41:42 +02:00
Guillaume Gautier b5e750851e drivers: adc: make use of new stm32 adc compatibles
Several sections of the STM32 ADC driver are #ifdef by a combination of the
same SOC defines that share similar IPs. These are F2/F4/F7/L1, and
F1/F37x.
Each of these combinations is now replaced by a specific compatible, which
makes the code a bit lighter and more succinct.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-05-16 18:18:51 +02:00
Guillaume Gautier 649742f47e drivers: adc: add ifdef for stm32f37x adc
Add ifdef around some functions that don't exist for STM32F37x (ADC_V2_5)
like it is done for STM32F1x.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-05-16 18:18:51 +02:00
Guillaume Gautier c1a601397f drivers: adc: cleanup stm32 adc driver
Inverts the logic of some #ifdef, replacing lists of newer series by a
list of NOT older series. This makes it shorter, and more future-proof as
future series are more likely to work out of the box, without need to
manually add a new define in each place.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-05-16 18:18:51 +02:00
Guillaume Gautier bab52fbc81 drivers: adc: clean stm32 adc calibration
Rework and clean some code around STM32 ADC calibration

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-05-16 18:18:51 +02:00
Guillaume Gautier 5180b6fac6 drivers: adc: rewrite stm32 adc enable
Some STM32 families that need to check the ADRDY flag after enabling the
ADC were not doing it. The #ifdef has been updated to fix that.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-05-16 18:18:51 +02:00
Guillaume Gautier 291e4c2561 drivers: adc: add comment to describe different adc versions
Add comment to describe different ADC versions

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-05-16 18:18:51 +02:00
Andrei Emeltchenko 7119cc1605 drivers: adc: adc_ads114s0x: Fix missing assignment
Fixes assignment before error check.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2023-05-15 09:58:28 +02:00
Benedikt Schmidt ecac441171 drivers: gpio: implement GPIOs in ADS114S08
Implement GPIO exander within the ADC ADS114S08.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-05-11 12:04:15 -04:00
Guillaume Gautier a7b8a5d61f drivers: adc: use dts properties for stm32 adc sampling time
Use the new dts properties for sampling time in the STM32 ADC driver:
- Get the sampling time from dts
- Remove all sampling time macro concatenation.
- Simplify/refactor setting of sampling time
- Check that sampling time is the same for all series using common channel

This also fixes a few cases where wrong sampling times were used for an
ADC instance (like ADC4 on U5, or ADC3 on STM32H723).

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-05-11 10:25:54 +00:00
Jared Baumann 26ee337517 drivers: adc: Rename gecko IADC config option
Renamed CONFIG_ADC_GECKO to CONFIG_IADC_GECKO to eliminate confusion
between the Incremental ADC found on series 2 silabs gecko MCUs, and the
ADC found on earlier gecko series.

Signed-off-by: Jared Baumann <jared.baumann8@t-mobile.com>
2023-05-09 23:31:45 +09:00
Antonio Tessarolo 4598e6bf0a drivers/adc: imx6sx ADC support.
This commit adds support for adc_vf610 ADC.

Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
2023-05-08 16:42:40 +02:00
Cyril Fougeray 1be72d9888 dma: callback with 2 status codes for successful transfers
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2023-05-08 09:57:32 +02:00
Benedikt Schmidt 6d6f6eb3ee drivers: adc: add driver for ADS114S08
Implement a driver for the ADC ADS114S08

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-05-04 10:47:56 +02:00
Tom Burdick da5030eae1 adc: ADS7052 correct spi configuration
SPI configuration did not set bit ordering or more importantly the clock
polarity which seemed to be misconfigured. Setting this corrects one more
quirk when working with this part on the TDK Robokit1

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-05-03 08:46:37 -05:00
Declan Snyder 4b45928e86 drivers: lpadc: Move SOC code out of driver
To be consistent with the current NXP clocking scheme,
move the LPADC clocking code to the SOC files where
all of the other peripheral clocking is done.

Also remove any other SOC-specific code to the
respective SOC file and out of this driver.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-04-28 10:08:05 +02:00
Declan Snyder af6b9d857f drivers: lpadc: re-add power level code
Code for power level property was accidentally
removed by accident from driver in commit 9921c59f40

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-04-28 10:08:05 +02:00
Bill Waters 3e02d48e4e driver: adc: infineon: Adding ADC driver
- This includes the driver, test app, and sample app
- Only the boards\arm\cy8cproto_062_4343w board is supported for now

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2023-04-27 10:16:23 -07:00
Guillaume Gautier f3a8279996 drivers: adc: get resolutions from dtsi for stm32 adc
Simplify the STM32 ADC driver code by using the new ADC resolutions
property in dtsi files.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-04-26 12:53:03 +02:00
Declan Snyder 9921c59f40 drivers: lpadc: Make DT props match RM
- Remove build asserts in favor of DT enums
- Remove power level property since it is unused by SDK
- Correct voltage ref value in DT to correspond to
  chip specific values documented in reference manuals
  instead of corresponding to SDK enum names.
- Fix SOC devicetrees affected by these changes.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-04-25 19:59:23 +02:00
Brian Juel Folkmann f05b6f412e drivers: adc: stm32h5 adc driver must wait about 1ms after enabling
port commit f7f47dc to stm32h5

Without this fix, ADC driver will hang when reading internal channels.

Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
2023-04-24 13:34:50 +02:00
Gerard Marull-Paretas 989d103d53 drivers: all: mcux: remove conditional support for pinctrl
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 13:34:22 +02:00
Mateusz Sierszulski 0417d38d4d drivers/adc: add Gecko IADC driver
This commit adds the Gecko IADC driver and support for it to the
efr32bg_sltb010a board.

Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
2023-04-21 16:24:39 +02:00
Benjamin Björnsson f08b80054e drivers: adc: adc_emul: Move semicolon to allow for multi-instancing
Move semicolon from end of DT_INST_FOREACH to DEVICE_DT_INST_DEFINE
to make multi-instancing possible. This caused some problems with
CI after adding adc node to native_posix dts.

Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
2023-04-20 10:48:33 +02:00
Gerard Marull-Paretas 1eb683a514 device: remove redundant init functions
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 10:00:25 +02:00
Tim Lin bcb173becd tests: drivers: Unit test for it82xx2_evb board
The below is the unit test result for the driver and kernel of
it82xx2_evb board.

GPIO/gpio_basic_api: PASS
I2C/i2c_api: PASS
Flash: PASS
UART/uart_basic_api: PASS
PWM/pwm_api: PASS
WDT/wdt_basic_api: PASS
KSCAN/kscan_api: PASS
kernel/sched/schedule_api: PASS
kernel/sched/preempt: PASS
kernel/timer/timer_api: PASS
kernel/sleep: PASS
ADC/adc_api: PASS.
ADC note: conversion time~=61.6us
          sample time delay~=60us
          wait voltage stable time~=202.8us
Set sampling time to 500us will pass for ADC test.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-04-19 03:48:38 -04:00
Gerard Marull-Paretas 667eeb11fb shell: fix MISRA 5.7 violations on struct shell
MISRA Rule 5.7 requires uniqueness of tag identifiers. Shell is
frequently problematic because many code uses `const struct shell
*shell`. This causes CI noise every time one of these shell files is
edited, so let's update all of them with `const struct shell *sh`
instead.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-14 12:21:08 +02:00
Declan Snyder 65aad527b7 drivers: lpadc: Enable VREF in init
Enable VREF peripheral in the LPADC init
so that ADC can measure voltages properly.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-04-13 16:13:25 +02:00
David Leach 70d045fd7a drivers: adc: Add LPADC driver support to lpc55s36
Add LPADC support to LPC55S36 SOC platform

Signed-off-by: David Leach <david.leach@nxp.com>
2023-04-13 16:13:25 +02:00
Hake Huang e01586a03a driver: adc16 dma support async and repeat sample
add support for async call and repeat sample test

1. change the DMA req to 2 byte each
2. increase the buffer pre-dma
3. add protection on invalid buffer

depends on: PR #56104
fixing: issue #56070

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2023-04-13 10:00:24 +02:00
Hein Wessels 6427ba861c drivers: adc: stm32h7: remove oversampling workaround
Removes a workaround that was required while there was a bug in
upstream STM32 HAL drivers where the oversampling was not set
correctly in all cases. This has since been fixed, and also
added to the Zephyr STM32 HAL.

The upstream issue:
https://github.com/STMicroelectronics/STM32CubeH7/issues/177

Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-04-13 09:59:42 +02:00
Gerard Marull-Paretas a5fd0d184a init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by:

- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices

They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:

```c
struct init_entry {
	int (*init)(const struct device *dev);
	/* only set by DEVICE_*, otherwise NULL */
	const struct device *dev;
}
```

As a result, we end up with such weird/ugly pattern:

```c
static int my_init(const struct device *dev)
{
	/* always NULL! add ARG_UNUSED to avoid compiler warning */
	ARG_UNUSED(dev);
	...
}
```

This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:

```c
static int my_init(void)
{
	...
}
```

This is achieved using a union:

```c
union init_function {
	/* for SYS_INIT, used when init_entry.dev == NULL */
	int (*sys)(void);
	/* for DEVICE*, used when init_entry.dev != NULL */
	int (*dev)(const struct device *dev);
};

struct init_entry {
	/* stores init function (either for SYS_INIT or DEVICE*)
	union init_function init_fn;
	/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
	 * to know which union entry to call.
	 */
	const struct device *dev;
}
```

This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.

**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

init: convert SYS_INIT functions to the new signature

Conversion scripted using scripts/utils/migrate_sys_init.py.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

manifest: update projects for SYS_INIT changes

Update modules with updated SYS_INIT calls:

- hal_ti
- lvgl
- sof
- TraceRecorderSource

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: devicetree: devices: adjust test

Adjust test according to the recently introduced SYS_INIT
infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: kernel: threads: adjust SYS_INIT call

Adjust to the new signature: int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-12 14:28:07 +00:00
Gerard Marull-Paretas 0ebe14beb4 sys: util: migrate all files to DIV_ROUND_UP
ceiling_fraction is deprecated, use DIV_ROUND_UP.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-11 12:00:37 +02:00
Al Semjonovs 9fa35bc9a0 adc: Add TI ADS7052 SPI driver
Add driver for TI ADS7052.

Signed-off-by: Al Semjonovs <asemjonovs@google.com>
2023-04-07 16:23:17 -05:00
Benjamin Björnsson 05e9387663 drivers: adc: adc_stm32: Add support for C0-series
Add support for ADC on STM32C0-series.

Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
2023-04-07 08:18:03 +00:00
Pieter De Gendt 6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Kumar Gala a29bc8d086 adc: fix armclang compiler warnings with is*() functions
We get compile warnings of the form:

error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
 [-Werror,-Wint-in-bool-context]
                if (!isprint(byte)) {
                     ^

Since isprint (and the other is* functions) return an int, change check
to an explicit test against the return value.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2023-04-04 14:07:14 +02:00
Mahesh Mahadevan 793f1dacec drivers: adc_mcux_lpadc: Fix the config initilization
offset_b of the config structure was never initialized.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-04-03 10:22:27 -05:00
Francois Ramu 3f6a3d6031 drivers: adc stm32adc driver for the new stm32h5 serie
Add the support of the new stm32h5 to the stm32 ADC driver
Note : LL_ADC_CLOCK_ASYNC_DIV6 is the value for getting the
expected results of ADC.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-04-03 09:50:43 +02:00
Jordan Yates 5e09f5b1f1 adc: adc_mchp_xec: fix CONFIG_PM_DEVICE compilation
Replace pointer construction macro with value from config struct.
Fixes what appears to be an oversight from #55522.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-03-28 17:36:32 -04:00
Henrik Brix Andersen c41dd36de2 drivers: kconfig: unify menuconfig title strings
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".

Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-28 15:06:06 +02:00
Francois Ramu f7f47dc437 drivers: adc: stm32 adc driver must wait about 1ms after enabling
After enabling the ADC, the peripheral has a certain delay (about 1ms)
to set its ADC Ready flag in the ADC ISR register.
In between, the ADRDY is still 0 and the ADEN is 1 in the CR.
The ADC can be used for conversion, only when the ADRDY bit is set

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-03-28 09:57:28 +02:00
scott worley 6b8bc83f54 tests: adc: Microchip XEC fix ADC API test and ADC shell
Microchip XEC ADC and ADC V2 driver were merged into one
That PR did not change the ADC API test and ADC shell resulting
in twister build failures. Fixed both ADC API test and ADC shell.

Signed-off-by: scott worley <scott.worley@microchip.com>
2023-03-24 11:28:20 -04:00
Manimaran A c3b2dbd1fb driver: adc: microchip: Keep single adc driver for MEC devices
Deleted adc_mchp_xec.c and microchip,xec-adc.yaml file.
DTSI, yaml, CMakeLists.txt and Kconfig.xec files are
updated for compatible.

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
2023-03-23 11:43:30 -04:00
Manimaran A 51b1c5b9d6 driver: adc: microchip: Merged MEC172x and MEC15xx version drivers.
Updated the "adc_mchp_xec_v2.c" adc driver to support both MEC172x and
MEC15xx SOC.
ADC smapling clock configuration updated using DTS.

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
2023-03-23 11:43:30 -04:00
Manimaran A f6a0d9c7f7 driver: adc: microchip: MEC172x driver clean up
adc_mchp_xec_v2.c driver clean up by variable name change
and redundant macro removal.

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
2023-03-23 11:43:30 -04:00
Daniel DeGrasse e587047dc6 drivers: adc: rewrite mcux LPADC driver
Rewrite MCUX LPADC driver, to better utilize hardware.
the following changes have been applied:
- channel numbers now correspond to hardware channel command slots,
  use "input_positive" and "input_negative" fields along with channel
  definitions in dt-bindings/adc/mcux-lpadc.h to select a channel
- the number of channel command slots available is configurable via
  CONFIG_LPADC_CHANNEL_COUNT
- Side A and side B channels are now supported
- differential channel mode is now supported
- ADC channels now are sampled via hardware, without additional
  software triggering

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-03-23 08:58:44 +00:00
Pieter De Gendt 0b45710219 drivers: adc: adc_sam: Introduce Atmel SAM ADC driver
This commit adds support for Atmel SAM ADC driver with up to
16 channels.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-03-23 09:41:00 +01:00
Hein Wessels 36f592ddbc drivers: adc: stm32: only handle OVR flag when supported
STM32 ADC DMA support added in #52965 incorrectly assumed
that all ADC devices have a OVR flag. This commit changes
the driver to only account for it if it's found in the
LL drivers.

Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-22 09:34:42 +01:00
Gerson Fernando Budke 6951160dd2 drivers: afec: sam: Enable sam4e SoCs
Add support to Atmel SAM SAM4E AFEC feature.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Gerson Fernando Budke 6634d6b4ff drivers: afec: sam: Update to use clock control
This update Atmel SAM afec driver to use clock control driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Hein Wessels a2dd232410 drivers: adc: stm32: dma support
Sampling multiple adc channels at once using dma

Only verified to be working on nucleo_h743zi

Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-20 16:29:24 +01:00
Francois Ramu 551be5c7f6 drivers: adc: stm32 adc driver disable before calibration
In the adc_stm32_init() function, when adc_stm32_calib() is called,
the ADC is not yet enabled but still disabled.
This patch makes sure to Disable the ADC before  its calibration.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-03-08 11:06:27 +01:00
Jay Vasanth f8d9465332 pm: adc: MEC172x adc device PM support
update MEC172x adc driver to support device PM.
Implement pm resume and suspend actions to put adc
pins in proper state for suspend and resume.
Notify kernel of busy when adc sampling is in progress.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2023-03-01 08:41:16 -06:00
Tim Lin 00e6c19ab5 ITE: drivers/adc: Add config of ADC reference voltage full-scale 3300mV
This option can enable ADC internal reference voltage as
full-scale 3300mV.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-02-23 08:59:54 +01:00
Cyril Fougeray f43292a01a adc: stm32: stop ADC before disabling it
It is advised to stop any ongoing ADC conversion before
disabling the peripheral.
Added some comments so that ADC state isn't left into
intermediate state that would prevent correctly
enabling or disabling the peripheral

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2023-02-22 12:05:32 +01:00
Daniel DeGrasse f7d9ea889b drivers: adc: support side B channels in LPADC driver
Add support for side B channels in MCUX LPADC driver. Given
that no instances of the IP block have more than 8 a side channels,
use channel numbers over 8 to indicate side B channel is desired.

Fixes #51076

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-02-08 01:08:08 +09:00
Andrei Emeltchenko 3f0487b725 drivers: adc_ads1119: Fix using wrong status bit
Fixes using wrong status bit for ADS1119_STATUS_MASK_ID. Moreover
using BIT(8) does not make much sense for working with uint8_t.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2023-01-27 18:09:49 +09:00
Guillaume Gautier 6deebdd13a drivers: adc: Remove now unused variables for STM32 ADC
Remove boolean variables for internal channels now that we use channel
number directly

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-01-25 15:00:21 +00:00
Guillaume Gautier 9c6d44ef5a drivers: adc: Simplify STM32 ADC channels setup
Now that we have the information of internal channel number for STM32
ADCs in the dts, we can use it to remove a lot of specific code and
make it clearer.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-01-25 15:00:21 +00:00
Erwan Gouriou 34e49a7c54 drivers: adc: stm32: Refactor driver init section
Slightly refactor STM32_ADC_INIT macro.
adc_stm32_cfg_##index declaration is now part of ADC_STM32_INIT
and extracted from CONFIG_ADC_STM32_SHARED_IRQS #ifdef.

Aim is to minimize code duplication when adding new adc_stm32_cfg_X
or adc_stm32_data_Y entries

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-25 15:00:21 +00:00
Hein Wessels 6724c8d1fe drivers: adc: stm32: only teardown channel after context complete
Previously channels could be tore down before a sequence completes,

either when using async, or when ADC_ACTION_REPEAT was specified

The teardown is now moved to after an entire context is complete

Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-01-23 09:59:46 +00:00
Hein Wessels cbe52e9027 drivers: adc: stm32: support multiple channels
Support sequencing multiple channels into a single read

Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-01-23 09:59:46 +00:00
Hein Wessels dce0eb7e8f drivers: adc: adc_context: add optional context_on_complete
This optional function allows a driver to do operations

after a complete sampling sequence is completed.

Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-01-23 09:59:46 +00:00
YuLong Yao aed1f1ac5b drivers: gd32_adc: add support for gd32a50x series.
add support for gd32a50x series.

Signed-off-by: YuLong Yao <feilongphone@gmail.com>
2023-01-12 21:45:38 +01:00
Daniel DeGrasse 29c53f4f6a drivers: adc_mcux_lpadc: add clock setup for RT5xx SOC
Add clock setup code for RT5xx series SOC to LPADC driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-08 19:48:54 +01:00
Francois Ramu fd9902be2d drivers: adc: stm32g4 also have a shared IRQ for ADC instances
The adc1 & 2 of the stm32g4 devices share the same irq

Signed-off-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2023-01-03 11:02:34 +01:00
HaiLong Yang 2b75aa1f8d drivers: adc: gd32: adc gd32l23x series
gd32 adc support gd32l23x series.

Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2022-12-28 10:37:52 +01:00
Francois Ramu b7266f2b26 drivers: adc: stm32 driver for the stm32U5 configuration for the ADC4
The ADC4 requires particular sequencer configuration.
Clean section that are not used for the configuration.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-12-27 15:33:06 +01:00
Francois Ramu 847338baa8 drivers: adc: stm32u5 adapt resolution range for ADC1 and ADC4
Adding the possible 6 bit resolution format for the ADC4
of the stm32U5 serie.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-12-27 15:33:06 +01:00
Francois Ramu ddd7047b29 drivers: adc: stm32 driver for the stm32U5 instance 1 or 4
Depending on the ADC instance, internal channels
temperature sensor or vbat differ.
That must be adapted so that each internal channels
of ADC4 are operational.
ADC4 is using CommonChannel config for the Sampling time.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-12-27 15:33:06 +01:00
Marek Matej 937ea00e7a drivers: adc: esp32: Add support for single-shot conversion
Allow single-shot adc conversion on all supported targets.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2022-12-23 23:45:05 +00:00
Andriy Gelman 2d3493bff0 drivers: adc: Add ADC xmc4xxx drivers
The ADC module has four conversion groups, each one is set up as a zephyr
device. The start-up calibration is initiated globally for all groups
and it is run in each device init function. The ADC module supports post
calibration per group. Post calibration is run automatically after each
group acquires the samples.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-12-20 14:17:23 +01:00
Bartosz Bilas e077fb73ec drivers: tests: replace usage of spi_is_ready with spi_is_ready_dt
`spi_is_ready` function is being deprecated in favor of
`spi_is_ready_dt` so let's replace the old usage in the tree.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2022-12-07 09:40:23 -06:00
Xinyang Tan 535f5a6c04 shell: support setting help string for each entry in a dictionary command
Add support for setting the help description for each entry in a dictionary
command. Currently the syntax string alone may not provide sufficient
description of its entry. This commit also helps keep the help messages
consistent with existing style.

Signed-off-by: Xinyang Tan <xinyang.tan@delve.com>
2022-12-05 18:40:46 +01:00
Anas Nashif cffe98d9de crc: Make the build of crc function dependent on a Kconfig
Add CONFIG_CRC for building CRC related routines.
CRC routines are now being built for each application, whether used or
not and are add in the build system unconditionally.

Keep CONFIG_CRC enabled by default for now and until all users have
converted to use the new option.

Partial fix for #50654

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-11-23 13:30:00 +01:00
Ryan McClelland 9b7d71e044 drivers: adc: fix ref_internal for ads1x1x
The ADS1x13 does not have a PGA, and will have a fixed
internal reference voltage of 2048mV. This sets the internal
referece voltage for the ads1x1x to 2048 and adjust the gain
configuration to scale.

Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
2022-11-08 11:33:25 -06:00
Stancu Florin 42915e498e drivers: ti: cc13xx/cc26xx: implement ADC driver
New ADC driver for the TI CC13xx/CC26xx family.

ADC channel configurations are translated from Zephyr constants to
simplelink driverlib ones (e.g., sample times use a lookup table).

Async mode was also implemented & tested.

Signed-off-by: Stancu Florin <niflostancu@gmail.com>
2022-11-04 17:31:59 -04:00
Kamil Serwus c707f1ed28 drivers: adc: sam0: fix compliation for feature SAMs for C21.
C21 doesn't have ADC_REFCTRL_REFSEL_AREFB and have different APBs.

Signed-off-by: Kamil Serwus <kserwus@gmail.com>
2022-10-25 15:48:13 -07:00
Bernardo Perez Priego 810809f96b driver: adc: npcx: enable adding work queue for adc comparator
ADC comparator driver submits notifications into system work queue, this
change will make driver to use dedicated work queue instead by using
`CONFIG_ADC_CMP_NPCX_WORKQUEUE`.

Dedicated work queue and priority are configurable as well.

Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
2022-10-21 10:29:30 -05:00
Gerard Marull-Paretas 178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Wojciech Slenska 003ee34593 drivers: adc: stm32: removed duplicated code
The same code exist few lines above, this is probably merge error.

Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
2022-10-03 10:20:21 +02:00
Jose Alberto Meza bccc4e62f2 drivers: adc: xec: Handle incomplete ADC channel conversions
Report an error when the ADC # channels conversion is not
complete.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2022-09-26 08:07:37 +00:00
Francois Ramu dca9c2b165 drivers: adc: stm32f3 adc driver set common clock to HCLK
Set the synchronous clock mode to HCLK/1 (DIV1) or HCLK/2 (DIV2)
Both are valid common clock setting values.
The HCLK/1 (DIV1) is possible only if the ahb-prescaler = <1>
in the RCC_CFGR (see DTS).

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-09-23 10:47:23 +00:00
Francois Ramu 6507afd07e drivers: adc: driver for stm32wl configure sampling
This Commit makes the adc configuration correct
for using the adc with 12b conversion on the stm32wl.
TriggerSource must be set to SW.
The ADC clock must be disabled by clock gating during CPU1 sleep/stop.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-09-22 15:06:20 +00:00
Jay Vasanth a2de15e5cc adc: mec15xx: add pinctrl for mec15xx/mec1501 adc
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 adc. Update board dts, pinmux and driver files.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-09-21 18:05:32 +00:00
Francois Ramu 4c36f3aeaf drivers: adc: stm32 driver enabling adc for the stm32U5
The ADC of the stm32U5 should also waits for the ready Flag
before enabling the peripheral, then wait for the ready Flag
set.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-09-21 08:57:58 +00:00
TOKITA Hiroshi f3fd686b96 drivers: adc: shell: Support RaspberryPi Pico ADC
Add ADC shell support for RaspberryPi Pico.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-09-06 17:11:19 +02:00
TOKITA Hiroshi 6df65f569d drivers: adc: Add support for RaspberryPi Pico ADC
Introducing RaspberryPi Pico ADC driver.
This driver was created with reference to the adc_emul implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-09-06 17:11:19 +02:00
Gerard Marull-Paretas 86654dbeae drivers: adc: gd32: use clock control API
Use the clock control API to turn on ADC clocks. Note that clock
selection is not yet implemented, so we still rely on custom rcu
properties for that.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas 1c7138fbb1 drivers: adc: gd32: fix ADC clock source retrieval
The clock source is specified via rcu-clock-source in DT.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas 79e6b0e0f6 includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.

The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.

NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-05 16:31:47 +02:00
Yong Cong Sin 411079cf1d drivers: adc: stm32: teardown internal channel after read
Internal channel should be torn after ADC read, this is
especially the case for VBAT, where the connection of internal
channel will introduce current drainage.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2022-09-01 12:29:58 +00:00
Gerard Marull-Paretas 6894a6c7ed drivers: adc: gd32: use reset API
Use the reset API to reset the peripheral state before initialization.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-29 10:30:49 +02:00
TLIG Dhaou 7b102a9993 drivers: adc: stm32 init the Regular group for stm32wl
The stm32wl mcu requires the REG group of the ADC
to be initialized before starting the conversion.

Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
2022-08-24 11:35:45 +02:00
TLIG Dhaou df364cc372 drivers: adc: stm32 init the Regular group for stm32u5
The stm32u5 mcu requires the REG group of the ADC
to be initialized before starting the conversion.

Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
2022-08-24 11:35:45 +02:00
Gerard Marull-Paretas a202341958 devices: constify device pointers initialized at compile time
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).

Automated using:

```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-22 17:08:26 +02:00
Francois Ramu 0f0a3743d2 drivers: adc: stm32U5 channel preselection
The stm32U5 LL function name differs from stm32H7 serie but must
still be enabled in the PCSEL.
This is done with the LL_ADC_SetChannelPreselection function
until the LL changes its name.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-08-22 10:23:53 +00:00
Gerard Marull-Paretas e0125d04af devices: constify statically initialized device pointers
It is frequent to find variable definitions like this:

```c
static const struct device *dev = DEVICE_DT_GET(...)
```

That is, module level variables that are statically initialized with a
device reference. Such value is, in most cases, never changed meaning
the variable can also be declared as const (immutable). This patch
constifies all such cases.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-19 11:51:26 +02:00
Kumar Gala e438da8a36 adc: Move to using select in Kconfig for I2C & SPI busses
Move to using 'select SPI'/'select I2C' instead of 'depends on'
(see commit df81fef944 for more
 details)

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-12 17:39:21 +02:00
Henrik Brix Andersen 68230cb1a7 drivers: adc: check if clock device is ready before accessing
Add check for device_is_ready() before accessing clock control devices.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-08-09 17:16:16 +02:00
Yong Cong Sin 588277c43a drivers: adc: stm32: Disable ADC before setting common path
According to the reference manual, the ADC should not be
converting when setting the common path, we disable the adc
directly in this driver for the sake of simplicity.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2022-08-03 18:43:20 +02:00
Yong Cong Sin 36a73d7704 drivers: adc: stm32: Use k_usleep variant
Convert these k_sleep calls to use the k_usleep instead.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2022-08-03 18:43:20 +02:00
Yong Cong Sin d4205f46dd drivers: adc: stm32: remove unnecessary VREFINT path
Remove unnecessary VREFINT path connection during the init.
Internal paths should be setup before reading the channel.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2022-08-03 18:43:20 +02:00
Yong Cong Sin 4ae32b1020 drivers: adc: stm32: Move adc_stm32_setup_channels to start_read
Move the `adc_stm32_setup_channels` function to `start_read`
so that we can guarantee that the internel path is connecte
before reading.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2022-08-03 18:43:20 +02:00
Simon Hein d0921018fc drivers: Fix coding guidelines MISRAC:2012 Rule 14.4 do-whiles/Zero checks
MISRA C:2012 Rule 14.4 (The controlling expression of an if statement
and the controlling expression of an iteration-statement shall have
essentially Boolean type.)

Use `do { ... } while (false)' instead of `do { ... } while (0)'.
Use comparisons with zero instead of implicitly testing integers.

The commit is a subset of the original auditable-branch commit:
5d02614e34a86b549c7707d3d9f0984bc3a5f22a

Signed-off-by: Simon Hein <SHein@baumer.com>
2022-07-26 15:30:24 -04:00
Aurelien Jarno 808603f47c drivers: adc: stm32: wait for internal channels stabilization
The VREFINT and TEMPSENSOR internal channels have a stabilization time
after they are enabled. Right now this just causes the first measure to
be a bit off, however with PR #47691 which stops the internal channels
after each readout, this is something important to respect. Fortunately
the stabilization time is available as constants in the HAL, so just
wait the time specified by the constants.

Note that the VBAT internal channel does not have any stabilization
time.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2022-07-25 15:17:35 +02:00
Kumar Gala d734f273ba drivers: adc: Update drivers to use devicetree Kconfig symbol
Update adc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.

We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-22 07:51:24 -05:00
Tomislav Milkovic 0fe2c1fe90 everywhere: Fix legacy include paths
Any project with Kconfig option CONFIG_LEGACY_INCLUDE_PATH set to n
couldn't be built because some files were missing zephyr/ prefix in
includes
Re-run the migrate_includes.py script to fix all legacy include paths

Signed-off-by: Tomislav Milkovic <milkovic@byte-lab.com>
2022-07-18 16:16:47 +00:00
Attie Grande 7ded40de84 soc: atmel_sam0: The ADC reference is locked while enabled for SAML21
For SAML21-based parts, the REFCTRL register is locked while the ADC is
enabled. Permit some parts to declare that they need the ADC to be
disabled before modifying REFCTRL.

Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
2022-07-18 10:35:46 +00:00
Kumar Gala e8624849c3 drivers: adc: adc_ads1119: Convert to use DEVICE_DT_INST_DEFINE
Convert driver to use DEVICE_DT_INST_DEFINE.  Its already devicetree
based so trivial change over to use DEVICE_DT_INST_DEFINE.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-14 10:32:27 +02:00
Guillaume Lager f6f52d3842 drivers: adc: Add ADS1119 driver
The driver support both synchronous and asynchronous reading.

Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
2022-07-12 12:29:45 +02:00
Guillaume Lager ac1eab55ef drivers: adc: Add runtime adc context initialization function
In some case the structure enclosing the adc context
can be quite big, making static initialization quite
resource consuming

Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
2022-07-12 12:29:45 +02:00
Francois Ramu 085cdd9277 drivers: adc: stm32f1 adc driver enable peripheral
This commit avoid re-enabling the ADC,
because this starts conversion.
According to the RefMan (RM0008) of the stm32F10x mcu,
enabling the ADC will start the conversion
if the ADC is already enabled. "Conversion starts when
this bit holds a value of 1 and a 1 is written to it."
That's not what we want.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-07-11 10:49:01 +02:00
Yuriy Vynnychek 99479ecbda drivers: adc: introduce new Telink B91 ADC driver
ADC driver basic support for Telink B91 SoC.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-07-08 11:07:18 +02:00
Anas Nashif 49b36ead95 drivers: add mising braces to single line if statements
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-06 11:00:45 -04:00
Aurelien Jarno fd8042d88f drivers: adc: stm32: remove vref_mv from adc_stm32_cfg
The value is unused in this structure is unused and can be accessed
through the adc_ref_internal() function.

This saves 4 bytes of SRAM.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2022-07-06 11:10:42 +02:00
Aurelien Jarno ef05063e62 drivers: adc: stm32: enable battery voltage input without CONFIG_STM32_VBAT
Allow the battery voltage to be read through the ADC even if the
CONFIG_STM32_VBAT driver is not enabled.

I guessed this part of code is conditionally compiled depending on
CONFIG_STM32_VBAT because this feature, and hence the
LL_ADC_CHANNEL_VBAT constant is not available on all families. As the
feature is already checked at runtime (as the same driver supports
multiple instances), we can conditionally compile it depending on
LL_ADC_CHANNEL_VBAT instead.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2022-07-06 11:10:42 +02:00
Bartosz Bilas a7ecf70353 drivers: adc: adc_stm32: fix comment indendations
Fix indentations of `adc_stm32_oversampling` function comments
to have everything aligned properly.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2022-07-05 04:24:34 -05:00
Francois Ramu 1654f81740 drivers: adc: stm32g0 fix sampling time due to errata sheet
According to the ES0418 about the ADC of the stm32G071
or other stm32g0x devices:
for sampling time set to 1.5 or 3.5 cycles,
the sampling in a single ADC conversion or in the first
conversion of a sequence takes one extra cycle.
Minimizing to 7.5 is fine.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-07-04 17:32:10 +00:00
Ryan McClelland 86bb6abbd0 adc: ads1x1x: run clangformat
run clangformat on adc_ads1x1x.c

Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
2022-07-04 16:28:43 +02:00
Ryan McClelland 3d7fc77678 adc: ads1x1x: macro cleanup
clean up the unique macros using existing macros

Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
2022-07-04 16:28:43 +02:00
Marcin Niestroj ec116a97cc drivers: adc: stm32: suppress stm32h7 build warning
There is a build warning of unused `adc_stm32_oversampling_ratioshift`
function: [-Werror=unused-function]. This makes twister fail, as all
warnings are treated as errors.

Fix that by ifndef'ing adc_stm32_oversampling_ratioshift().

Fixes: c57a41c5d2 ("drivers/adc: stm32: do not disable the ADC if
  resolution is unchanged")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2022-07-04 09:49:40 +02:00
HaiLong Yang cd8e8f3826 drivers: adc: introduce gd32 adc driver
This driver based on single conversion mode with regular channel.

Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2022-07-04 09:48:32 +02:00
Francois Ramu 726c0ea5bd drivers: adc: stm32 internal channel for VBat measurement
It allows the path for VBATEN on stm32 series
to monitor the Vbat voltage, in case of CONFIG_STM32_VBAT
Add the common Vref value as a property of the ADC.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-07-01 11:34:17 +02:00
Aurelien Jarno c57a41c5d2 drivers/adc: stm32: do not disable the ADC if resolution is unchanged
In case the resolution is already correct (probably the common use
case), do nothing instead of disabling the ADC.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2022-06-29 14:43:29 +00:00
Aurelien Jarno 897554bd39 drivers/adc: stm32: avoid disabling and reenabling the ADC multiple times
The ADC is currently disabled and re-enabled multiple time during each
read. Enabling the ADC is not a free operation on some series and some
internal channels like VREFINT take even longer. This patch improve the
situation by removing the calls to adc_stm32_enable(), replacing it by a
single call just before triggering the conversion.

This also open the possibility to not reconfigure the ADC if it is
already configured, implemented in the following patches.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2022-06-29 14:43:29 +00:00
Aurelien Jarno c9d3efabe7 drivers/adc: stm32: streamline code to disable ADC
This avoid repeating (slight different) code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2022-06-29 14:43:29 +00:00
Jun Lin d4a5203c18 driver: adc: npcx: prevent sleep when ADC is operating
Entering deep sleep mode stops the source clock of the ADC module and
could corrupt the ongoing ADC conversion. This commit lets ADC driver
acquire the PM lock during the ADC operation (either single conversion
or repetitive scan) and release it when the ADC conversion stops.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-06-21 10:47:15 +02:00
Gerard Marull-Paretas fd2052d524 drivers: remove redundant <zephyr/zephyr.h> includes
Files including <zephyr/kernel.h> do not have to include
<zephyr/zephyr.h>, a shim to <zephyr/kernel.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-15 09:13:11 +02:00
Bartosz Bilas c343da5161 nxp_imx: rt: add ADC External Trigger Control Kconfig option
Add missing ADC External Trigger Control module Kconfig option.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2022-06-10 09:48:50 +02:00
Gerson Fernando Budke 5b7734c926 drivers: adc: sam0: Fix adc_reference implementation
The current sam0 adc driver not implement correctly the adc_reference
enum values. This try homonize adc input referece by tracking VDDANA
at ADC_REF_VDD_1. The ADC_REF_VDD_1_2 were fixed with correct INTVCCx
channel selection.

Fixes #45443

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2022-05-25 13:36:10 -07:00
Andrzej Głąbek 77edc2c852 dts: Include ADC DT binding headers from nRF SoC dtsi files
Add inclusions of header files with devicetree related ADC definitions
to the nRF SoC dtsi files so that those definitions can be used also
for nRF SoC based boards.
Provide definitions of nRF ADC and SAADC analog inputs suitable
for use in devicetree.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-05-13 12:46:06 -07:00
Mulin Chao 7ef371b2e7 drivers: adc: add pinctrl driver support
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx adc driver. Please notice users need to
configure the corresponding pinctrl nodes in 'pinctrl-0' property in the
adc0 DT node. For example, if ADC0 and ADC2 channels are selected for
the application, please add the follwoings in your board DT layout file.

&adc0 {
	status = "okay";
	/* Use adc0 channel 0 and 2 for 'adc_api' driver tests */
	pinctrl-0 = <&adc0_chan0_gp45
		     &adc0_chan2_gp43>;
	pinctrl-names = "default";
};

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-05-12 14:24:03 -05:00
Andrzej Głąbek 36845b6168 drivers: adc_common: Add missing gain values in adc_gain_invert()
This is a follow-up to commits e15bdaa1bd
and 07bf22cc94.

The above two commits added some enumerated gain values and those
are not currently handled by the inverting function. Add the missing
entries to the conversion array in the function.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-05-12 09:22:39 +02:00
Bernardo Perez Priego 2fc78a9b39 drivers: adc: Add threshold_reg_offset to NPCX adc config structure
ADC threshold control register offset is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
update macro to access register accordingly. Driver behavior is not
meant to be impacted.

Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
2022-05-10 18:40:24 +02:00
Bernardo Perez Priego aa875b3766 drivers: adc: Add threshold_count to NPCX adc config structure
Number of supported ADC thresholds is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
replace macro usage. Driver behavior is not meant to be impacted.

Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
2022-05-10 18:40:24 +02:00
Gerard Marull-Paretas fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Tim Lin 74321f11d6 ITE: drivers/adc: Use pinctrl instead of pinmux driver
Use pinctrl instead of pinmux driver.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-05-06 11:32:40 +02:00
Bernardo Perez Priego cfe4d51b4f drivers: sensor: Add adc-comparator binding and implementation for NPCX
Comparator will monitor signal though ADC channel, based on
user configuration, callback will be triggered.
This will enable comparator functionality for nuvoton MCU utilizing its
ADC threshold detection feature. Implementation is exported through
sensor trigger API. Use of CONFIG_ADC_CMP_NPCX is required.

Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
2022-05-03 08:51:53 -05:00
Sam Hurst 3122a2c8b8 drivers: adc: Refactor code to remove warning
Refactor code so that an unused variable 'adc' warning
is not generated when building for CONFIG_SOC_SERIES_STM32G4X
and not using adc1 or adc5.

Signed-off-by: Sam Hurst <sbh1187@gmail.com>
2022-05-03 09:37:28 +02:00
Hake Huang 07d6adde51 driver: adc: fix build error for adc_dma
fsl_sim.h is not required as SDK upgrade

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2022-04-27 11:15:43 -05:00
Andrzej Głąbek 586e26e8fc soc: nrf: Use data from DTS to populate HAS_HW_NRF_* Kconfig options
Instead of selecting appropriate HAS_HW_NRF_* options for particular
nRF SoCs (and simulated nRF52 target), set their values basing on
information from devicetree.
Correct also semantics of those options so that they are set only when
a corresponding DT node is enabled. This allows using them directly in
Kconfig dependencies of Zephyr drivers for nRF peripherals. Update
appropriately these dependencies.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-02 15:14:38 +02:00