Commit graph

58927 commits

Author SHA1 Message Date
Nicolas Pitre faa0b2a848 net: introduce a network packet filter framework
This provides the infrastructure to create network packet filter rules
and to apply them to the RX and TX packet paths. Rules are made of
simple condition tests that can be linked together, creating a facility
similarly to the Linux iptables functionality.

A couple of generic and Ethernet-specific condition tests are also
provided.

Additional tests can be easily created on top of this.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-12-21 17:06:35 +01:00
Johann Fischer 44585b7fc5 drivers: mb_display: rework bbc:microbit display support
Rework bbc:microbit display support to use nRF LED matrix
display controller driver and allow to use it with
bbc:microbit v2 board.

This patch turns the driver into a higher level driver
using the display controller API. Code that directly
accesses hardware (GPIO) is removed.
This driver is reworked to be more generic. It still
has a lot of potential for improvement, but it requires
changes in all applications that use this tool.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-12-21 17:06:03 +01:00
Johann Fischer faaa08b4c1 boards: bbc_microbits: add chosen display property
Add chosen display property to bbc:microbit and
bbc:microbit v2 boards.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-12-21 17:06:03 +01:00
Johann Fischer de072e47b0 drivers: nrf_led_matrix: enable driver if compatible is enabled
Enable nRF LED matrix display controller driver if compatible
devicetree node is enabled.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-12-21 17:06:03 +01:00
Jedrzej Ciupis 304c42c39c boards: posix: nrf52_bsim: provide missing CMSIS functions
This commit provides missing CMSIS functions for nRF52 babblesim board.

Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
2021-12-21 17:00:51 +01:00
Michal Ciesielski 8b3d7f2a43 net: lwm2m: Add LWM2M object 9 software management
Adds support for LWM2M object 9 Software management.
This is implemented according to this release:
http://openmobilealliance.org/release/LWM2M_SWMGMT/V1_0_1-20200616-A/

Note that the XML is lacking some resources and for that reason those
resources are not included. This is a known problem by OMA and will be
fixed in a later releases.

This uses the lwm2m_pull_context to pull binaries in case
FIRMWARE_PULL_SUPPORT is enabled

Signed-off-by: Michal Ciesielski <michal.m.ciesielski@voiapp.io>
2021-12-21 13:36:50 +01:00
Michal Ciesielski 06b0a9c59d net: lwm2m: Make lwm2m_pull_context reusable
Add a semaphore to control that no collisions occur when multiple
sources want to use the pull_context

Add struct firmware_pull_context *ctx as an argument to the result_cb of
the context. This allows the receiver to do some kind of differentiation
on the source.

Signed-off-by: Michal Ciesielski <michal.m.ciesielski@voiapp.io>
2021-12-21 13:36:50 +01:00
Michal Ciesielski 2f046da6a1 net: lwm2m: FW Pull separate generic pull logic
Make it possible to reuse the pull logic from firmware_pull.c by
separating it to a separate file.

The firmware_pull_context is still owned and statically allocated in
firmware_pull.c and is being passed into lwm2m_pull_context.c as a
pointer.

In other words, pull_context, does not keep any state except for a
pointer to the context currently in use.

Signed-off-by: Michal Ciesielski <michal.m.ciesielski@voiapp.io>
2021-12-21 13:36:50 +01:00
Patric Karlström 20b3d180d1 posix: Make clock_settime/gettime REALTIME thread-safe
Fixes #23419

Signed-off-by: Patric Karlström <pakar@imperialnet.org>
2021-12-21 11:49:51 +01:00
Krzysztof Chruscinski 94a01d0192 logging: Increase stack size when NO_OPTIMIZATIONS=y
Increase stack size when optimization is disabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-12-21 09:36:09 +01:00
Krzysztof Chruscinski 62b57651e8 logging: Cleanup in log_instance
Cleanup in log_instance.h:
 - prefixing internal macros with Z_
 - adding doxygen documentation
 - using COND_CODE_1 instead of ifdefs

Additionally, added LOG_INSTANCE_PTR macro which allows to get
pointer to instance. It can be used to reuse single instance
for multiple module layers when doing instance logging.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-12-21 09:36:09 +01:00
Henrik Brix Andersen 682f261c95 Revert "Bluetooth: Mesh: Fix publication period measurement"
This reverts commit 1f9c606f95.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-12-21 07:46:26 +01:00
Henrik Brix Andersen b3c1eea269 Revert "tests: Bluetooth: Mesh: Add tests to cover message publication"
This reverts commit 9b99ab6896.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-12-21 07:46:26 +01:00
Carles Cufi 38ce8d615d Revert "drivers: timer: extend nrf_rtc_timer"
This reverts commit 26e297572a.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2021-12-20 21:04:26 +01:00
Carles Cufi c7ec3db5e5 Revert "modules: hal_nordic: align & extend lp_timer platform"
This reverts commit 9cdd8cd168.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2021-12-20 21:04:26 +01:00
Carles Cufi f0765409a7 soc: nrf: Disable DWT NULL pointer detection by default
Having DWT-based NULL-pointer detection enabled by default trips a lot
of users since it will make any debugging fail when enabled. Disable it
by default and let users enable it if they desire to.

Fixes #39216.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2021-12-20 19:18:12 +01:00
Piotr Golyzniak bdf0cd2c97 MAINTAINERS: add gopiotr as Twister collaborator
Add gopiotr as Twister collaborator.

Signed-off-by: Piotr Golyzniak <piotr.golyzniak@nordicsemi.no>
2021-12-20 12:49:38 -05:00
Tom Burdick 2169383143 dma: i2c: Maintainership
Add myself as a maintainer of i2c and dma

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2021-12-20 12:49:22 -05:00
Daniel Leung b6dd960be8 kernel: userspace: fix dynamic kernel object alignment
Previous commit 55350a93e9 fixing
address-of-packed-mem warnings uncovered an issue with
the alignment of dynamic kernel objects. On 64-bit platforms,
the alignment is 16 bytes instead of 4/8 bytes (as in pointer,
void *). This changes the function of mapping between kernel
object types and alignments to use the dynamic object struct
as basis for alignment instead of simply using pointers.

This also uncomments the assertion added in the previous commit
55350a93e9 so that we can keep
an eye on the alignment in the future. Note that the assertion
is moved after checking if the incoming kernel object is
dynamically allocated. Static kernel objects are not subjected
to this alignment requirement.

Fixes #41062

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-12-20 12:48:58 -05:00
Yong Cong Sin 1e32d44729 samples: sensor: Add sample for MH-Z19B
Add sample for MH-Z19B CO2
sensor.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2021-12-20 18:47:47 +01:00
Yong Cong Sin 215571ad64 tests: drivers: build_all: Build MHZ19B
Include MH-Z19B in the build all test.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2021-12-20 18:47:47 +01:00
Yong Cong Sin 26f7b9c1ea drivers: sensor: Add MH-Z19B CO2 sensor driver
Add MH-Z19B CO2 sensor driver.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Co-Authored-By: Azamlukman <azamlukmanabdullah@gmail.com>
2021-12-20 18:47:47 +01:00
Emil Obalski b037054f21 mcumgr: Add latency control functionality
This change adds a posibility to enable low latency connection
parameters for BT when SMP commands are handled.

Support for this functionality is disabled by the default and
can be enabled by CONFIG_MCUMGR_SMP_BT_LATENCY_CONTROL=y option.

Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
2021-12-20 18:46:43 +01:00
Michael Schmidt 557870c05f drivers: virt_ivshmem: Allow multiple instances of ivShMem devices.
- Supporting multiple instances of ivShMem virtual devices.
- Introduces DT based configuration for ivShMem devices.
- Add DTS overlay file to test new multiple ivshmem instance capability.
- Enable BDF unspecified device initialization.
  (limited to one instance. An improved version of pcie_bdf_lookup()
  will come soon that fixes this limitation)
- Make PCIE DTS file macros available for a proper ivshmem device
  properties parsing.

Sample for dts file:
pcie0 {
	label = "PCIE_0";
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "intel,pcie";
	ranges;
    ivshmem0: ivshmem@800 {
	    compatible = "qemu,ivshmem";
	    reg = <PCIE_BDF_NONE PCIE_ID(0x1af4,0x1110)>;
	    label = "IVSHMEM";
	    status = "okay";
    };
};

Signed-off-by: Michael Schmidt <michael1.schmidt@intel.com>
2021-12-20 19:42:27 +02:00
Dominik Ermel 8e001191ce drivers/flash/nrf_qspi_nor: Default write_from_nvmc buffer size to 4
The commit changes the default size of write_from_nvmc,
defined by CONFIG_NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE, to 4,
making the write_from_nvmc operation enabled by default.
The Kconfig description for the option has been changes more clearly
describe how does the option impact compilation.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2021-12-20 17:52:00 +01:00
TOKITA Hiroshi 381a8510d1 MAINTAINERS: add soburi as gd32 platform collaborator
Add soburi as gd32 platform collaborator.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi da68cde759 tests: skip arch_nop test when machine timer uses divided sys clock
When the case machine timer clock uses the divided system clock,
k_cycle_get_32() can't measure accurately how many cycles elapsed.

For example, use the value as timer clock obtained by dividing
the system clock by 4.
In this case, measuring a duration with k_cycle_get32() has up to 3
(4-1) cycles systematic error.

To run this test, we need to insert an appropriate of nops
with consideration for the errors.
'nop' can not repeat with for loop.
Must insert as separated statement.
But we don't have a convenient function such as
BOOST_PP_REPEAT in C++.

At this time, Implementing a generic test is a bit difficult.
Skipping this test in the case.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi 1421c1728b coredump: add support for Longan Nano boards
Longan Nano boards pass the test that with calling coredump().

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi 7e80c74f95 drivers: serial: Add USART support for GD32V
Modifying configuration to enable with gd32vf103

- Add usart definition to devicetree.
- Define USART_STAT as alias of USART_STAT0 if not defined it.
- Enable USART if SOC_SERIES_RISCV_GIGADEVICE_GD32VF103.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi 5c7a0ef888 drivers: interrupt-controller: add Nuclei ECLIC driver
Add support for the ECLIC interrupt controller
which is used with the Nuclei processor core.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi 949d4b91d9 drivers: pinctrl: Support pinctrl with GD32VF103
Change the settings to support pinctrl on the GD32VF103.

- Split soc/arm/gigadevice/common/pinctrl_soc.h
  and put it into include/dt-bindings.
- Leave some definitions that can't handle with device tree compiler
  in pinctrl_soc.h.
- Remove dependency to SOC_FAMILY_GD32 because always enabled it
  if GD32_HAS_AF(IO)_PINMAX was selected.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi c21bc77169 boards: riscv: Add SiPeed Longan Nano platform
SiPeed Longan Nano is a minimal development board
based on GigaDevice's RISC-V processor.
There are 2 board variations.

longan_nano:      GDGD32VF103CBT6 (128K Flash/32K SRAM)
longan_nano_lite: GDGD32VF103C8T6 ( 64K Flash/20K SRAM)

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi c9c04e491e soc: riscv: Add initial support for GigaDevice GD32V SoC
Add GigaDevice GD32V SoC.
GD32V has non-standard CSR. It doesn't use common startup code.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi 5f3a6af91c modules: Add Configurations for GD32VF103
Add configuration for GD32VF103 SoC.

- Add compiler definition HXTAL_VALUE for compile GigaDevice's HAL.
- Redefine gd32_cmsis_dir for source commonize.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi d53e49c532 soc: nuclei: Add Nuclei specialized CSR definitions
Nuclei core has non-RISCV standard CSRs.
Add a header file to suppor these CSRs.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi 2de3133a05 riscv: Add an option for configuring mcause exception mask
GD32V processor core is used non-standard bitmask
for mcause register. Add option to configure the bitmask
to support GD32V.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi d79d4f0bea riscv_machine_timer: Enable to use divided clock for the machine timer
GD32V SoC uses divided clock from core-clock for machine timer clock.
Add config of clock divide factor to support GD32V.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi 3167a9e5e7 dts: bindings: vendor-prefixes: Add nuclei prefix
Add nuclei manufacturer binding prefix.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
Trond Einar Snekvik b613c2350e dts: nordic: Set default binding for all multi mode buses
As Nordic SPI, I2C and UART buses can act as both slave and master,
these nodes can have different compatible properties, and are annotated
with a comment, instead of a compatible property. This forces boards to
put compatible properties in their definitions, which is unnecessary
boilerplate for most boards, as most boards acts as masters on these
buses.

Set master mode by default for these buses, to reduce boilerplate and
potential errors in board definitions. Boards that need to act as slave
nodes will just continue to override the compatible properties.
Likewise, existing boards that override this compatible property with a
master binding will not be affected by this change.

Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
2021-12-20 17:49:28 +01:00
Hou Zhiqiang 2fafd8559f net: socket: packet: Add EtherCAT protocol support
Add EtherCAT protocol support, now applications can
transmit/receive EtherCAT packets via RAW socket.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2021-12-20 17:49:10 +01:00
Francois Ramu 11d9c0029a dts: stm32u5 has one iwdg watchdog node
The stm32u5 device has a single iwdg node entry and label
without any need for interrupt. Even if it exists the irq entry
is not required.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-12-20 17:48:59 +01:00
Lukas Gehreke 53dea67733 drivers: modem: Added simcom sim7080 modem driver.
Implemented driver for the simcom sim7080 modem.
This driver features Socket offloading, TCP, UDP, DNS,
SMS, GPS and FTP.

Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
2021-12-20 17:48:47 +01:00
Carlo Caione 11f936c87e samples: mbox: Fix incorrect DT addressing
Place the nodes to the proper place into the DT. The driver is calling
directly into the NRFX without using any direct memory addressing so
this is mostly a cosmetic fix.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-12-20 17:48:36 +01:00
Alexander Wachter 11d340f9c5 drivers: can: m_can: fix alignmed issues
Make sure that all access to the msg_sram
is 32 bit aligned.

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2021-12-20 17:46:24 +01:00
Henrik Brix Andersen 2269408572 dts: bindings: can: remove #address-cells and #size-cells
Remove the requirement for specifying #address-cells and #size-cells
properties for CAN controller devicetree nodes.

CAN controllers do not have a common concept of devicetree child nodes
and thus have no need for these properties. This is in line with
upstream Linux kernel devicetree bindings.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-12-20 17:45:05 +01:00
Wealian Liao 8246dedf68 dts: arm: npcx: Fix GPIOE3 low voltage control map
NPCX series used npcx-lvol-ctrl-map to record the GPIO & low voltage
control register map. However, GPIOE3 was configured as GPIOE6, which
is a non-existed pin. This commit fixes the GPIOE3 low voltage control
map.

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2021-12-20 17:44:42 +01:00
Robert Lubos 860e59e881 tests: net: ipv6: Verify Route Info data in Router Advertisment
Verify that Route Info data received in Router Advertisment creates a
route and correctly populates the net_route_entry structure.

Additionally, extend the MTU on the test interface, to accomodate the
extended Router Advertisement message.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-12-20 17:44:28 +01:00
Robert Lubos 111992bb71 tests: net: route: Add new route tests
Add new route tests to cover lifetime and preference functionality.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-12-20 17:44:28 +01:00
Robert Lubos f8b3516280 net: route: Add mutex protection
Since most of the functions will access non thread-safe resources like
SLIST, and can be invoked from different threads (like the expiry timer
delayed work), add mutex protection to the function calls.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-12-20 17:44:28 +01:00
Robert Lubos e9db822635 net: route: Add support for route preference
Implement a concept of Route Preference, as specified in RFC 4191. The
Zephyr host will prefer routes with higher preference, if they lead to
the same prefix through different neighbours.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-12-20 17:44:28 +01:00