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Introduce a CODEOWNERS file for auto-assign of review by GitHub Right now keep it simple for testing, we can decide how we want to go forward with this vs MAINTAINERs file, etc. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-07-07 15:56:05 +02:00
# CODEOWNERS for autoreview assigning in github
CODEOWNERS: Clarify behaviour Clarify the last matching rule, as it is not too intuitive (developers may have expected that all matching regexes would be added as code owners) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-06-15 11:17:01 +02:00
# https://help.github.com/en/articles/about-code-owners#codeowners-syntax
# Order is important; for each modified file, the last matching
# pattern takes the most precedence.
# That is, with the last pattern being
CODEOWNERS: add @nashif for docs Add @nashif as codeowner for docs temporarily until we have a dedicated owner. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-30 04:57:08 +01:00
# *.rst @nashif
# if only .rst files are being modified, only nashif is
CODEOWNERS: Clarify behaviour Clarify the last matching rule, as it is not too intuitive (developers may have expected that all matching regexes would be added as code owners) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-06-15 11:17:01 +02:00
# automatically requested for review, but you can manually
# add others as needed.
CODEOWNERS: Add for drivers/wifi same reviewers as for drivers/ethernet drivers/wifi/ is closely related to the (IP) network stack, so shouldn't be left without owners, so use the same as for Ethernet. Also, extend, don't replace reviewers for drivers/wifi/eswifi based on the above change and CODEOWNERS processing order. Also, add a reminder about this processing order at the top of file. Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2018-11-23 11:12:14 +01:00
CODEOWNERS: more tweaks Do not apply source code wide wildcard to idenitify the missing portions of the code that need entries. the * entry will be added at a later stage when we have more coverage. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-07-22 11:55:20 +02:00
# Do not use wildcard on all source yet
# * @galak @nashif
maintainers: update CODEOWNERS from MAINTAINERS file Converted using the script below with a few manual edits: from __future__ import print_function, unicode_literals, with_statement from glob import glob import email.utils seen = set() emails = set() with open('MAINTAINERS', 'rb') as f: new = False for line in f: line = line.decode('utf-8') if line.startswith('M:'): if new: emails = set() new = False print("") pattern = line.partition(':')[2].strip() emails.add(email.utils.parseaddr(pattern)[1]) elif line.startswith('F:'): new = True pattern = line.partition(':')[2].strip() if pattern.endswith("/"): pattern = pattern + "*" print("%s %s" %(pattern, " ".join(emails))) seen.add(pattern) Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-07-20 12:08:45 +02:00
CODEOWNERS: add owner for .github/ Owner for various github related files. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-08 14:42:59 +01:00
/.known-issues/ @nashif
/.github/ @nashif
ci: github: west: Add a GH workflow to run the west command tests Replace running west command tests in run_ci.sh with a github workflow. This provides some benefits in that we can run the west command tests on multiple python versions and host OSes (linux, mac and windows). Also have the benefit that the tests are only run on modifications to files in scripts/west_commands/ or scripts/west-commands.yml. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 23:04:36 +01:00
/.github/workflows/ @galak @nashif
ci: Add initial buildkite ci setup Add setup to utilize buildkite for CI purposes: 1. .buildkite/hooks/pre-command: * Handles getting git checkout setup against upstream repo * Setup some west module cache (dirs, clean out files & locks) * init dir for ccache 2. .buildkite/hooks/post-command: * Report disk usage (meant for possible debugging) 3. .buildkite/pipeline.yml [uses to determine what to do]: * setup zephyr env vars * set which docker container to use (export some local disk caches for git, west modules, and ccache) * uses plug to general build annotation on failure (junit-annotate) 4. .buildkite/run.sh [ buildkite wrapper to invoke scripts/ci/run.sh ] Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-03 14:02:35 +02:00
/.buildkite/ @galak
CODEOWNERS: auto-assign reviews in MAINTAINERS.yml, get_maintainer.py Add an entry in CODEOWNERS for auto-assigning reviewers in MAINTAINERS.yml and get_maintainer.py files. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-17 10:55:21 +02:00
/MAINTAINERS.yml @ioannisg @MaureenHelm
CODEOWNERS: replace @vonhust with @abrodkin for ARC review requests Add @abrodkin to the list of CODEOWNERS for ARC code (ARCH, BOARDS, DTS) instead of @vonhust. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-24 12:39:00 +02:00
/arch/arc/ @abrodkin @ruuddw
CODEOWNERS: update architecture owners Update owners for both x86 and ARM. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-03 13:01:27 +02:00
/arch/arm/ @MaureenHelm @galak @ioannisg
arch: arm: Move ARM code to AArch32 sub-directory Before introducing the code for ARM64 (AArch64) we need to relocate the current ARM code to a new AArch32 sub-directory. For now we can assume that no code is shared between ARM and ARM64. There are no functional changes. The code is moved to the new location and the file paths are fixed to reflect this change. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-09 18:49:36 +01:00
/arch/arm/core/aarch32/cortex_m/cmse/ @ioannisg
arch: arm64: Introduce ARM64 (AArch64) architecture Introduce the basic ARM64 architecture support. A new CONFIG_ARM64 symbol is introduced for the new architecture and new cmake / Kconfig files are added to switch between ARM and ARM64. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-10 17:17:19 +01:00
/arch/arm/core/aarch64/ @carlocaione
arch: arm: Move ARM code to AArch32 sub-directory Before introducing the code for ARM64 (AArch64) we need to relocate the current ARM code to a new AArch32 sub-directory. For now we can assume that no code is shared between ARM and ARM64. There are no functional changes. The code is moved to the new location and the file paths are fixed to reflect this change. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-09 18:49:36 +01:00
/arch/arm/include/aarch32/cortex_m/cmse.h @ioannisg
arch: arm64: Introduce ARM64 (AArch64) architecture Introduce the basic ARM64 architecture support. A new CONFIG_ARM64 symbol is introduced for the new architecture and new cmake / Kconfig files are added to switch between ARM and ARM64. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-10 17:17:19 +01:00
/arch/arm/include/aarch64/ @carlocaione
arch: arm: aarch32: Rename `cortex_r` to `cortex_a_r` This commit renames the `cortex_r` directory under the AArch32 to `cortex_a_r`, in preparation for the AArch32 Cortex-A support. The rationale for this renaming is that the Cortex-A and Cortex-R share the same base design and the difference between them, other than the MPU vs. MMU, is minimal. Since most of the architecture port code and configurations will be shared between the Cortex-A and Cortex-R architectures, it is advantageous to have them together in the same directory. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-22 15:19:22 +01:00
/arch/arm/core/aarch32/cortex_a_r/ @MaureenHelm @galak @ioannisg @bbolen @stephanosio
CODEOWNERS: address some unowned files/dirs Add owners for some architecture, soc and subsystem code. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-07 14:31:51 +02:00
/arch/common/ @andrewboie @ioannisg @andyross
CODEOWNERS: replace @vonhust with @abrodkin for ARC review requests Add @abrodkin to the list of CODEOWNERS for ARC code (ARCH, BOARDS, DTS) instead of @vonhust. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-24 12:39:00 +02:00
/soc/arc/snps_*/ @abrodkin @ruuddw
CODEOWNERS: Fix missing '/' in codeowners file Fix error "Expected '/' after directory 'soc/nios2' in CODEOWNERS" Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2019-05-13 13:02:13 +02:00
/soc/nios2/ @nashif @wentongwu
CODEOWNERS: update architecture owners Update owners for both x86 and ARM. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-03 13:01:27 +02:00
/soc/arm/ @MaureenHelm @galak @ioannisg
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/soc/arm/arm/mps2/ @fvincenzo
CODEOWNERS: code-owner for SAM3X Adding Code-Owner for Atmel SAM3X SOC (Cortex-M3). Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-03-04 23:05:05 +01:00
/soc/arm/atmel_sam/sam3x/ @ioannisg
CODEOWNERS: add owner for the same4 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-11-04 23:43:05 +01:00
/soc/arm/atmel_sam/sam4e/ @nandojve
CODEOWNERS: fix syntax for directories Add trailing "/" to signify directories. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-19 01:32:55 +01:00
/soc/arm/atmel_sam/sam4s/ @fallrisk
CODEOWNERS: Add SAM E70 code owner Add @nandojve, the SAM V71 platform maintainer, as a code owner for the SAM E70 platform, as these two platforms share the same base and are practically identical. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-24 08:40:45 +01:00
/soc/arm/atmel_sam/same70/ @nandojve
CODEOWNERS: add owner for the samv71 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-12-12 02:50:06 +01:00
/soc/arm/atmel_sam/samv71/ @nandojve
arm: Add Broadcom Valkyrie SoC support Add initial support for Broadcom Valkyrie SoC as part of Zephyr. Signed-off-by: Scott Branden <scott.branden@broadcom.com>
2020-01-08 22:18:10 +01:00
/soc/arm/bcm*/ @sbranden
soc: arm: add infineon_xmc series support Add infineon xmc series with XMC4500 support. XMC series comes with, - CPU operates upto 120MHz - 3 RAM (PSRAM1 - code, DSRAM1 - data and DSRAM2 - communiation) - upto 1MB flash init: clock control & gpio is not done, so SoC initialization directly relies on HAL. Core operating clock is stored in no_init section, which is kept under DSRAM1. Only DSRAM1 is used until clock support. Using PSRAM1 and DSRAM1 needs adaptation in linker script - planned for next revision. Note: SystemInit cannot be consumed directly due to vector table + HAL linker dependency. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-04-21 11:37:42 +02:00
/soc/arm/infineon_xmc/ @parthitce
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/soc/arm/nxp*/ @MaureenHelm
/soc/arm/nordic_nrf/ @ioannisg
soc: arm: add support for nuvoton numicro m48x series Add initial support for nuvoton numicro m48x SoC series, basic init and uart functionality are covered with gpio and clock directly relies on HAL. Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2020-04-15 10:04:50 +02:00
/soc/arm/nuvoton/ @ssekar15
soc: arm: Add Nuvoton NPCX7M6FB SoC Initial support for Nuvoton NPCX7M6FB SoC of NPCX series which is a chip family of embedded controllers (EC) and targeted for a wide range of portable applications. We implemented the SoC skeleton in soc/arm/nuvoton_npcx since there're many chip families in Nuvoton and aim to different markets such as PC, General MCU, and Audio. The architectures and hardware modules are different between them. Hence, we suggest using the company name plus with chip series for better understanding. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2020-06-24 13:13:43 +02:00
/soc/arm/nuvoton_npcx/ @MulinChao
arch: arm64: Add support for qemu_cortex_a53 board This patch introduces support for the qemu_cortex_a53 board emulated using QEMU (virt platform) adding SoC, board and DTS files. | ./scripts/sanitycheck -p qemu_cortex_a53 | | Total complete: 190/ 190 100% skipped: 40, failed: 0 | 150 of 150 tests passed (100.00%), 0 failed, | 40 skipped with 0 warnings in 580.93 seconds Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-10 18:43:26 +01:00
/soc/arm/qemu_cortex_a53/ @carlocaione
soc: silabs_exx32: Add support for SiLabs EFR32MG21 SoC This commit adds support for Silicon Labs EFR32MG21 (Mighty Gecko) SoC. Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
2020-07-13 17:31:19 +02:00
/soc/arm/silabs_exx32/efr32mg21/ @l-alfred
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/soc/arm/st_stm32/ @erwango
CODEOWNERS: remove rsalveti This GitHub account has been disabled for over a year (it was replaced by a `ricardosalveti` account). Remove from CODEOWNERS. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-15 19:16:19 +02:00
/soc/arm/st_stm32/stm32f4/ @idlethread
CODEOWNERS: update arnop2 ownership name Following update of the Github username,replace owner from arnop2 to arnopo. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-12-06 17:00:08 +01:00
/soc/arm/st_stm32/stm32mp1/ @arnopo
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 18:47:13 +02:00
/soc/arm/ti_simplelink/cc13x2_cc26x2/ @bwitherspoon
CODEOWNERS: Update code ownership for TI SimpleLink code Updated for SimpleLink-related code in ext, board and soc. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-02-26 23:34:29 +01:00
/soc/arm/ti_simplelink/cc32xx/ @vanti
CODEOWNERS: fix syntax for directories Add trailing "/" to signify directories. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-19 01:32:55 +01:00
/soc/arm/ti_simplelink/msp432p4xx/ @Mani-Sadhasivam
CODEOWNERS: Add Xilinx ZynqMP platform codeowner Add @stephanosio as a code owner for the Xilinx ZynqMP platform, which is used as the primary testing platform for the Cortex-R architecture. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:35:44 +01:00
/soc/arm/xilinx_zynqmp/ @stephanosio
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/soc/xtensa/intel_s1000/ @sathishkuttan @dcpleung
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/arch/x86/ @andrewboie
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/arch/nios2/ @andrewboie @wentongwu
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/arch/posix/ @aescolar @daor-oti
riscv32: rename to riscv With the upcoming riscv64 support, it is best to use "riscv" as the subdirectory name and common symbols as riscv32 and riscv64 support code is almost identical. Then later decide whether 32-bit or 64-bit compilation is wanted. Redirects for the web documentation are also included. Then zephyrbot complained about this: " New files added that are not covered in CODEOWNERS: dts/riscv/microsemi-miv.dtsi dts/riscv/riscv32-fe310.dtsi Please add one or more entries in the CODEOWNERS file to cover those files " So I assigned them to those who created them. Feel free to readjust as necessary. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-17 19:17:05 +02:00
/arch/riscv/ @kgugala @pgielda @nategraff-sifive
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/soc/posix/ @aescolar @daor-oti
riscv32: rename to riscv With the upcoming riscv64 support, it is best to use "riscv" as the subdirectory name and common symbols as riscv32 and riscv64 support code is almost identical. Then later decide whether 32-bit or 64-bit compilation is wanted. Redirects for the web documentation are also included. Then zephyrbot complained about this: " New files added that are not covered in CODEOWNERS: dts/riscv/microsemi-miv.dtsi dts/riscv/riscv32-fe310.dtsi Please add one or more entries in the CODEOWNERS file to cover those files " So I assigned them to those who created them. Feel free to readjust as necessary. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-17 19:17:05 +02:00
/soc/riscv/ @kgugala @pgielda @nategraff-sifive
/soc/riscv/openisa*/ @MaureenHelm
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/soc/x86/ @andrewboie
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/arch/xtensa/ @andrewboie @dcpleung @andyross
/soc/xtensa/ @andrewboie @dcpleung @andyross
CODEOWNERS: replace @vonhust with @abrodkin for ARC review requests Add @abrodkin to the list of CODEOWNERS for ARC code (ARCH, BOARDS, DTS) instead of @vonhust. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-24 12:39:00 +02:00
/boards/arc/ @abrodkin @ruuddw
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/ @MaureenHelm @galak
/boards/arm/96b_argonkey/ @avisconti
boards: arm: Add 96Boards Avenger96 board support Add board support for 96Boards Avenger96 board from Arrow Electronics based on STM32MP157A MPU from ST Microelectronics. This board is one of the consumer editions boards of the 96Boards family following the Extented CE form factor. More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ By default Zephyr console output is available via RAM console, but it can also be changed to UART7 exposed as UART0 on 40 pin LS header. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-06-12 19:39:13 +02:00
/boards/arm/96b_avenger96/ @Mani-Sadhasivam
CODEOWNERS: remove rsalveti This GitHub account has been disabled for over a year (it was replaced by a `ricardosalveti` account). Remove from CODEOWNERS. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-15 19:16:19 +02:00
/boards/arm/96b_carbon/ @idlethread
boards: arm: Add support for 96Boards Meerkat96 board Add board suppor for 96Boards Meerkat96 board from Novtech based on NXP i.MX7 multi core processor. Zephyr is ported to run on the single core Cortex-M co-processor on this board. More information about this board can be found in 96Boards website: https://www.96boards.org/product/imx7-96/ By default Zephyr console output is available via UART1 available at the 40pin LS connector. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-06-13 19:25:31 +02:00
/boards/arm/96b_meerkat96/ @Mani-Sadhasivam
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/96b_nitrogen/ @idlethread
/boards/arm/96b_neonkey/ @Mani-Sadhasivam
/boards/arm/96b_stm32_sensor_mez/ @Mani-Sadhasivam
CODEOWNERS: Add codeowner for 96b_wistrio Add myself as the codeowner for 96Boards Wistrio. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 13:56:50 +02:00
/boards/arm/96b_wistrio/ @Mani-Sadhasivam
CODEOWNERS: add code-owner for Arduino Due Assigning code-owner for Arduino Due board. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-03-14 16:10:04 +01:00
/boards/arm/arduino_due/ @ioannisg
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 18:47:13 +02:00
/boards/arm/cc1352r1_launchxl/ @bwitherspoon
/boards/arm/cc26x2r1_launchxl/ @bwitherspoon
CODEOWNERS: Update code ownership for TI SimpleLink code Updated for SimpleLink-related code in ext, board and soc. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-02-26 23:34:29 +01:00
/boards/arm/cc3220sf_launchxl/ @vanti
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/disco_l475_iot1/ @erwango
/boards/arm/frdm*/ @MaureenHelm
/boards/arm/frdm*/doc/ @MaureenHelm @MeganHansen
board: arm: Add google_kukui board This adds support for the EC (embedded controller) on a Google reference board with codename "kukui". This board uses the STM32F098RC chip. We built an application for the board and verified UART functionality on the board. Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-26 00:16:32 +02:00
/boards/arm/google_*/ @jackrosenthal
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/hexiwear*/ @MaureenHelm
/boards/arm/hexiwear*/doc/ @MaureenHelm @MeganHansen
boards: arm: Add ip_k66f board support IP ethernet switch board includes K66F MCU from NXP and Micrel/Microchip KSZ8794CNX switch. Board support includes basic GPIO LED and common functions. Switch function needs support either based on DSA or relative feature in Zephyr which is tracked with issue 22061. Signed-off-by: Parthiban Nallathambi <pn@denx.de>
2020-02-11 22:48:20 +01:00
/boards/arm/ip_k66f/ @parthitce
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/lpcxpresso*/ @MaureenHelm
/boards/arm/lpcxpresso*/doc/ @MaureenHelm @MeganHansen
/boards/arm/mimxrt*/ @MaureenHelm
/boards/arm/mimxrt*/doc/ @MaureenHelm @MeganHansen
/boards/arm/mps2_an385/ @fvincenzo
/boards/arm/msp_exp432p401r_launchxl/ @Mani-Sadhasivam
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 20:42:35 +02:00
/boards/arm/nrf*/ @carlescufi @lemrey @ioannisg
codeowner: add codeowner for ST stm32 development boards Add codeowner for STM32 based ST development boards Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-25 18:00:46 +01:00
/boards/arm/nucleo*/ @erwango
CODEOWNERS: remove rsalveti This GitHub account has been disabled for over a year (it was replaced by a `ricardosalveti` account). Remove from CODEOWNERS. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-15 19:16:19 +02:00
/boards/arm/nucleo_f401re/ @idlethread
board: arm: add support for nuvoton pfm m487 add support for nuvoton pfm m487 development board Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2020-04-24 16:22:12 +02:00
/boards/arm/nuvoton_pfm_m487/ @ssekar15
arch: arm64: Add support for qemu_cortex_a53 board This patch introduces support for the qemu_cortex_a53 board emulated using QEMU (virt platform) adding SoC, board and DTS files. | ./scripts/sanitycheck -p qemu_cortex_a53 | | Total complete: 190/ 190 100% skipped: 40, failed: 0 | 150 of 150 tests passed (100.00%), 0 failed, | 40 skipped with 0 warnings in 580.93 seconds Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-10 18:43:26 +01:00
/boards/arm/qemu_cortex_a53/ @carlocaione
CODEOWNERS: Add Xilinx ZynqMP platform codeowner Add @stephanosio as a code owner for the Xilinx ZynqMP platform, which is used as the primary testing platform for the Cortex-R architecture. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:35:44 +01:00
/boards/arm/qemu_cortex_r*/ @stephanosio
CODEOWNERS: adding code owner for ARM Qemu Cortex-M* platforms Adding code owner for ARM boards - qemu_cortex_m0 - qemu_cortex_m3 Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-09-30 15:50:22 +02:00
/boards/arm/qemu_cortex_m*/ @ioannisg
board: arm: add support for infineon relax kit Add support for relax kit with infineon xmc4500 SoC. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-04-21 12:30:02 +02:00
/boards/arm/xmc45_relax_kit/ @parthitce
CODEOWNERS: add owner for the same4 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-11-04 23:43:05 +01:00
/boards/arm/sam4e_xpro/ @nandojve
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/sam4s_xplained/ @fallrisk
CODEOWNERS: Add SAM E70 code owner Add @nandojve, the SAM V71 platform maintainer, as a code owner for the SAM E70 platform, as these two platforms share the same base and are practically identical. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-24 08:40:45 +01:00
/boards/arm/sam_e70_xplained/ @nandojve
CODEOWNERS: add owner for the samv71 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-12-12 02:50:06 +01:00
/boards/arm/sam_v71_xult/ @nandojve
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/v2m_beetle/ @fvincenzo
/boards/arm/olimexino_stm32/ @ydamigos
boards: arm: Add support for SensorTile.box board The SensorTile.box is a board designed for IoT applications embedding a wide range of intelligent low power MEMS sensors, a STM32L4 microcontroller to manage sensor configuration and process sensor output data, a micro-USB battery charging interface and an ST Bluetooth Low Energy module for wireless communication with a BLE-enabled smartphone. Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-08-05 12:57:25 +02:00
/boards/arm/sensortile_box/ @avisconti
boards: arm: Add steval_fcu001v1 board support BSP for steval_fcu001v1 resubmitted as per PR #18746 Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
2019-10-06 10:01:17 +02:00
/boards/arm/steval_fcu001v1/ @Navin-Sankar
boards: add stm32l1 discovery Tested apps: hello_world, blinky Tested peripherals: UART, SPI Signed-off-by: Karl Palsson <karlp@etactica.com>
2019-10-02 01:12:31 +02:00
/boards/arm/stm32l1_disco/ @karlp
codeowner: add codeowner for ST stm32 development boards Add codeowner for STM32 based ST development boards Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-25 18:00:46 +01:00
/boards/arm/stm32*_disco/ @erwango
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/stm32f3_disco/ @ydamigos
codeowner: add codeowner for ST stm32 development boards Add codeowner for STM32 based ST development boards Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-25 18:00:46 +01:00
/boards/arm/stm32*_eval/ @erwango
CODEOWNERS: handle an account change s/mbolivar/mbolivar-nordic/ Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-17 16:40:58 +01:00
/boards/common/ @mbolivar-nordic
cmake: deprecation of board names This commit introduces boards/deprecated.cmake to allow deprecation of existing boards, when a board is renamed. This allows users to still specify the old board name, and let Zephyr build system to select the new board name. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-03-16 15:36:52 +01:00
/boards/deprecated.cmake @tejlmand
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/boards/nios2/ @wentongwu
/boards/nios2/altera_max10/ @wentongwu
board: stm32_min_dev: Add support for blue/black variant Add support for blue pill and black pill variants of the STM32 minimum development board by splitting board configuration into stm32_min_dev_blue and stm32_min_dev_black. CODEOWNERS: Add myself (@cbsiddharth) as codeowner for stm32_min_dev Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2019-04-07 15:30:00 +02:00
/boards/arm/stm32_min_dev/ @cbsiddharth
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/boards/posix/ @aescolar @daor-oti
/boards/posix/nrf52_bsim/ @aescolar @wopu-ot
riscv32: rename to riscv With the upcoming riscv64 support, it is best to use "riscv" as the subdirectory name and common symbols as riscv32 and riscv64 support code is almost identical. Then later decide whether 32-bit or 64-bit compilation is wanted. Redirects for the web documentation are also included. Then zephyrbot complained about this: " New files added that are not covered in CODEOWNERS: dts/riscv/microsemi-miv.dtsi dts/riscv/riscv32-fe310.dtsi Please add one or more entries in the CODEOWNERS file to cover those files " So I assigned them to those who created them. Feel free to readjust as necessary. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-17 19:17:05 +02:00
/boards/riscv/ @kgugala @pgielda @nategraff-sifive
/boards/riscv/rv32m1_vega/ @MaureenHelm
CODEOWNERS: Add codeowner to boards/shields Following new shield introduction in #14057, it has been highlighted there was no codeowner for boards/shields/. Assign erwango as codeowner. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-11 09:31:53 +01:00
/boards/shields/ @erwango
boards: shields: Introduce atmel_rf2xx module shield The Atmel RF2xx module shield is a generic solution to enable any Atmel AT86RF2xx IEEE 802.15.4 transceiver. This module enables IEEE 802.15.4 RF2xx Zephyr driver. The Atmel RF2xx module shield enables any board with an Atmel Xplained, Xplained-Pro, Arduino or MikroBus expansion header to connect to networks operation with IEEE 802.15.4, OpenThread or any other stack based on this media type. The Atmel RF2xx module is configured to allow interoperate with other medias like Ethernet. User need configure network stack properlly. Fixes #26259. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-05 05:52:14 +02:00
/boards/shields/atmel_rf2xx/ @nandojve
CODEOWNERS: Add boards/shields/esp_8266 owner The esp_8266 shield was added without owner on #24710. Add myself as an owner of esp_8266 shield files. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-11 19:50:40 +02:00
/boards/shields/esp_8266/ @nandojve
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/x86/ @andrewboie @nashif
CODEOWNERS: update owners and added xcc/s1000 related lines Updated for board and toolchain and a few minor fixes. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-24 19:04:38 +01:00
/boards/xtensa/ @nashif @dcpleung
/boards/xtensa/intel_s1000_crb/ @sathishkuttan @dcpleung
boards/xtensa: Add support for ODROID-GO Game Kit Add support for ODROID-GO Game Kit Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-16 12:19:28 +02:00
/boards/xtensa/odroid_go/ @ydamigos
CODEOWNERS: add cmake owners Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-31 13:31:34 +01:00
# All cmake related files
CODEOWNERS: Re-assign reviews from SebastianBoe to tejlmand Transfer review assignments from SebastianBoe to tejlmand. Sebastian Bøe's role is being transferred to Torsten Rasmussen (tejlmand). Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2020-03-26 12:12:59 +01:00
/cmake/ @tejlmand @nashif
/CMakeLists.txt @tejlmand @nashif
CODEOWNERS: add @nashif for docs Add @nashif as codeowner for docs temporarily until we have a dedicated owner. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-30 04:57:08 +01:00
/doc/ @dbkinder
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/doc/guides/coccinelle.rst @himanshujha199640 @JuliaLawall
/doc/CMakeLists.txt @carlescufi
/doc/scripts/ @carlescufi
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/doc/guides/bluetooth/ @joerchan @jhedberg @Vudentz
CODEOWNERS: devicetree updates Update maintainers for code and docs. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-20 17:17:16 +01:00
/doc/guides/dts/ @galak @mbolivar-nordic
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/doc/reference/bluetooth/ @joerchan @jhedberg @Vudentz
CODEOWNERS: devicetree updates Update maintainers for code and docs. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-20 17:17:16 +01:00
/doc/reference/devicetree/ @galak @mbolivar-nordic
sys: add generic asynchronous notification infrastructure k_poll() for a signal is often desired for notification of completion of asynchronous operations, but there are APIs where it may be necessary to invoke "asynchronous" operations from contexts where sleep is disallowed, or before the kernel has been initialized. Extract the general notification solution from the on-off service into a utility that can be used for other APIs. Also move documentation out to a resource management section. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-19 13:01:07 +01:00
/doc/reference/resource_management/ @pabigot
doc: networking: Add ISO-TP documentation This commit adds the documentation for the ISO-TP library Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-08-31 11:35:17 +02:00
/doc/reference/networking/can* @alexanderwachter
CODEOWNERS: adapt for debug and tracing add subsys/tracing and include/tracing and drivers/debug Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-07 03:00:50 +01:00
/drivers/debug/ @nashif
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 18:47:13 +02:00
/drivers/*/*cc13xx_cc26xx* @bwitherspoon
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/*/*mcux* @MaureenHelm
/drivers/*/*stm32* @erwango
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/drivers/*/*native_posix* @aescolar @daor-oti
drivers: pinmux: add driver for NXP LPC11U6X MCUs This patch adds a pinmux driver allowing to configure the IOCON (I/O control) registers found on the LPC11U6x MCUs. Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-04-11 18:16:31 +02:00
/drivers/*/*lpc11u6x* @mbittan @simonguinot
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/adc/ @anangl
drivers: adc: add driver support for ADC1 of stm32 This commit adds driver support for ADC1 on all 8 supported series of stm32 with resolution and conversion time selection and calibration. Currently DMA is not supported for all series, and without it, zephyr won't be able to catch up ADC's end of conversion interrupt, so this version of the driver supports one channel conversion only. Users want multi-channel conversion should use multiple sequences in their app code. This driver uses LL lib rather than HAL because the current HAL lib for ADC will call HAL_DMA_* functions rather than using zephyr's common DMA interface, so that way the driver will break the consistency of the code. This driver has been tested on multiple nucleo boards including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/F746ZG/L073RZ/L476RG and all passed the test cases in tests/drivers/adc/adc_api. If the external ADC line is floating, it may fail the tests since ADC may get 0V and the test cases think 0 is failing. Connect it to any voltage source between 0-3.3V will help passing the test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-05-07 10:37:35 +02:00
/drivers/adc/adc_stm32.c @cybertale
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/drivers/bluetooth/ @joerchan @jhedberg @Vudentz
CODEOWNERS: CAN ownership Add @alexanderwachter as CAN maintainer Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-25 17:15:06 +01:00
/drivers/can/ @alexanderwachter
drivers: can: mcp2515: Add driver for MCP2515 CAN controller The MCP2515 is a CAN controller that can be connected via SPI to an host MCU. This driver adds support for the MCP2515 as a new driver in the CAN subsystem. As it is a SPI peripheral it uses a thread for its interrupt handling and the received message filtering is done inside this interrupt thread, as the MCP2515 filter capabilities are not sufficient for the Zephyr CAN interface. The driver was validated with an external CAN logger and the adjusted CAN sample application. Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2018-06-12 08:23:20 +02:00
/drivers/can/*mcp2515* @karstenkoenig
drivers: clock_control: nrf: reimplementation including API updates Reimplementation of clock control driver for nrf platform. It includes latest API changes: asynchronous starting and getting clock status. Additionally, it implements calibration algorithm which optionally skips calibration based on no temperature change. Internal temperature sensor is used for that. Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2019-06-26 13:27:31 +02:00
/drivers/clock_control/*nrf* @nordic-krch
drivers: esp32/clock_control: Add Clock Driver - Support PLL for Higher Frequencies 80,160,240 MHz - Support XTAL Frequencies 26MHz, 40MHz - Clock Driver can't be disabled, because all of the other drivers will depend on it to get their operating Frequency based on chosen clock source (XTAL/PLL). - Add needed references to BBPLL i2c bus ROM functions. - Add `rtc` node to Device Tree. - Since All Peripherals Frequency is depending on CPU_CLK Source, `clock-source` property added to CPU node Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-05-23 15:46:29 +02:00
/drivers/clock_control/*esp32* @extremegtx
driver: clock: Add clock controller support in NPCX series. Add clock controller support for Nuvoton NPCX series. This CL includes: 1. Add clock controller device tree declarations. 2. Introduce clock-cells in yaml file clock tree to get module's source clock and turn off/on the its clock 3. Clock controller driver implementation. Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-07-02 09:44:38 +02:00
/drivers/clock_control/*npcx* @MulinChao
CODEOWNERS: Set @nordic-krch as the codeowner of the counter driver As the author of the latest rework of the counter driver API, @nordic-krch is a more appropriate person than me to be the codeowner of this driver. Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-03-27 10:58:14 +01:00
/drivers/counter/ @nordic-krch
console: Add semihosting console Many chips have only one serial port. When the serial port is occupied by other devices, there is a lack of a console to output debugging information. Semihosting can provide a console. The disadvantage of semihosting is that a debugger must be connected, so it can only be used for online debugging. Signed-off-by: ZhongYao Luo <LuoZhongYao@gmail.com> Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-11-29 08:07:21 +01:00
/drivers/console/semihost_console.c @luozhongyao
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/drivers/counter/counter_cmos.c @andrewboie
drivers: counter: add Maxim DS3231 support The DS3231 is an I2C real-time clock with internal temperature compensated oscillator, maintaining civil time to 1 s precision with nominal 2 ppm accuracy from 0-40 Cel. The basic functionality is exposed as a counter that is always running at 1 Hz. Much more functionality is exposed as driver-specific API, including the ability to translate between the time scale of the DS3231 and the time scale of the Zephyr uptime clock. This allows correlation of events in the system clock to UTC, TAI, or whatever time scale is used to maintain the DS3231. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-06-24 03:03:52 +02:00
/drivers/counter/maxim_ds3231.c @pabigot
drivers: crypto: add driver for nRF ECB add driver for nRF AES Electronic CodeBook (ECB) peripheral Signed-off-by: Maciej Fabia <maciej.fabia@nordicsemi.no>
2020-03-20 01:17:31 +01:00
/drivers/crypto/*nrf_ecb* @maciekfabia @anangl
CODEOWNERS: Add GSM and UART mux files owner Add myself as an owner of these GSM 07.10 mux files. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-04-01 13:51:55 +02:00
/drivers/console/*mux* @jukkar
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/display/ @vanwinkeljan
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/drivers/display/display_framebuf.c @andrewboie
drivers: dac: Add API for DAC peripherals DAC (digital to analog converter) peripheral driver with a generic API suitable for most MCUs (only basic DAC features considered). Signed-off-by: Martin Jäger <martin@libre.solar>
2020-01-10 10:10:12 +01:00
/drivers/dac/ @martinjaeger
CODEOWNERS: Adding owner on DW DMA driver Just to make CI happy. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-17 08:32:59 +01:00
/drivers/dma/*dw* @tbursztyka
CODEOWNERS: Add ownership for SAM0 DMA driver Add myself as owner for the SAM0 DMA driver. Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-04-30 01:29:00 +02:00
/drivers/dma/*sam0* @Sizurka
drivers: dma: add generic driver support for some series of stm32 This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4 series stm32. Notice due to some bugs, this is currently not working with f7. There are two kinds of IP blocks are used across these stm32, one is the one that has been used on F2/F4/F7 series, and the other one is the one that has been used on F0/F1/F3/L0/L4 series. Memory to memory transfer is only supported on the second DMA on F2/F4 with 'st,mem2mem' to be declared in dts. This driver depends on k_malloc to allocate memory for stream instances, so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them. Common parts of the driver are in dma_stm32.c and SoC related parts are implemented in dma_stm32_v*.c. This driver has been tested on multiple nucleo boards, including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the loop_transfer and chan_blen_transfer test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-10-24 13:06:19 +02:00
/drivers/dma/dma_stm32* @cybertale
drivers: dma: Add pl330 dma driver Add PL330 dma driver support, this driver - supports 32 bit memory to memory operation - supports 36 bit memory to memory operation under a config flag DMA_64BIT - supports secure channel Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2020-05-03 05:57:19 +02:00
/drivers/dma/*pl330* @raveenp
drivers: eeprom: add API for EEPROM devices Add API for accessing Electrically Erasable Programmable Read-Only Memory (EEPROM) devices. EEPROMs have an erase block size of 1 byte, a long lifetime, and allows overwriting data on byte-by-byte access. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-10-20 21:22:03 +02:00
/drivers/eeprom/ @henrikbrixandersen
drivers: eeprom: add driver support for EEPROM of STM32L1 Could not find a supported LL with EEPROM. So I used HAL. Tested with: 96b_wistrio Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2019-12-10 03:44:44 +01:00
/drivers/eeprom/eeprom_stm32.c @KwonTae-young
drivers: entropy: add openisa/RV32M1 entropy driver Wrapper for openisa/RV32M1 TRNG driver Signed-off-by: George Stefan <george.stefan@nxp.com>
2019-04-08 17:12:40 +02:00
/drivers/entropy/*rv32m1* @MaureenHelm
drivers: entropy: gecko: add entropy driver based on GECKO TRNG Add entropy driver based on GECKO TRNG module along with device tree support for EFM32PG and EFR32MG SOCs. Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
2020-02-21 15:22:05 +01:00
/drivers/entropy/*gecko* @chrta
API: espi: Add API for Enhanced Serial Peripheral Interface This API defines following call for eSPI bus drivers - espi_set_config - espi_get_channel_status - espi_send_read_request - espi_send_write_request - espi_send_vwire - espi_receive_vwire - espi_send_oob - espi_receive_oob - espi_flash_read - espi_flash_write - espi_flash_erase Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-05-10 04:05:40 +02:00
/drivers/espi/ @albertofloyd @franciscomunoz @scottwcpg
CODEOWNERS: Add PS/2 owners Set owners of PS/2 modules Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-09-05 03:20:58 +02:00
/drivers/ps2/ @albertofloyd @franciscomunoz @scottwcpg
CODEOWNERS: Add kscan owners Set owners for kscan modules Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-10-07 20:57:13 +02:00
/drivers/kscan/ @albertofloyd @franciscomunoz @scottwcpg
API: peci: Add Platform Environment Control Interface API Add Platform Environment Control Interface API This API defines following calls: - peci_configure - peci_enable - peci_disable - peci_transaction Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-01-24 01:34:57 +01:00
/drivers/peci/ @albertofloyd @franciscomunoz @scottwcpg
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/ethernet/ @jukkar @tbursztyka @pfalcon
drivers: entropy: Add driver for LiteX PRBS module This adds PRBS ranom number generator driver for LiteX SoC builder with its bindings. Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-07-19 15:22:22 +02:00
/drivers/entropy/*litex* @mateusz-holenko @kgugala @pgielda
CODEOWNERS: extend flash driver ownership Added @nvlsianpu as flash and nrf-flash maintainer Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-10-10 11:14:10 +02:00
/drivers/flash/ @nashif @nvlsianpu
/drivers/flash/*nrf* @nvlsianpu
CODEOWNERS: Add entry for JEDEC SPI-NOR flash driver Adding myself as owner. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-09-26 12:39:31 +02:00
/drivers/flash/*spi_nor* @pabigot
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/flash/*stm32* @superna9999
CODEOWNERS: Add entry for gpio drivers Adding code owners of gpio drivers. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-10-12 00:35:09 +02:00
/drivers/gpio/ @mnkp @pabigot
drivers: gpio: ht16k33: add GPIO driver for Holtek HT16K33 LED driver The HT16K33 is a memory mapping, multifunction LED controller driver. The controller supports up to 128 LEDs (up to 16 rows and 8 commons) and matrix key scan circuit of up to 13x3 keys. This commit adds support for the keyscan functionality of the HT16K33. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-03-04 21:27:29 +01:00
/drivers/gpio/*ht16k33* @henrikbrixandersen
drivers: adc: add LMP90xxx ADC driver with GPIO Add driver for the Texas Instruments LMP90xxx series of multi-channel, low-power 16-/24-bit sensor analog frontends (AFEs). The functionality is split into two drivers; an ADC driver and a GPIO driver. Tested with LMP90080 and LMP90100. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-10-07 13:08:44 +02:00
/drivers/gpio/*lmp90xxx* @henrikbrixandersen
CODEWONERS: Update for gpio_stm32 driver Change codeowner following driver indeep rework. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-10-15 09:35:28 +02:00
/drivers/gpio/*stm32* @erwango
drivers: gpio_sx1509b: update to use new GPIO API Update driver code and board files to use new GPIO configuration flags such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver API. Tested on external SX1509B breakout board and Thingy:52. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-09-01 18:05:18 +02:00
/drivers/gpio/*sx1509b* @pabigot
drivers: gpio: Add LiteX GPIO driver This commits adds GPIO driver for LiteX SoC builder. Due to the fact that GPIO in LiteX is unidirectional and can be configured with different pins amount per port, additional entries were added to the dts file. Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
2019-08-02 10:38:56 +02:00
/drivers/gpio/*litex* @mateusz-holenko @kgugala @pgielda
CODEOWNERS: Add hwinfo ownership Add @alexanderwachter as hwinfo maintainer. Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-25 17:22:06 +01:00
/drivers/hwinfo/ @alexanderwachter
drivers: i2c: Add driver for LiteX I2C controller This adds I2C bitbang driver for LiteX SoC builder with its bindings. Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-07-09 15:37:17 +02:00
/drivers/i2c/*litex* @mateusz-holenko @kgugala @pgielda
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/i2s/i2s_ll_stm32* @avisconti
drivers: i2c: Add a dump routine Add a function to dump out a set of I2C messages. It uses debug logging so it only useful for debugging. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-04 23:08:13 +02:00
/drivers/i2c/i2c_common.c @sjg20
i2c: add i2c shell with scan cmd Add a shell to interact with I2C devices. Currently scanning for devices is supported. Example output: uart:~$ i2c scan I2C_1 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- 18 -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: 40 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- 2 devices found on I2C_1 uart:~$ i2c scan I2C_3 i2c - I2C commands Subcommands: I2C_1 :I2C_1 I2C_2 :I2C_2 uart:~$ i2c scan I2C_2 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e -- 20: -- -- -- -- -- -- -- -- -- 29 -- -- -- 2d -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- 56 -- -- -- -- -- -- 5d -- 5f 60: -- -- -- -- -- -- -- -- -- -- 6a -- -- -- -- -- 70: -- -- -- -- -- -- -- -- 7 devices found on I2C_2 This shell is based on the a sample that did the same thing and was limited in support. The sample is now removed in favour of this generic shell module. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-08 23:36:01 +01:00
/drivers/i2c/i2c_shell.c @nashif
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/ieee802154/ @jukkar @tbursztyka
CODEOWNERS: Add @nandojve for /drivers/ieee802154/rf2xx Add myself as code owner for Atmel AT86RF2xx driver. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-01-08 15:28:49 +01:00
/drivers/ieee802154/ieee802154_rf2xx* @jukkar @tbursztyka @nandojve
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/interrupt_controller/ @andrewboie
CODEOWNERS: Add ARM GIC interrupt controller driver codeowner Add @stephanosio as a code owner for the ARM Generic Interrupt Controller (GIC) driver. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:31:04 +01:00
/drivers/interrupt_controller/intc_gic.c @stephanosio
drivers/interrupt_controller: Adopt file naming as other drivers Pattern being <domain>_<model>.<c/h>. Here interrupt_controller as a domain would be far too long so shortening it to "intc", as DTS does actually. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-12-18 09:31:56 +01:00
/drivers/*/intc_vexriscv_litex.c @mateusz-holenko @kgugala @pgielda
drivers: ipm: mhu: Add MHU driver for V2M Musca MHU (Message Handling Unit) enables software to raise interrupts to the processor cores. It is enabled in SSE 200 subsystems. This patch aims to implement inter processor communication. Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-01-18 16:06:48 +01:00
/drivers/ipm/ipm_mhu* @karl-zh
CODEOWNERS: add code owners for nRFx IPM driver We are adding code owners for the Nordic nRFx IPM driver files. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-11-11 16:44:16 +01:00
/drivers/ipm/Kconfig.nrfx @masz-nordic @ioannisg
/drivers/ipm/Kconfig.nrfx_ipc_channel @masz-nordic @ioannisg
ipm: add driver for the CAVS DSP Intra-DSP Communication (IDC) This adds a rather primitive driver for use with the Intra-DSP Communication (IDC) on the DSP on certain Intel SoCs. The IDC generates interrupts from one core to another by writing to certain registers. This is also being utilized as the scheduler IPI since it can interrupt other cores. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-02-27 03:11:44 +01:00
/drivers/ipm/ipm_cavs_idc* @dcpleung
CODEOWNERS: add code owners for nRFx IPM driver We are adding code owners for the Nordic nRFx IPM driver files. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-11-11 16:44:16 +01:00
/drivers/ipm/ipm_nrfx_ipc.c @masz-nordic @ioannisg
/drivers/ipm/ipm_nrfx_ipc.h @masz-nordic @ioannisg
CODEOWNERS: update arnop2 ownership name Following update of the Github username,replace owner from arnop2 to arnopo. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-12-06 17:00:08 +01:00
/drivers/ipm/ipm_stm32_ipcc.c @arnopo
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/led/ @Mani-Sadhasivam
CODEOWNERS: handle an account change s/mbolivar/mbolivar-nordic/ Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-17 16:40:58 +01:00
/drivers/led_strip/ @mbolivar-nordic
CODEOWNERS: Add entry for LoRa support Add CODEOWNERS entry for LoRa API, drivers and samples. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-07-22 17:12:47 +02:00
/drivers/lora/ @Mani-Sadhasivam
CODEOWNERS: add modem ownership Add @mike-scott as modem drivers maintainer Signed-off-by: Michael Scott <mike@foundries.io>
2019-03-03 22:09:52 +01:00
/drivers/modem/ @mike-scott
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/drivers/pcie/ @andrewboie
CODEOWNERS: remove rsalveti This GitHub account has been disabled for over a year (it was replaced by a `ricardosalveti` account). Remove from CODEOWNERS. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-15 19:16:19 +02:00
/drivers/pinmux/stm32/ @idlethread
arc: hsdk: add pinmux driver support and doc enhancement * add pinmux driver. hsdk board has arduino, mikrobus and pmod interfaces, which can be confiured for different function, such as: gpio, spi, uart, iic. * add introduction for arduino, mikrobus and pmod interfaces. Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2019-09-10 05:18:25 +02:00
/drivers/pinmux/*hsdk* @iriszzw
drivers: pwm: Add driver for LiteX PWM peripherial PWM driver for LiteX SoC builder was created. Because LiteX supports only one channel for each PWM device, an appropriate restriction was made. Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-07-12 15:06:30 +02:00
/drivers/pwm/*litex* @mateusz-holenko @kgugala @pgielda
drivers: pwm: add a SAM0 TCC based PWM driver This runs the Timer/Counter for Control in 'normal' PWM mode. The number of channels and counter width depends on the device and is imported from DeviceTree. Signed-off-by: Michael Hope <mlhx@google.com>
2020-06-01 13:36:22 +02:00
/drivers/pwm/*sam0* @nzmichaelh
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 20:42:35 +02:00
/drivers/sensor/ @MaureenHelm
CODEOWNERS: Add codeowner for ams iAQcore and ENS210 Add @alexanderwachter as codeowner for AMS iAQcore and ENS210 Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-03-02 16:17:04 +01:00
/drivers/sensor/ams_iAQcore/ @alexanderwachter
/drivers/sensor/ens210/ @alexanderwachter
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/sensor/hts*/ @avisconti
/drivers/sensor/lis*/ @avisconti
/drivers/sensor/lps*/ @avisconti
/drivers/sensor/lsm*/ @avisconti
CODEOWNERS: Add codeowner for drivers/sensor/mpr Add myself as codeowner as this was not done in the initial PR for the mpr driver. Signed-off-by: Sven Herrmann <sven.herrmann@posteo.de>
2020-07-22 10:47:24 +02:00
/drivers/sensor/mpr/ @sven-hm
driver/sensor: add STTS751 temperature sensor Add support to STM STTS751 temperature sensor. Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-07-16 08:40:16 +02:00
/drivers/sensor/st*/ @avisconti
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/drivers/serial/uart_altera_jtag_hal.c @wentongwu
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/drivers/serial/*ns16550* @andrewboie
CODEOWNERS: Add @Mierunski and @anangl for nRF UART drivers Add code owners for nRF UART drivers and the corresponding Kconfig file so that some reviewers are automatically assigned for these files. Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-04-09 11:07:06 +02:00
/drivers/serial/*nrfx* @Mierunski @anangl
drivers: serial: add LiteUART driver Add LiteX UART driver with bindings for this device. Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-03-28 14:37:03 +01:00
/drivers/serial/Kconfig.litex @mateusz-holenko @kgugala @pgielda
/drivers/serial/uart_liteuart.c @mateusz-holenko @kgugala @pgielda
drivers: serial: uart_rtt: Virtual UARTs over RTT channels Add support for virtual UART device that uses Segger RTT channels for data transfers. Due to the RTT principle, this driver supports only polling API. Signed-off-by: Pavel Kral <pavel.kral@omsquare.com>
2019-07-15 18:47:43 +02:00
/drivers/serial/Kconfig.rtt @carlescufi @pkral78
/drivers/serial/uart_rtt.c @carlescufi @pkral78
serial: Add Xilinx ZynqMP PS uart driver Add ZynqMP PS uart driver for Xilinx ZynqMP platform Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
2018-11-18 08:29:47 +01:00
/drivers/serial/Kconfig.xlnx @wjliang
/drivers/serial/uart_xlnx_ps.c @wjliang
drivers: serial: add XMC seris UART support Add infineon XMC4 series UART support. Driver supports only poll mode using XMCLib. Out of 4 available UART's on SoC, only UART1 is confgired by default in UART mode until GPIO & pinctrl support. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-04-21 12:16:59 +02:00
/drivers/serial/*xmc4xxx* @parthitce
drivers: serial: add support for Nuvoton series UART Add Nuvoton numicro series UART support, currently supports only poll mode. UART0 clock and pincontrol are directly configured, will be replace when clock and gpio support is added. Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2020-04-24 16:21:29 +02:00
/drivers/serial/*nuvoton* @ssekar15
CODEOWNERS: Update networking files Some networking related files were missing owner. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-04-24 16:53:49 +02:00
/drivers/net/ @jukkar @tbursztyka
/drivers/ptp_clock/ @jukkar
CODEOWNERS: take ownership of the RV32M1 Timer/PWM driver Take ownership of the driver for the OpenISA RV32M1 Timer/PWM (TPM) module. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-12-03 17:51:44 +01:00
/drivers/pwm/*rv32m1* @henrikbrixandersen
drivers: pwm: add PWM shell Add shell commands for setting PWM period and duty cycle (in cycles, microseconds, or nanoseconds). Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-11-05 13:45:13 +01:00
/drivers/pwm/pwm_shell.c @henrikbrixandersen
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/spi/ @tbursztyka
/drivers/spi/spi_ll_stm32.* @superna9999
drivers: spi: rv32m1: Add driver for RV32M1 LPSPI Add SPI driver and bindings for LPSPI peripheral for the RV32M1 SOC. Based heavily on the existing mcux LPSPI driver. Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2019-08-07 17:13:35 +02:00
/drivers/spi/spi_rv32m1_lpspi* @karstenkoenig
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/drivers/timer/apic_timer.c @andrewboie
drivers: timer: Add per-core ARM architected timer ARM cores may have a per-core architected timer, which provides per-cpu timers, attached to a GIC to deliver its per-processor interrupts via PPIs. This is the most common case supported by QEMU in the virt platform. This patch introduces support for this timer abstracting the way the timer registers are actually accessed. This is needed because different architectures (for example ARMv7-R vs ARMv8-A) use different registers and even the same architecture (ARMv8-A) can actually use different timers (ELx physical timers vs ELx virtual timers). So we introduce the common driver here but the actual SoC / architecture / board must provide the three helpers (arm_arch_timer_set_compare(), arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file imported through the arch/cpu.h header file. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-10-27 17:12:58 +01:00
/drivers/timer/arm_arch_timer.c @carlocaione
CODEOWNERS: Adding missing code owner for Cortex-M SysTick driver Adding code-owner for the ARM Cortex-M SysTick-based timer driver. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-10 10:10:18 +02:00
/drivers/timer/cortex_m_systick.c @ioannisg
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/drivers/timer/altera_avalon_timer_hal.c @wentongwu
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/timer/riscv_machine_timer.c @nategraff-sifive @kgugala @pgielda
drivers: timer: add LiteX timer driver Add LiteX timer driver with bindings for this device. Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-03-28 14:40:03 +01:00
/drivers/timer/litex_timer.c @mateusz-holenko @kgugala @pgielda
drivers: timer: xlnx_psttc_timer: Implement tickless support This commit reworks the Xilinx TTC timer driver to use the "match" mode instead of the "interval" mode which counts up to the specified value and resets to zero. Using the "match" mode ensures that the timer keeps counting even after an interrupt is triggered, and facilitates the tickless mode support implementation. This also allows `z_timer_cycle_get_32` to return the correct cycle count when interrupt is locked; thereby, fixing the k_busy_wait hang issue. Note that the TTC "match" mode emulation (and tickless timer operation) is only stable when the QEMU icount mode is enabled. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-18 05:47:19 +01:00
/drivers/timer/xlnx_psttc_timer* @wjliang @stephanosio
CODEOWNERS: Add entry for CC13x2/CC26x2 RTC timer driver Adding @vanti as an owner. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-09-19 19:23:03 +02:00
/drivers/timer/cc13x2_cc26x2_rtc_timer.c @vanti
timer: add CAVS DSP wall clock timer for Intel SoC The DSP wall clock timer on some Intel SoC is a timer driven directly by external oscillator and is external to the CPU core(s). It is not as fast as the internal core clock, but provides a common and synchronized counter for all CPU cores (which is useful for SMP). This uses the RISCV timer as base as it is using 64-bit counter. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 07:31:41 +01:00
/drivers/timer/cavs_timer.c @dcpleung
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/usb/ @jfischer-phytec-iot @finikorg
/drivers/usb/device/usb_dc_stm32.c @ydamigos @loicpoulain
CODEOWNERS: Add drivers/video path Add myself to owner of drivers/video. Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-07-01 17:29:42 +02:00
/drivers/video/ @loicpoulain
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/i2c/i2c_ll_stm32* @ldts @ydamigos
drivers: i2c: rv32m1: add I2C driver for the RV32M1 RI5CY SoC Add driver and device tree binding for the Low Power Inter-Integrated Circuit (LPI2C) controllers found in the RV32M1 RI5CY SoC. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-04-01 21:09:44 +02:00
/drivers/i2c/i2c_rv32m1_lpi2c* @henrikbrixandersen
CODEOWNERS: Add ownership for SAM0 I2C driver Add myself as owner for the SAM0 I2C driver. Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-04-30 01:17:44 +02:00
/drivers/i2c/*sam0* @Sizurka
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/drivers/i2c/i2c_dw* @dcpleung
drivers: watchdog: add system calls wdt_install_timeout() was skipped as it installs an ISR-context callback handler function. The rest are simple wrappers. Added myself as the maintainer of the syscall handlers. WDT subsystem appears to not currently have an owner. Fixes: #21432 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-12-16 21:15:45 +01:00
/drivers/*/*xec* @franciscomunoz @albertofloyd @scottwcpg
drivers/watchdog: Add support for SiLabs Gecko Watchdog Watchdog type is found on e.g. Pearl/Jade Gecko, often more than 1 is present. Driver supports timeout and (minimum) window configuration and reset or timeout interrupt support for now. Signed-off-by: Oane Kingma <o.kingma@interay.com>
2019-11-04 16:08:24 +01:00
/drivers/watchdog/*gecko* @oanerer
drivers: watchdog: add system calls wdt_install_timeout() was skipped as it installs an ISR-context callback handler function. The rest are simple wrappers. Added myself as the maintainer of the syscall handlers. WDT subsystem appears to not currently have an owner. Fixes: #21432 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-12-16 21:15:45 +01:00
/drivers/watchdog/wdt_handlers.c @andrewboie
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/wifi/ @jukkar @tbursztyka @pfalcon
CODEOWNERS: fix syntax for directories Add trailing "/" to signify directories. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-19 01:32:55 +01:00
/drivers/wifi/eswifi/ @loicpoulain
CODEOWNERS: replace @vonhust with @abrodkin for ARC review requests Add @abrodkin to the list of CODEOWNERS for ARC code (ARCH, BOARDS, DTS) instead of @vonhust. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-24 12:39:00 +02:00
/dts/arc/ @abrodkin @ruuddw @iriszzw
CODEOWNERS: add owner for the same4 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-11-04 23:43:05 +01:00
/dts/arm/atmel/sam4e* @nandojve
CODEOWNERS: Add code ownership for Atmel samr21 code Take ownership of external SDK files. Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2019-03-05 19:26:41 +01:00
/dts/arm/atmel/samr21.dtsi @benpicco
soc: atmel_sam0: Add SAME54 This adds supoprt for the Atmel SAME54 SoC. The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts. Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2019-03-14 15:18:59 +01:00
/dts/arm/atmel/sam*5*.dtsi @benpicco
CODEOWNERS: Add SAM E70 code owner Add @nandojve, the SAM V71 platform maintainer, as a code owner for the SAM E70 platform, as these two platforms share the same base and are practically identical. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-24 08:40:45 +01:00
/dts/arm/atmel/same70* @nandojve
CODEOWNERS: add owner for the samv71 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-12-12 02:50:06 +01:00
/dts/arm/atmel/samv71* @nandojve
dts: atmel sam: Add pinctrl support for SAM UART and USART Add pinctl support for the SAM UART and SAM USART devices. We update the UART and USART bindings to have pinctrl-0 bindings that are expected to have 2 phandles to the RX & TX pinctrl nodes. The pinctrl nodes will have an 'atmel,pins' property that describes the GPIO port, pin and periphal configuration for that pin. We add sam*-pinctrl.dtsi files with all the various pin ctrl configuration operations supported by the given SoC family. These files are based on data extracted from the Atmel ASF HAL (in include/sam<FAMILY>/pio/*.h). Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-07 15:19:32 +02:00
/dts/arm/atmel/ @galak
arm: Add Broadcom Valkyrie SoC support Add initial support for Broadcom Valkyrie SoC as part of Zephyr. Signed-off-by: Scott Branden <scott.branden@broadcom.com>
2020-01-08 22:18:10 +01:00
/dts/arm/broadcom/ @sbranden
soc: arm: add infineon_xmc series support Add infineon xmc series with XMC4500 support. XMC series comes with, - CPU operates upto 120MHz - 3 RAM (PSRAM1 - code, DSRAM1 - data and DSRAM2 - communiation) - upto 1MB flash init: clock control & gpio is not done, so SoC initialization directly relies on HAL. Core operating clock is stored in no_init section, which is kept under DSRAM1. Only DSRAM1 is used until clock support. Using PSRAM1 and DSRAM1 needs adaptation in linker script - planned for next revision. Note: SystemInit cannot be consumed directly due to vector table + HAL linker dependency. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-04-21 11:37:42 +02:00
/dts/arm/infineon/ @parthitce
arch: arm64: Add support for qemu_cortex_a53 board This patch introduces support for the qemu_cortex_a53 board emulated using QEMU (virt platform) adding SoC, board and DTS files. | ./scripts/sanitycheck -p qemu_cortex_a53 | | Total complete: 190/ 190 100% skipped: 40, failed: 0 | 150 of 150 tests passed (100.00%), 0 failed, | 40 skipped with 0 warnings in 580.93 seconds Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-10 18:43:26 +01:00
/dts/arm/qemu-virt/ @carlocaione
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/dts/arm/st/ @erwango
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 18:47:13 +02:00
/dts/arm/ti/cc13?2* @bwitherspoon
/dts/arm/ti/cc26?2* @bwitherspoon
dts: arm: add device tree file for TI CC3235SF This dtsi file adds definitions for memory regions on the SoC. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-04-26 00:37:55 +02:00
/dts/arm/ti/cc3235* @vanti
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/dts/arm/nordic/ @ioannisg @carlescufi
soc: arm: add support for nuvoton numicro m48x series Add initial support for nuvoton numicro m48x SoC series, basic init and uart functionality are covered with gpio and clock directly relies on HAL. Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2020-04-15 10:04:50 +02:00
/dts/arm/nuvoton/ @ssekar15
CODEOWNERS: Add code owner for nxp dts Adds @MaureenHelm as code owner for nxp device tree bindings. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-03-07 22:01:54 +01:00
/dts/arm/nxp/ @MaureenHelm
dts : arm : Add Microchip MEC1501 SoC device tree Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupts are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 00:05:35 +02:00
/dts/arm/microchip/ @franciscomunoz @albertofloyd @scottwcpg
boards/arm: Add initial support for SiLabs Giant Gecko GG11 STK This commit adds initial support for the Silicon Labs EFM32 Giant Gecko GG11 StarterKit. Features supported for now are NVIC, SysTick, GPIO, Flash, Counter, I2C, UART and Ethernet. Support for Watchdog and ADC will follow as soon as their respective PRs are merged. Signed-off-by: Oane Kingma <o.kingma@interay.com>
2019-11-29 21:32:13 +01:00
/dts/arm/silabs/efm32gg11b* @oanerer
arm: exx32: Add Silabs EFM32JG12B soc files The Silicon Labs EFM32 Jade Gecko MCU includes: * Cortex-M3 core at 40MHz * up to 1024KB of flash and 256KB of RAM * multiple low power peripherals This is basically the same as the EFM32 Pearl Gecko, but with an ARM Cortex-M3 core instead of a Cortex-M4F. Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2019-12-04 10:38:47 +01:00
/dts/arm/silabs/efm32_jg_pg* @chrta
soc: silabs_exx32: Add support for SiLabs EFR32BG13P SoC This commit adds support for Silicon Labs EFR32BG13P (Blue Gecko) SoC. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-01-26 22:37:50 +01:00
/dts/arm/silabs/efr32bg13p* @mnkp
arm: exx32: Add Silabs EFM32JG12B soc files The Silicon Labs EFM32 Jade Gecko MCU includes: * Cortex-M3 core at 40MHz * up to 1024KB of flash and 256KB of RAM * multiple low power peripherals This is basically the same as the EFM32 Pearl Gecko, but with an ARM Cortex-M3 core instead of a Cortex-M4F. Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2019-12-04 10:38:47 +01:00
/dts/arm/silabs/efm32jg12b* @chrta
/dts/arm/silabs/efm32pg12b* @chrta
soc: silabs_exx32: Add support for SiLabs EFR32MG21 SoC This commit adds support for Silicon Labs EFR32MG21 (Mighty Gecko) SoC. Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
2020-07-13 17:31:19 +02:00
/dts/arm/silabs/efr32mg21* @l-alfred
riscv32: rename to riscv With the upcoming riscv64 support, it is best to use "riscv" as the subdirectory name and common symbols as riscv32 and riscv64 support code is almost identical. Then later decide whether 32-bit or 64-bit compilation is wanted. Redirects for the web documentation are also included. Then zephyrbot complained about this: " New files added that are not covered in CODEOWNERS: dts/riscv/microsemi-miv.dtsi dts/riscv/riscv32-fe310.dtsi Please add one or more entries in the CODEOWNERS file to cover those files " So I assigned them to those who created them. Feel free to readjust as necessary. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-17 19:17:05 +02:00
/dts/riscv/microsemi-miv.dtsi @galak
/dts/riscv/rv32m1* @MaureenHelm
/dts/riscv/riscv32-fe310.dtsi @nategraff-sifive
/dts/riscv/riscv32-litex-vexriscv.dtsi @mateusz-holenko @kgugala @pgielda
CODEOWNERS: Add Cortex-R arch codeowner Add @stephanosio as a code owner for the Cortex-R architecture-related directories and files. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:28:21 +01:00
/dts/arm/armv7-r.dtsi @bbolen @stephanosio
arch: arm64: Add support for qemu_cortex_a53 board This patch introduces support for the qemu_cortex_a53 board emulated using QEMU (virt platform) adding SoC, board and DTS files. | ./scripts/sanitycheck -p qemu_cortex_a53 | | Total complete: 190/ 190 100% skipped: 40, failed: 0 | 150 of 150 tests passed (100.00%), 0 failed, | 40 skipped with 0 warnings in 580.93 seconds Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-10 18:43:26 +01:00
/dts/arm/armv8-a.dtsi @carlocaione
CODEOWNERS: Add Xilinx ZynqMP platform codeowner Add @stephanosio as a code owner for the Xilinx ZynqMP platform, which is used as the primary testing platform for the Cortex-R architecture. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:35:44 +01:00
/dts/arm/xilinx/ @bbolen @stephanosio
dts: Restructure xtensa dts directory Restructure xtensa dts directory Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-16 13:17:06 +02:00
/dts/xtensa/xtensa.dtsi @ydamigos
CODEOWNERS: Add @dcpleung as owner for /dts/xtensa/intel/ Add Daniel Leung as code owner for all Intel xtensa dts files. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-12-20 12:26:33 +01:00
/dts/xtensa/intel/ @dcpleung
CODEOWNERS: add owner for /dts/bindings/ @galak is now the proud owner of /dts/bindings/. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-03-28 14:13:40 +01:00
/dts/bindings/ @galak
CODEOWNERS: fix 3 check-compliance.py issues not reported by github - PR #13722 moved 3 gen_*.py to /arch/x86/ without updating CODEOWNERS - PR #13745 forgot a trailing slash in /dts/bindings/can - PR #13675 forgot a trailing slash in /samples/boards/intel_s1000_crb No idea why github doesn't keep reporting these every time and impossible to tell as CI hides most of its logs. Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2019-03-01 05:56:55 +01:00
/dts/bindings/can/ @alexanderwachter
CODEOWNERS: remove use of commas Commas are not allowed in this file and prevent parsing by github Error introduced in 7c7db00a7759a44bbca414d5d1e943f211483190 Fixes #15998 Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-05-08 08:38:27 +02:00
/dts/bindings/iio/adc/st*stm32-adc.yaml @cybertale
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/dts/bindings/serial/ns16550.yaml @andrewboie
dts: nrf: Temp device node added to nRF5 devices with yaml binding 1. Temp device node added to all nRF5 DTSI files. 2. Added yaml binding for Nordic Temp node. 3. Set codeowner of nordic dts bindings to @anangl Signed-off-by: Gaute Gamnes <gaute.gamnes@nordicsemi.no>
2019-02-14 09:44:04 +01:00
/dts/bindings/*/nordic* @anangl
CODEOWNERS: Add code owner for nxp dts Adds @MaureenHelm as code owner for nxp device tree bindings. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-03-07 22:01:54 +01:00
/dts/bindings/*/nxp* @MaureenHelm
CODEOWNERS: Add code owner for rv32m1_vega related files Adds @MaureenHelm as the code owner for all rv32m1_vega related files. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-04-18 18:16:48 +02:00
/dts/bindings/*/openisa* @MaureenHelm
CODEOWNERS: remove use of commas Commas are not allowed in this file and prevents parsing by github. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 21:27:44 +02:00
/dts/bindings/*/st* @erwango
/dts/bindings/sensor/ams* @alexanderwachter
dts: bindings: sram: add SiFive dtim0 bindings Add bindings for SiFive Data Tightly-Integrated Memory. Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-04-18 15:45:08 +02:00
/dts/bindings/*/sifive* @mateusz-holenko @kgugala @pgielda @nategraff-sifive
drivers: serial: add LiteUART driver Add LiteX UART driver with bindings for this device. Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-03-28 14:37:03 +01:00
/dts/bindings/*/litex* @mateusz-holenko @kgugala @pgielda
drivers: interrupt_controller: add LiteX interrupt controller driver Add LiteX interrupt controller driver and bindings for this device. Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-03-28 14:44:12 +01:00
/dts/bindings/*/vexriscv* @mateusz-holenko @kgugala @pgielda
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/dts/posix/ @aescolar @vanwinkeljan @daor-oti
dts : bindings : sensor : bme680 Added support for BME680 Added support to the dts for the BME680 Environmental sensor Signed-off-by: Bosch Sensortec <github@bosch-sensortec.com>
2018-09-27 19:16:44 +02:00
/dts/bindings/sensor/*bme680* @BoschSensortec
CODEWONERS: syntax fix: Remove comma A comma was added to a new path in 9dbdd81abe22dcbc671ea066cfdfc041d71f3c83 But GitHub's CODEOWNERS parsing cannot handle commas in paths => Remove it Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-07-04 08:56:57 +02:00
/dts/bindings/sensor/st* @avisconti
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/ @nashif @carlescufi @galak @MaureenHelm
/include/drivers/adc.h @anangl
/include/drivers/can.h @alexanderwachter
/include/drivers/counter.h @nordic-krch
drivers: dac: Add API for DAC peripherals DAC (digital to analog converter) peripheral driver with a generic API suitable for most MCUs (only basic DAC features considered). Signed-off-by: Martin Jäger <martin@libre.solar>
2020-01-10 10:10:12 +01:00
/include/drivers/dac.h @martinjaeger
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/drivers/display.h @vanwinkeljan
drivers: espi: move header to include/drivers Driver APIs need to go into include/drivers/. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-10-01 16:49:26 +02:00
/include/drivers/espi.h @albertofloyd @franciscomunoz @scottwcpg
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/drivers/bluetooth/ @joerchan @jhedberg @Vudentz
CODEOWNERS: extend flash driver ownership Added @nvlsianpu as flash and nrf-flash maintainer Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-10-10 11:14:10 +02:00
/include/drivers/flash.h @nashif @carlescufi @galak @MaureenHelm @nvlsianpu
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/drivers/led/ht16k33.h @henrikbrixandersen
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/include/drivers/interrupt_controller/ @andrewboie
CODEOWNERS: Add ARM GIC interrupt controller driver codeowner Add @stephanosio as a code owner for the ARM Generic Interrupt Controller (GIC) driver. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:31:04 +01:00
/include/drivers/interrupt_controller/gic.h @stephanosio
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/include/drivers/pcie/ @andrewboie
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/drivers/hwinfo.h @alexanderwachter
/include/drivers/led.h @Mani-Sadhasivam
CODEOWNERS: handle an account change s/mbolivar/mbolivar-nordic/ Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-17 16:40:58 +01:00
/include/drivers/led_strip.h @mbolivar-nordic
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/drivers/sensor.h @MaureenHelm
/include/drivers/spi.h @tbursztyka
CODEOWNERS: Add entry for LoRa support Add CODEOWNERS entry for LoRa API, drivers and samples. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-07-22 17:12:47 +02:00
/include/drivers/lora.h @Mani-Sadhasivam
API: peci: Add Platform Environment Control Interface API Add Platform Environment Control Interface API This API defines following calls: - peci_configure - peci_enable - peci_disable - peci_transaction Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-01-24 01:34:57 +01:00
/include/drivers/peci.h @albertofloyd @franciscomunoz @scottwcpg
mbedtls: provide user mode access The mbedtls library has some globals which results in faults when user mode tries to access them. Instantiate a memory partition for mbedtls's globals. The linker will place all globals found by building this library into this partition. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-27 23:41:45 +01:00
/include/app_memory/ @andrewboie
CODEOWNERS: replace @vonhust with @abrodkin for ARC review requests Add @abrodkin to the list of CODEOWNERS for ARC code (ARCH, BOARDS, DTS) instead of @vonhust. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-24 12:39:00 +02:00
/include/arch/arc/ @abrodkin @ruuddw
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/arch/arc/arch.h @andrewboie
/include/arch/arc/v2/irq.h @andrewboie
arch: arm: Move ARM code to AArch32 sub-directory Before introducing the code for ARM64 (AArch64) we need to relocate the current ARM code to a new AArch32 sub-directory. For now we can assume that no code is shared between ARM and ARM64. There are no functional changes. The code is moved to the new location and the file paths are fixed to reflect this change. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-09 18:49:36 +01:00
/include/arch/arm/aarch32/ @MaureenHelm @galak @ioannisg
arch: arm: aarch32: Rename `cortex_r` to `cortex_a_r` This commit renames the `cortex_r` directory under the AArch32 to `cortex_a_r`, in preparation for the AArch32 Cortex-A support. The rationale for this renaming is that the Cortex-A and Cortex-R share the same base design and the difference between them, other than the MPU vs. MMU, is minimal. Since most of the architecture port code and configurations will be shared between the Cortex-A and Cortex-R architectures, it is advantageous to have them together in the same directory. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-22 15:19:22 +01:00
/include/arch/arm/aarch32/cortex_a_r/ @stephanosio
arch: arm64: Introduce ARM64 (AArch64) architecture Introduce the basic ARM64 architecture support. A new CONFIG_ARM64 symbol is introduced for the new architecture and new cmake / Kconfig files are added to switch between ARM and ARM64. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-10 17:17:19 +01:00
/include/arch/arm/aarch64/ @carlocaione
arch: arm: Move ARM code to AArch32 sub-directory Before introducing the code for ARM64 (AArch64) we need to relocate the current ARM code to a new AArch32 sub-directory. For now we can assume that no code is shared between ARM and ARM64. There are no functional changes. The code is moved to the new location and the file paths are fixed to reflect this change. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-09 18:49:36 +01:00
/include/arch/arm/aarch32/irq.h @andrewboie
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/arch/nios2/ @andrewboie
/include/arch/nios2/arch.h @andrewboie
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/include/arch/posix/ @aescolar @daor-oti
riscv32: rename to riscv With the upcoming riscv64 support, it is best to use "riscv" as the subdirectory name and common symbols as riscv32 and riscv64 support code is almost identical. Then later decide whether 32-bit or 64-bit compilation is wanted. Redirects for the web documentation are also included. Then zephyrbot complained about this: " New files added that are not covered in CODEOWNERS: dts/riscv/microsemi-miv.dtsi dts/riscv/riscv32-fe310.dtsi Please add one or more entries in the CODEOWNERS file to cover those files " So I assigned them to those who created them. Feel free to readjust as necessary. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-17 19:17:05 +02:00
/include/arch/riscv/ @nategraff-sifive @kgugala @pgielda
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/include/arch/x86/ @andrewboie @wentongwu
CODEOWNERS: update file for include/arch/common/ New files added to this directory. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-03 14:13:04 +02:00
/include/arch/common/ @andrewboie @andyross @nashif
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/arch/xtensa/ @andrewboie
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/sys/atomic.h @andrewboie @andyross
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/include/bluetooth/ @joerchan @jhedberg @Vudentz
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/cache.h @andrewboie @andyross
canbus: canopen: add object dictionary storage Add support for storing the CANopen object dictionary to non-volatile storage. This fixes #15278. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-09-26 15:06:55 +02:00
/include/canbus/ @alexanderwachter
CODEOWNERS: adapt for debug and tracing add subsys/tracing and include/tracing and drivers/debug Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-07 03:00:50 +01:00
/include/tracing/ @wentongwu @nashif
/include/debug/ @nashif
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/include/device.h @wentongwu @nashif
CODEOWNERS: devicetree updates Update maintainers for code and docs. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-20 17:17:16 +01:00
/include/devicetree.h @galak
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/display/ @vanwinkeljan
drivers: clock_control: mcux_mcg: add driver for NXP Kinetis MCG Add driver shim for the NXP Kinetis Multipurpose Clock Generator (MCG) module. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-05-19 23:39:32 +02:00
/include/dt-bindings/clock/kinetis_mcg.h @henrikbrixandersen
soc: arm: ke1xf: add NXP Kinetis KE1xF SoC series support Add initial support for the NXP Kinetis KE1xF SoC series (MKE14F16, MKE16F16, and MKE18F16). Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-05-05 00:01:56 +02:00
/include/dt-bindings/clock/kinetis_scg.h @henrikbrixandersen
dt-bindings: add support for parsing stm32 dma consumer cells Add support for parsing stm32 dma consumer cells, format of which follows dma dts format declared in the Linux Kernel for the dma of stm32: https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/plain/Bindings/dma/stm32-dma.txt Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-10-24 06:29:47 +02:00
/include/dt-bindings/dma/stm32_dma.h @cybertale
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/include/dt-bindings/pcie/ @andrewboie
CODEOWNERS: Add codeowner for include/dt-bindings/usb/usb.h Update CODEOWNER for new include/dt-bindings/usb/usb.h file. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-05-17 13:59:10 +02:00
/include/dt-bindings/usb/usb.h @galak @finikorg
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/include/fs/ @nashif @wentongwu
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/init.h @andrewboie @andyross
/include/irq.h @andrewboie @andyross
/include/irq_offload.h @andrewboie @andyross
/include/kernel.h @andrewboie @andyross
/include/kernel_version.h @andrewboie @andyross
linker: sort app shared mem partition by alignment If CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT is enabled, the app shared memory partition may cause waste of memory due to the need for padding. For example, tests/subsys/jwt and board mps2_an385: z_test_mem_partition: addr 0x20000000, size 52 z_libc_partition : addr 0x20000040, size 4 k_mbedtls_partition : addr 0x20008000, size 32736 ending at 0x2000ffff, taking up 65536 bytes With power-of-two size and alignment requirement, k_mbedtls_partition takes up 32KB memory and needs to be aligned on 32KB boundary. If the above partitions are ordered as shown, there needs to be a lot of padding after z_libc_partition before k_mbedtls_partition can start. In order to minimize padding, these partitions need to be sort by size in descending order. After the changes here, the partitions are: k_mbedtls_partition : addr 0x20000000, size 32736 z_test_mem_partition: addr 0x20008000, size 52 z_libc_partition : addr 0x20008040, size 4 ending at 0x2000805f, taking up 32864 bytes With the above example, sorting results in a saving of 32672 bytes of saving. Fixes #14121 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-03-10 22:20:21 +01:00
/include/linker/app_smem*.ld @andrewboie
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 20:42:35 +02:00
/include/linker/ @andrewboie @andyross
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/logging/ @nordic-krch
CODEOWNERS: Add code owner for drivers/osdp Add myself (@cbsiddharth) as code owner for subsys/mgmt/osdp/, samples/sybsys/mgmt/osdp/ and includes/mgmt/osdp.h. Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2020-06-29 07:45:45 +02:00
/include/mgmt/osdp.h @cbsiddharth
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/net/ @jukkar @tbursztyka @pfalcon
/include/net/buf.h @jukkar @jhedberg @tbursztyka @pfalcon
/include/posix/ @pfalcon
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/power/power.h @wentongwu @nashif
CODEOWNERS: Update networking files Some networking related files were missing owner. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-04-24 16:53:49 +02:00
/include/ptp_clock.h @jukkar
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/shared_irq.h @andrewboie @andyross
CODEOWNERS: update due to nickname change Modified nickname from jarz-nordic to jakub-uC Signed-off-by: Jakub Rzeszutko <jakubr@uber.com>
2019-06-06 08:42:20 +02:00
/include/shell/ @jakub-uC @nordic-krch
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/sw_isr_table.h @andrewboie @andyross
/include/sys_clock.h @andrewboie @andyross
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/sys/sys_io.h @andrewboie @andyross
CODEOWNERS: update owners and added xcc/s1000 related lines Updated for board and toolchain and a few minor fixes. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-24 19:04:38 +01:00
/include/toolchain.h @andrewboie @andyross @nashif
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/toolchain/ @andrewboie @andyross
/include/zephyr.h @andrewboie @andyross
/kernel/ @andrewboie @andyross
ext: lib: Move fnmatch to lib/ Since we already have similarly licensed 3-clause BSD files in the tree, and in particular in our minimal libc, move the fnmatch functionality from ext/ to lib/. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2020-03-20 19:21:15 +01:00
/lib/fnmatch/ @carlescufi
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/lib/gui/ @vanwinkeljan
lib: open-amp: add helper to add resource table in project The resource table is needed by the Linux kernel OS for a rpmsg generic support, but is also recognised by OpenAMP. This table allows to add trace based on the RAM console and to support rpmsg protocol. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-09-20 11:41:38 +02:00
/lib/open-amp/ @arnopo
CODEOWNERS: add lib/os Part of the core kernel, Andy and I will watch over it. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-03-28 00:37:57 +01:00
/lib/os/ @andrewboie @andyross
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/lib/posix/ @pfalcon
CODEOWNERS: address some unowned files/dirs Add owners for some architecture, soc and subsystem code. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-07 14:31:51 +02:00
/lib/cmsis_rtos_v2/ @nashif
/lib/cmsis_rtos_v1/ @nashif
/lib/libc/ @nashif @andrewboie
modules: move module kconfig to main tree Due to in-tree dependencies on Kconfig options defined in modules we end up having warnings and errors when those modules are not part of the manifest. Users should be able to remove unwanted modules from their downstream manifest and still build any board configurations. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-23 23:19:41 +02:00
/modules/ @nashif
CODEOWNERS: update owners and added xcc/s1000 related lines Updated for board and toolchain and a few minor fixes. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-24 19:04:38 +01:00
/kernel/device.c @andrewboie @andyross @nashif
/kernel/idle.c @andrewboie @andyross @nashif
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 20:42:35 +02:00
/samples/ @nashif
samples: basic: Add a minimal sample Add a minimal sample that showcases minimal ROM sizes. It can be built in several configurations, all very restrictive when it comes to features enabled in order to verify the fact that we can fit in small devices and to be able to accurately measure the sizes of the kernel's basic features. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-05-09 19:48:17 +02:00
/samples/basic/minimal/ @carlescufi
samples: basic: servo_motor: Move dts overlays under boards Move the dts overlay under a boards/ dir to make it match conf files. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-31 19:02:50 +02:00
/samples/basic/servo_motor/boards/*microbit* @jhe
CODEOWNERS: Remove sjanc from samples/bluetooth/ Szymon was removed from all Bluetooth paths a while ago, and this is simply an overlooked leftover. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-11-27 16:50:21 +01:00
/samples/bluetooth/ @jhedberg @Vudentz @joerchan
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/samples/boards/intel_s1000_crb/ @sathishkuttan @dcpleung @nashif
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/samples/display/ @vanwinkeljan
samples: drivers: can: Rename directory for consistency This commit renames the CAN sample directory name from `CAN` to `can` to be consistent with others. Noting that the CAN driver test directory is named `tests/drivers/can`, we have no excuse for naming the CAN driver sample directory `samples/drivers/CAN`. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-29 05:17:00 +02:00
/samples/drivers/can/ @alexanderwachter
samples: display: Added generic display shield sample Added a generic display shield sample. Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-11-11 14:58:18 +01:00
/samples/drivers/display/ @vanwinkeljan
samples: drivers: ht16k33: add sample application for the HT16K33 Add a sample application for showcasing the functionality of the Holtek HT16K33 LED driver with keyscan functionality. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-03-24 20:24:31 +01:00
/samples/drivers/ht16k33/ @henrikbrixandersen
CODEOWNERS: Add entry for LoRa support Add CODEOWNERS entry for LoRa API, drivers and samples. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-07-22 17:12:47 +02:00
/samples/drivers/lora/ @Mani-Sadhasivam
drivers: counter: add Maxim DS3231 support The DS3231 is an I2C real-time clock with internal temperature compensated oscillator, maintaining civil time to 1 s precision with nominal 2 ppm accuracy from 0-40 Cel. The basic functionality is exposed as a counter that is always running at 1 Hz. Much more functionality is exposed as driver-specific API, including the ability to translate between the time scale of the DS3231 and the time scale of the Zephyr uptime clock. This allows correlation of events in the system clock to UTC, TAI, or whatever time scale is used to maintain the DS3231. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-06-24 03:03:52 +02:00
/samples/drivers/counter/maxim_ds3231/ @pabigot
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/samples/net/ @jukkar @tbursztyka @pfalcon
/samples/net/dns_resolve/ @jukkar @tbursztyka @pfalcon
CODEOWNERS: Replace lwm2m and lwm2m_client owner Replace @mike-scott with @rlubos as a code owner for lwm2m library and sample. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-04-28 11:47:08 +02:00
/samples/net/lwm2m_client/ @rlubos
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/samples/net/mqtt_publisher/ @jukkar @tbursztyka
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 20:42:35 +02:00
/samples/net/sockets/coap_*/ @rveerama1
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/samples/net/sockets/ @jukkar @tbursztyka @pfalcon
CODEOWNERS: Fix sensor samples There were two conflicting entries for sensor samples, which resulted in the wrong person getting assigned as a reviewer. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-11-15 17:28:43 +01:00
/samples/sensor/ @MaureenHelm
sample/shield: add support to x-nucleo-iks01a3 shield Provide two basic example samples to test the x-nucleo-iks01a3 shield: - Standard (Mode 1) - SensorHub (Mode 2) Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-01-28 17:29:39 +01:00
/samples/shields/ @avisconti
CODEOWNERS: update due to nickname change Modified nickname from jarz-nordic to jakub-uC Signed-off-by: Jakub Rzeszutko <jakubr@uber.com>
2019-06-06 08:42:20 +02:00
/samples/subsys/logging/ @nordic-krch @jakub-uC
/samples/subsys/shell/ @jakub-uC @nordic-krch
codeowners: extend smp_svr sample owner list Added myself as the owner. Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2020-04-17 13:00:32 +02:00
/samples/subsys/mgmt/mcumgr/smp_svr/ @aunsbjerg @nvlsianpu
samples: updatehub: Move from net to subsys:mgmt folder Zephyr introduced subsys/mgmt folder for MCU management. Move UpdateHub sample to its correspondent folder at sample/subsys/mgmt folder. Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
2020-08-02 22:41:36 +02:00
/samples/subsys/mgmt/updatehub/ @nandojve @otavio
CODEOWNERS: Add code owner for drivers/osdp Add myself (@cbsiddharth) as code owner for subsys/mgmt/osdp/, samples/sybsys/mgmt/osdp/ and includes/mgmt/osdp.h. Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2020-06-29 07:45:45 +02:00
/samples/subsys/mgmt/osdp/ @cbsiddharth
CODEOWNERS: fix syntax for directories Add trailing "/" to signify directories. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-19 01:32:55 +01:00
/samples/subsys/usb/ @jfischer-phytec-iot @finikorg
CODEOWNERS: update power management for Nordic staffing changes pizi-nordic is no longer active in Zephyr development; replace with pabigot. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-11-18 22:37:13 +01:00
/samples/subsys/power/ @wentongwu @pabigot
codeowners: add myself as owning user mode samples I maintain Zephyr's user mode feature. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-01-28 21:51:21 +01:00
/samples/userspace/ @andrewboie
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/scripts/coccicheck @himanshujha199640 @JuliaLawall
/scripts/coccinelle/ @himanshujha199640 @JuliaLawall
guiconfig: Add a graphical configuration interface This is a graphical configuration interface written in Tkinter. Like menuconfig.py, it supports showing all symbols (with invisible symbols in red) and jumping directly to symbols. Symbol values can also be changed directly from the jump-to dialog. This interface should feel a lot smoother than menuconfig.py on Windows. When single-menu mode is enabled, a single menu is shown at a time, like in the terminal menuconfig. Only this mode distinguishes between symbols defined with 'config' and symbols defined with 'menuconfig'. Compatible with both Python 2 and Python 3. Has been tested on X11, Windows, and macOS. To avoid having to carry around a bunch of GIFs, the image data is embedded in guiconfig.py. To use separate GIF files instead, change _USE_EMBEDDED_IMAGES to False. The image files can be found in https://github.com/ulfalizer/Kconfiglib/tree/screenshots/guiconfig. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-05-06 14:23:47 +02:00
/scripts/kconfig/ @ulfalizer
CODEOWNERS: minor adjustment I haven't worked on sanitycheck for quite some time. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-04-24 19:21:54 +02:00
/scripts/sanity_chk/expr_parser.py @nashif
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/scripts/gen_app_partitions.py @andrewboie
CODEOWNERS: auto-assign reviews in MAINTAINERS.yml, get_maintainer.py Add an entry in CODEOWNERS for auto-assigning reviewers in MAINTAINERS.yml and get_maintainer.py files. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-17 10:55:21 +02:00
/scripts/get_maintainer.py @nashif
dts: Add new DTS/binding parser Add a new DTS/binding parser to scripts/dts/ for generating generated_dts_board.conf and generated_dts_board_unfixed.h. The old code is kept to generate some deprecated defines, using the --deprecated-only flag. It will be removed later. The new parser is implemented in three files in scripts/dts/: dtlib.py: A low-level .dts parsing library. This is similar to devicetree.py in the old code, but is a general robust DTS parser that doesn't rely on preprocessing. edtlib.py (e for extended): A library built on top of dtlib.py that brings together data from DTS files and bindings and creates Device instances with all the data for a device. gen_defines.py: A script that uses edtlib.py to generate generated_dts_board.conf and generated_dts_board_unfixed.h. Corresponds to extract_dts_includes.py and the files in extract/ in the old code. testdtlib.py: Test suite for dtlib.py. Can be run directly as a script. testedtlib.py (uses test.dts and test-bindings/): Test suite for edtlib.py. Can be run directly as a script. The test suites will be run automatically in CI. The new code turns some things that were warnings (or not checked) in the old code into errors, like missing properties that are specified with 'category: required' in the binding for the node. The code includes lots of documentation and tries to give helpful error messages instead of Python errors. Co-authored-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-12-17 20:09:47 +01:00
/scripts/dts/ @ulfalizer @galak
scripts: add script for listing closed bugs Script to be used when creating a release. For regular releases this can be called this way: $ list_issues.py -f issues.md -s 2019-09-01 Will list all closed issues since september 1st, 2019 and will create a markdown file with all issues that can be added as is to the release notes. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-10-04 16:41:07 +02:00
/scripts/release/ @nashif
CODEOWNER: add owner for scripts/ci Add files under scripts/ci to CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-03-31 21:37:58 +02:00
/scripts/ci/ @nashif
CODEOWNERS: fix 3 check-compliance.py issues not reported by github - PR #13722 moved 3 gen_*.py to /arch/x86/ without updating CODEOWNERS - PR #13745 forgot a trailing slash in /dts/bindings/can - PR #13675 forgot a trailing slash in /samples/boards/intel_s1000_crb No idea why github doesn't keep reporting these every time and impossible to tell as CI hides most of its logs. Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2019-03-01 05:56:55 +01:00
/arch/x86/gen_gdt.py @andrewboie
/arch/x86/gen_idt.py @andrewboie
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/scripts/gen_kobject_list.py @andrewboie
/scripts/gen_syscalls.py @andrewboie
scripts: net: Add script for running sample tests Add a script that sets up Docker networking and starts the net-tools Docker container. If successful, run Zephyr with native_posix and execute the appropriate net-tools container executable. The proper net-tools executable and arguments is selected depending on the basename of the sample directory. This script needs to be updated if the net-tools Docker image is updated in some incompatible way. The net-tools directory is assumed to exist at the same level as the Zephyr base directory, but its location can be set using the '-N' command line argument. Likewise, '-Z' sets the Zephyr top level directory. When stopping Zephyr, go through all child processes since running a native posix or other variant of Zephyr may cause a hierarchy of processes to be created. Fixes: #19540 Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-10-18 09:29:05 +02:00
/scripts/net/ @jukkar @pfl
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/scripts/process_gperf.py @andrewboie
CODEOWNERS: Add code ownership for gen_relocate_app.py Add myself as code owner for script gen_relocate_app.py. Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2019-05-22 11:49:08 +02:00
/scripts/gen_relocate_app.py @wentongwu
scripts/requirements: Split & document requirement.txt Split up requirements.txt into several files so that CI tools can utilize/reference the specific requirements-<FOO>.txt they may need while keep things in sync with the development. This is to reduce both time and amount of work CI actions due to python package install. Create the following groupings: 1. BASE - needed to build or create zephyr images 2. BUILD-TEST - need to run compile/build tests 3. DOC - need to build the docs 4. RUN-TEST - need for runtime testing 5. EXTRAS - optional or useful for development/developers workflow Also tried to add a comment about what or why a given package is being pulled in for. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-07 21:58:00 +01:00
/scripts/requirements*.txt @mbolivar @galak @nashif
scripts: tests: sanitycheck: Add basic foundation for sanitycheck testsuite This commit adds basic testcases for sanitycheck tool using pytest. Coverage for the sanitycheck tool is obtained using coverage tool. Instructions are included in the README.md in scripts/tests/sanitycheck directory. Signed-off-by: Aastha Grover <aastha.grover@intel.com>
2020-03-19 23:27:27 +01:00
/scripts/tests/sanitycheck/ @aasthagr
scripts: tests: Add tests for subfolder_list.py This commit implements tests of subfolder_list.py Signed-off-by: Ruslan Mstoi <ruslan.mstoi@intel.com>
2020-07-01 16:38:46 +02:00
/scripts/tests/build/test_subfolder_list.py @rmstoi
scripts: add script to capture tracing data with UART backend Add script to capture tracing stream data with UART backend. This script is developed based on pyserial, so install it correctly before using the script. Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2020-02-03 21:04:32 +01:00
/scripts/tracing/ @wentongwu
CODEOWNERS: minor adjustment I haven't worked on sanitycheck for quite some time. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-04-24 19:21:54 +02:00
/scripts/sanity_chk/ @nashif
/scripts/sanitycheck @nashif
scripts: Add hook calllable series-push-hook script Running checkpatch in pre-commit hook could be a constraint for day to day work. Though, running it before pushing to zephyr repo is highly recommended. Add a series push script callable from pre-push hook. Document how to use it in contribute section. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-08 11:39:59 +01:00
/scripts/series-push-hook.sh @erwango
CODEOWNERS: handle an account change s/mbolivar/mbolivar-nordic/ Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-17 16:40:58 +01:00
/scripts/west_commands/ @mbolivar-nordic
/scripts/west-commands.yml @mbolivar-nordic
cmake: Extracted Zephyr module processing into python script Fixes: #14513 This commit move the functionality of extracting zephyr modules into generated CMake and Kconfig include files from CMake into python. This allows other tools, especially CI to re-use the zephyr module functionality. Signed-off-by: Torsten Rasmussen <torsten.rasmussen@nordicsemi.no>
2019-03-19 10:38:18 +01:00
/scripts/zephyr_module.py @tejlmand
posix arch: build on aarch64 / allow host-specific cmake includes This change enables specific compiler and linker options to be used in the case that an arch/posix/os.arch.cmake file exists. Note: os and arch in the above case are evaluations of CMAKE_HOST_SYSTEM_NAME and CMAKE_HOST_SYSTEM_PROCESSOR. Otherwise, the existing "generic" compiler and linker flags in arch/posix/CMakeLists.txt are used. Additional flags and checks are provided in arch/posix/Linux.aarch64.cmake. Added scripts/user_wordsize.py to detect if userspace is 64-bit or 32-bit, which should be consistent with the value of CONFIG_64BIT for Aarch64 on Linux. Fixes #24842 Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-05-08 20:52:24 +02:00
/scripts/user_wordsize.py @cfriedt
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/scripts/valgrind.supp @aescolar @daor-oti
cmake: adding ZephyrConfig.cmake to allow an easy way to locate Zephyr Adding ZephyrConfig.cmake and ZephyrConfigVersion.cmake allows projects to use find_package to locate Zephyr. This means that it will be possible to allow users to run CMake without the need to source zephyr-env.sh or run zephyr-env.cmd. This is especially useful for IDEs such as Eclipse or SES, where it will no longer be required to source the above files before launching the IDE. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-02-12 14:55:36 +01:00
/share/zephyr-package/ @tejlmand
cmake: Relocating Zephyr Unittest CMake package. Fixes: #23872 Relocating Zephyr Unittest CMake package to ensure that HINTS ${ZEPHYR_BASE} in find_package(ZephyrUnittest HINTS ${ZEPHYR_BASE}) works correctly when the package has not been exported to CMake user package registry. This ensure that the new package functionality is fully backwards compatible on systems where the package is not exported and ZEPHYR_BASE is set. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-03-27 21:31:36 +01:00
/share/zephyrunittest-package/ @tejlmand
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/subsys/bluetooth/ @joerchan @jhedberg @Vudentz
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/subsys/bluetooth/controller/ @carlescufi @cvinayak @thoh-ot
CODEOWNERS: Add dedicated entry for Bluetooth Mesh Add a dedicated entry for Bluetooth Mesh, and include Trond from Nordic as an owner, since he will be actively participating in maintaining & developing the code. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-08-15 08:11:26 +02:00
/subsys/bluetooth/mesh/ @jhedberg @trond-snekvik @joerchan @Vudentz
canbus: canopen: add zephyr driver layer for CANopenNode Add a Zephyr driver and abstraction layer for use by the 3rd party CANopenNode module. CANopenNode depends on the CO_driver.h file for platform-specific type definitions, locking primitives, and CAN bus driver API. This fixes #15278. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-09-22 20:24:57 +02:00
/subsys/canbus/ @alexanderwachter
CODEOWNERS: add owners for the C++ subsystem Add recent collaborators as codeowners. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-10-11 13:07:04 +02:00
/subsys/cpp/ @pabigot @vanwinkeljan
CODEOWNERS: address some unowned files/dirs Add owners for some architecture, soc and subsystem code. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-07 14:31:51 +02:00
/subsys/debug/ @nashif
codeowners: add subsys/dfu codeowner Added dfu support subsystem codeowner Before this subystem was orphaned. Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2020-03-04 15:39:58 +01:00
/subsys/dfu/ @nvlsianpu
CODEOWNERS: adapt for debug and tracing add subsys/tracing and include/tracing and drivers/debug Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-07 03:00:50 +01:00
/subsys/tracing/ @nashif @wentongwu
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/subsys/debug/asan_hacks.c @vanwinkeljan @aescolar @daor-oti
sdhc: rename disk_access_sdhc.c The name disk_access_sdhc.c is ambiguous, actually this driver depends on SPI, rename this file. In addition, move the generic sdhc stuff from C file to head file for other sdhc drivers to use. 1) disk_access_sdhc.c->disk_access_spi_sdhc.c. 2) create .h and move sdhc specifications from .c to .h. Signed-off-by: Jun Yang <jun.yang@nxp.com>
2019-07-04 06:01:36 +02:00
/subsys/disk/disk_access_spi_sdhc.c @JunYangNXP
/subsys/disk/disk_access_sdhc.h @JunYangNXP
usdhc: support NXP i.MXRT usdhc support NXP i.MXRT usdhc for file system to access. Signed-off-by: Jun Yang <jun.yang@nxp.com>
2019-07-04 06:31:02 +02:00
/subsys/disk/disk_access_usdhc.c @JunYangNXP
disk: add stm32 sdmmc disk access driver Add a disk access driver for the stm32 sdmmc component. The driver is based around the stm32 cube HAL and uses the blocking API. Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
2020-03-18 11:28:31 +01:00
/subsys/disk/disk_access_stm32_sdmmc.c @anthonybrandon
CODEOWNERS: add owner for subsys/fb No owner had been assigned. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-07-18 13:02:29 +02:00
/subsys/fb/ @jfischer-phytec-iot
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/subsys/fs/ @nashif
CODEOWNERS: Add missing trailing / on some directories Gets rid of some warnings from check_compliance.py: Wrong syntax: /home/ulf/z/subsys/fs/fcb Wrong syntax: /home/ulf/z/subsys/fs/nvs Wrong syntax: /home/ulf/z/subsys/storage Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-02-24 20:29:12 +01:00
/subsys/fs/fcb/ @nvlsianpu
native_posix: Added support to access flash via FUSE Added support to access flash device partitions from host through FUSE. Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-01-14 20:49:31 +01:00
/subsys/fs/fuse_fs_access.c @vanwinkeljan
subsys/fs: add support for littlefs littlefs is a fail-safe filesystem from ARM Mbed that has wear-leveling capabilities. Signed-off-by: Peter A. Bigot <pab@pabigot.com> Signed-off-by: Jim Paris <jim@bolt.io>
2019-07-21 18:28:29 +02:00
/subsys/fs/littlefs_fs.c @pabigot
CODEOWNERS: Add missing trailing / on some directories Gets rid of some warnings from check_compliance.py: Wrong syntax: /home/ulf/z/subsys/fs/fcb Wrong syntax: /home/ulf/z/subsys/fs/nvs Wrong syntax: /home/ulf/z/subsys/storage Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-02-24 20:29:12 +01:00
/subsys/fs/nvs/ @Laczen
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/subsys/logging/ @nordic-krch
CODEOWNERS: Add subsys/logging/log_backend_net.c Add myself to owner of subsys/logging/log_backend_net.c so that if there are changes to that file, I get notified. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-10-29 12:12:22 +01:00
/subsys/logging/log_backend_net.c @nordic-krch @jukkar
mgmt: Move mcumgr into its own folder In order to be able to add more entries under 'subsys/mgmt', move the current contents of it, which relate exclusively to MCUMgr, to its own folder. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2020-07-30 18:01:18 +02:00
/subsys/mgmt/mcumgr/ @carlescufi @nvlsianpu
/subsys/mgmt/mcumgr/smp_udp.c @aunsbjerg
updatehub: Move from lib to subsys:mgmt folder Zephyr introduced subsys/mgmt folder for MCU management. Move UpdateHub to this newly and dedicated space. Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
2020-07-31 00:58:32 +02:00
/subsys/mgmt/updatehub/ @nandojve @otavio
CODEOWNERS: Add code owner for drivers/osdp Add myself (@cbsiddharth) as code owner for subsys/mgmt/osdp/, samples/sybsys/mgmt/osdp/ and includes/mgmt/osdp.h. Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2020-06-29 07:45:45 +02:00
/subsys/mgmt/osdp/ @cbsiddharth
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/subsys/net/buf.c @jukkar @jhedberg @tbursztyka @pfalcon
/subsys/net/ip/ @jukkar @tbursztyka @pfalcon
/subsys/net/lib/ @jukkar @tbursztyka @pfalcon
/subsys/net/lib/dns/ @jukkar @tbursztyka @pfalcon
CODEOWNERS: Replace lwm2m and lwm2m_client owner Replace @mike-scott with @rlubos as a code owner for lwm2m library and sample. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-04-28 11:47:08 +02:00
/subsys/net/lib/lwm2m/ @rlubos
CODEOWNERS: Add @pfalcon for subsys/net/lib/config/ net/lib/config/ is important generic part of the network stack, and should be reviewed by the same people as net/lib/. (Besides, I originally factored out this lib in the first place.) Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-12-17 12:14:11 +01:00
/subsys/net/lib/config/ @jukkar @tbursztyka @pfalcon
CODEOWNERS: Update networking files Some networking related files were missing owner. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-04-24 16:53:49 +02:00
/subsys/net/lib/mqtt/ @jukkar @tbursztyka @rlubos
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/subsys/net/lib/coap/ @rveerama1
net: socket: syscall for socketpair(2) Working: * non-blocking reads / writes * blocking reads / writes * send(2) / recv(2) / sendto(2) / recvfrom(2) / sendmsg(2) * select(2) * poll(2) Fixes #24366 Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-05-09 05:04:23 +02:00
/subsys/net/lib/sockets/socketpair.c @cfriedt
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/subsys/net/lib/sockets/ @jukkar @tbursztyka @pfalcon
CODEOWNERS: Update networking files Some networking related files were missing owner. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-04-24 16:53:49 +02:00
/subsys/net/lib/tls_credentials/ @rlubos
/subsys/net/l2/ @jukkar @tbursztyka
net: l2: 6LoCAN implementation This commit is an implementation of 6LoCAN, a 6Lo adaption layer for Controller Area Networks. 6LoCAN is not yet standardised. Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-08-06 16:12:24 +02:00
/subsys/net/l2/canbus/ @alexanderwachter @jukkar
CODEOWNERS: Cover all OpenThread directories in net Current entry covered only /subsys/net/lib/openthread and not /subsys/net/l2/openthread. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-05-05 12:43:34 +02:00
/subsys/net/*/openthread/ @rlubos
CODEOWNERS: update power management for Nordic staffing changes pizi-nordic is no longer active in Zephyr development; replace with pabigot. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-11-18 22:37:13 +01:00
/subsys/power/ @wentongwu @pabigot
subsys/random: Add cryptographically secure and bulk fill functions 1) Add cryptographically secure random functions to provide FIPS 140-2 compliant random functions. 2) Add name to random function choice selectors to ease selection in SOC .defconfig files 3) Add bulk fill random functions. Signed-off-by: David Leach <david.leach@nxp.com>
2019-07-23 21:16:24 +02:00
/subsys/random/ @dleach02
CODEOWNERS: Add owners for storage-related subsystems Storage was not properly covered in terms of maintainership, add maintainers for the corresponding subystems. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-02-20 13:20:43 +01:00
/subsys/settings/ @nvlsianpu
CODEOWNERS: update due to nickname change Modified nickname from jarz-nordic to jakub-uC Signed-off-by: Jakub Rzeszutko <jakubr@uber.com>
2019-06-06 08:42:20 +02:00
/subsys/shell/ @jakub-uC @nordic-krch
CODEOWNERS: Add missing trailing / on some directories Gets rid of some warnings from check_compliance.py: Wrong syntax: /home/ulf/z/subsys/fs/fcb Wrong syntax: /home/ulf/z/subsys/fs/nvs Wrong syntax: /home/ulf/z/subsys/storage Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-02-24 20:29:12 +01:00
/subsys/storage/ @nvlsianpu
CODEOWNERS: address some unowned files/dirs Add owners for some architecture, soc and subsystem code. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-07 14:31:51 +02:00
/subsys/testsuite/ @nashif
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/subsys/usb/ @jfischer-phytec-iot @finikorg
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 20:42:35 +02:00
/tests/ @nashif
tests: add C++ 17 standard library test Confirms build (and run) of C++17 applications that make use of STL containers and other features. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-08-14 00:52:48 +02:00
/tests/application_development/libcxx/ @pabigot
CODEOWNERS: Auto-assign @stephanosio in tests/arch/arm suite reviews Add @stephanosio as a code-owner for the tests/arch/arm test suites, so they get auto-assigned in reviews. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-03-19 10:39:19 +01:00
/tests/arch/arm/ @ioannisg @stephanosio
CODEOWNERS: Add CMSIS-DSP test code owner This commit adds @stephanosio as a code owner for the CMSIS-DSP tests. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-24 07:39:02 +02:00
/tests/benchmarks/cmsis_dsp/ @stephanosio
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/tests/boards/native_posix/ @aescolar @daor-oti
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/tests/boards/intel_s1000_crb/ @dcpleung @sathishkuttan
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/tests/bluetooth/ @joerchan @jhedberg @Vudentz
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/tests/bluetooth/bsim_bt/ @joerchan @jhedberg @Vudentz @aescolar @wopu-ot
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/tests/posix/ @pfalcon
/tests/crypto/ @ceolin
/tests/crypto/mbedtls/ @nashif @ceolin
CODEOWNERS: CAN ownership Add @alexanderwachter as CAN maintainer Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-25 17:15:06 +01:00
/tests/drivers/can/ @alexanderwachter
CODEOWNERS: Adding codeowner for tests/drivers/counter Added @nordic-krch as the codeowner. Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2019-04-24 07:27:46 +02:00
/tests/drivers/counter/ @nordic-krch
tests: drivers: counter: add rtc_ds3231_api Cloned from counter_basic_api with modifications based on DS3231 limitations: * Only one device tested per board; * Counter cannot be stopped or started; * Alarms are serviced by worker thread, so are not invoked from ISR and require that test thread yield to allow processing (no k_busy_wait()); * Multiple Alarms test is disabled as documented in test. Additional tests were added for DS3231-specific API. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-04-22 16:42:11 +02:00
/tests/drivers/counter/maxim_ds3231_api/ @pabigot
tests: drivers: add flash_simulator driver This commit adds a tests for flash simulator driver implementation for qemu_x86 boards. Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no> Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
2019-04-18 14:55:38 +02:00
/tests/drivers/flash_simulator/ @nvlsianpu
test/drivers/gpio: add tests for new API Test that the new port API functions all behave as expected, including physical vs logical level for input and output as well as masked and set-based output operations. Also tests the new pin API functions. For running on real hardware this test now uses a local test-specific devicetree binding. For build-only tests any platform with a GPIO alias should be tested. The new code increases flash requirements so add a filter to exclude platforms that won't link. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-11-13 18:01:37 +01:00
/tests/drivers/gpio/ @mnkp @pabigot
CODEOWNERS: Add hwinfo ownership Add @alexanderwachter as hwinfo maintainer. Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-25 17:22:06 +01:00
/tests/drivers/hwinfo/ @alexanderwachter
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/tests/drivers/spi/ @tbursztyka
tests: uart: Add nrf9160_pca10090 to UART async test Add nrf9160_pca10090 to UART async test. Add myself as codeowner to uart_async_api tests. Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2019-02-20 09:59:48 +01:00
/tests/drivers/uart/uart_async_api/ @Mierunski
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/tests/kernel/ @andrewboie @andyross @nashif
codeowner: add codeowners for /test/lib Add codeowners for /test/lib Signed-off-by: Benoit Leforestier <benoit.leforestier@gmail.com>
2019-04-26 17:45:01 +02:00
/tests/lib/ @nashif
CODEOWNERS: Add CMSIS-DSP test code owner This commit adds @stephanosio as a code owner for the CMSIS-DSP tests. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-24 07:39:02 +02:00
/tests/lib/cmsis_dsp/ @stephanosio
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/tests/net/ @jukkar @tbursztyka @pfalcon
/tests/net/buf/ @jukkar @jhedberg @tbursztyka @pfalcon
/tests/net/lib/ @jukkar @tbursztyka @pfalcon
/tests/net/lib/http_header_fields/ @jukkar @tbursztyka
/tests/net/lib/mqtt_packet/ @jukkar @tbursztyka
/tests/net/lib/coap/ @rveerama1
tests: socket: socketpair: tests for socketpair(2) syscall Tests for issue #24366 Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-05-09 05:06:16 +02:00
/tests/net/socket/socketpair/ @cfriedt
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/tests/net/socket/ @jukkar @tbursztyka @pfalcon
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/tests/subsys/fs/ @nashif @wentongwu
CODEOWNERS: Add owners for tests of settings subsystems The settings tests was not properly covered in terms of maintainership, add maintainers for the corresponding subystems. Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-03-04 10:51:08 +01:00
/tests/subsys/settings/ @nvlsianpu
CODEOWNERS: update due to nickname change Modified nickname from jarz-nordic to jakub-uC Signed-off-by: Jakub Rzeszutko <jakubr@uber.com>
2019-06-06 08:42:20 +02:00
/tests/subsys/shell/ @jakub-uC @nordic-krch
doc: CODEOWNERS for .rst files Move *.rst to end of the list to ensure all .rst files get reviewed by our tech writer (last match takes precedence). Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-22 17:41:52 +02:00
# Get all docs reviewed
CODEOWNERS: add @nashif for docs Add @nashif as codeowner for docs temporarily until we have a dedicated owner. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-30 04:57:08 +01:00
*.rst @nashif
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
*posix*.rst @aescolar @daor-oti
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