Responding to feedback from the community, clarify that the cmd.exe
window needs to be closed and reopened.
Also be specific about the type of terminal window to be used.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Multiple users have failed to read the output from the Homebrew
installation script, which instructs the user how to add it to the
path. Include the instructions in the guide.
Also add a step to include the Homebrew Python executable to the path,
which allows then for invocation of python and pip as well as python3
and pip3.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Initialize the MDIO peripheral clock (normally done during GMAC
initialization) before trying any MDIO transfers, preventing startup
errors.
Signed-off-by: Nick Kraus <nick@nckraus.com>
Due to the west build path in official sample doc is now change
to root directory, we modify our west build command align the
official sample doc.
Signed-off-by: Kevin Wang <kevinwang821020@google.com>
On the STM32H735G-DK Discovery kit, when connecting a UART from
pin PF7 to PF6, the test uart_async_api passes now.
Signed-off-by: Benjamin Deuter <benjamin.deuter@gmail.com>
Make documentation more readable by separating API with help of @name
instead of simple comment in the code.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Support NXP MRT on LPC55XXX SOC series, enable on
lpcxpresso55s69_cpu0, add test overlay to counter basic api test
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add binding for nxp,mrt and nxp,mrt-channel. MRT is
NXP multirate timer, a simple timer with multiple
independent channels.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
In the PTS BASS/SR/CP/BV-19-C test case a client executes Set
Broadcast Code operation of Broadcast Audio Scan Control Point
characteristic with Broadcast_Code set to an invalid value.
After syncing to an ISO stream there is an expected failed attempt
to decrypt the stream data, but the host does not set BIG_Encryption
value to the expected value 0x03 (BT_BAP_BIG_ENC_STATE_BAD_CODE).
Add missing BIG_Encryption state into the failing check.
Signed-off-by: Magdalena Kasenberg <magdalena.kasenberg@codecoup.pl>
Try to use llext_peek() for section pointers. If it's supported and
succeeds we don't need to allocate buffers.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The only way so far to access extension images is via a memory
buffer. Since this, supposedly, will also be a rather common method,
it makes sense to add a method to access extension data quickly by
obtaining a pointer instead of copying data into local buffers. Add a
llext_peek() method for that.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
We need to do a build assert for the fifo enable status of 'I2C2'.
There is a problem with using instance to obtain property when
any one I2C port is not enabled.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
To better cover the struct fields of the DMA API in doxygen the fields
are now individually documented rather than documenting them ad-hoc in
the struct header doc comment.
A best attempt at marking fields that are HW specific has been done as
well. That means almost all of them.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The DMA API has several expectations for drivers and callers that were
underdocumented or undocumented. Better clarify the driver expectations
and caller expectations.
The DMA API from the caller side is not a portable API and really cannot
be as each DMA has unique properties and expectations of memory,
peripheral interaction, and features. The API in effect provides a union
of all useful DMA functionality drivers have needed in the tree. It can
still be a good abstraction, with care, for peripheral devices for
vendors where the DMA IP might be very similar but have slight
variances.
From the driver implementation side expectations around synchronization,
state transitions, and memory management for transfer descriptors is now
described in documentation rather than solely from me in github review
comments.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This patch fixes hangup of RISC-V multicore boot.
Currently boot sequence uses a riscv_cpu_wake_flag to notify wakeup
request for secondary core(s).
But initial value of riscv_cpu_wake_flag is undefined, so current
mechanism is going to hangup if riscv_cpu_wake_flag and mhartid of
secondary core have the same value.
This is an example situation of this problem:
- hart1: check riscv_cpu_wake_flag (value is 1) and end the loop
- hart1: set riscv_cpu_wake_flag to 0
- hart0: set riscv_cpu_wake_flag to 1
hart0 expects it will be changed to 0 by hart1 but it
has never happened
Note:
- hart0's mhartid is 0, hart1's mhartid is 1
- hart0 is main, hart1 is secondary in this example
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Read real frequncy from ARM Arch Timer instead of using define
'CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC' which can be incorrect for
some run cases. If we run xenvm under qemu we get one frequency, but
we can run this build as a DomU for Xen under different real platforms
and thus with differenty arch timer frequencies. So, we need to read
frequency from the timer registers.
Signed-off-by: Mykola Kvach <xakep.amatop@gmail.com>
There shouldn't be any reason to be able to modify the passed psk,
and having this non-const gives application warnings if passing a
constant string.
Signed-off-by: Maciej Zagrabski <mzi@trackunit.com>
The FMADD, FMSUB, FNMSUB and FNMADD instructions occupy major opcode
spaces of their own, separate from LOAD-FP/STORE-FP and OP-FP spaces.
Insert code to cover them.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Correct Properties subsection of the document to be accurate
to the latest implementation of the charger API.
Signed-off-by: Ricardo Rivera-Matos <ricardo.rivera-matos@cirrus.com>
Removes a statement at the introduction claiming only getting
properties is supported by the API. The charger API can get/set
properties.
Signed-off-by: Ricardo Rivera-Matos <ricardo.rivera-matos@cirrus.com>
Seems like the PDF build hit the "detected dubious ownership in
repository" issue that has already been worked around in other workflow.
Add that step here as well.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Skip the rebase step if it's not a pull request. Schedule and push runs
have no base ref to rebase against anyway, currently the step is failing
and being skipped.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
elf_rela_t contains elf_rel_t exactly and contains an additional
field at the end. Therefore pointers of that type can be used for
both types, making the code generic.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
When exporting a symbol, we need to use "&" explicitly, otherwise
it only works for functions and doesn't work for objects.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The module linking API can be used for shared objects with no
architecture-specific relocation code. Add a weak function for such
cases.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
ret in llext_load() is always assigned before use, remove its
redundant initialisation.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Note that for some peripheral instances is needed to redefine the
HAL macros of the peripheral base address, since the naming is not
uniform for all instances.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit introduces all changes necessary for utilizing
the serial interface on i.MX8QM/QXP.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Since the LPUART peripheral DTS binding requires the
"interrupts" property be specified even if it's not going
to be used for now we need to add a dummy interrupt controller
node to make that possible. Logically speaking, this dummy
interrupt controller should be used by peripherals which
can assert interrupts directly routed to the DSP.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit enables clock control on the i.MX8QM and QXP boards.
This is achieved through the following changes:
1) The "reg" property is no longer marked as required
for the "nxp,imx-ccm" binding. This is necessary because
in the case of i.MX8QM and i.MX8QXP the clock management
is done through the SCFW, hence there's no need to access
CCM's MMIO space (not that you could anyways).
2) The DTS now contains a scu_mu node. This node refers
to the MU instance used by the DSP to communicate with
the SCFW.
3) The CCM driver needs to support the LPUART clocks
(which will be the only IP that's supported for now)
and needs to perform an initialization so that the
NXP HAL driver knows which MU to use to communicate
with the SCFW.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
As the name suggests, this commit attempts to cleanup some
of the configurations for the i.MX8 series. This cleanup
consists of either relocating the configuration or removing
unnecessary configurations.
As a rule of thumb, SoC-specific configurations have been moved
to Kconfig.series. If the configuration is by default 'y' and
needs to be set to 'n' or it has a numeric value then it has
been moved to Kconfig.defconfig.series. Configurations that
are default 'n' and were also explicitly set to 'n' have been
removed. Also, enabling logging has been moved to the board
level to avoid having to force all boards based on the same
SoC to enable logging.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit attempts to clean the memory.h header by doing
the following changes:
1) Change the include guard to the standard
ZEPHYR_....
2) Remove unused macro definitions.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Since platform.h is a SOF-specific header that's no
longer used there's no point in keeping the include/soc directory.
As such, move memory.h to include/ and modify the linker script
to reflect this location change.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit attempts to split the generic i.MX8 SoC into its
QXP and QM variants. As things are now, the i.MX8 SoC doesn't
have any NXP HAL files to back it up. As a consequence, the
native Zephyr drivers cannot be used.
To solve this issue, the generic i.MX8 has been split into
i.MX8QXP and i.MX8QM, each of them having different NXP HAL
files.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
