The initial version of an input driver for Cirque Pinnacle ASIC supports:
* Setting sensitivity
* Choosing between relative and absolute modes
* Relative mode
* Primary tap
* Swapping X and Y
* Absolute mode
* Setting number of idle packets
* Clipping coordinates outside of active range
* Scaling coordinates
* Inverting X and Y coordinates
Signed-off-by: Ilia Kharin <akscram@gmail.com>
For now DSI settings are hard-coded for the specific
LCD module used on the STM32H747I Discovery board
Signed-off-by: Erik Andersson <erian747@gmail.com>
To support the NT35510 display, some additional
options needs to be configurable in the STM32
DSI peripheral
Signed-off-by: Erik Andersson <erian747@gmail.com>
Add support for performing pinctrl operations. For now,
the only supported operation is applying the pinctrl default
state. Pinctrl is left optional to allow for scenarios in which
this is not required (e.g: AMP system in which another
OS configures the pinctrl).
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add a property to select the push-pull GPIO output type to drive the
I2C recovery. The default is open-drain.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Enable clock control for i.MX8ULP. This consists of:
1) Adding a PCC node in the DTS
2) Adding a header file containing the definitions
of the clocks used by the peripherals to be enabled.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Enable sleep mode on LPC55S69 (corresponding to zephyr's runtime idle
mode). Add DT description and power api implementations.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Rename ad5592 files in dts, driver and include to ad559x and add support
for I2C bus which is required for AD5593.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Based on the iis2dlpc driver, with some significant differences in
interrupt handling.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add common gpio node to pinctrl node (interrupts are shared between ports)
and syscon for interrupt edge detection register in order to support
interrupts in rzt2m gpio
Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
Add irqs to rzt2m gpio bindings in order to add interrupt support to rzt2m
gpio driver and adds common gpio node to store interrupt config (irqs are
shared between ports)
Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
Remove the unused "tx-delay-comp-offset" property from the base CAN FD
controller devicetree binding.
Having a static Transmitter Delay Compensation (TDC) offset is useless.
The offset needs to match the data phase timing parameters in order to
properly configure the second sample point when transmitting CAN FD frames
with BRS enabled.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove ethernet-fixed-link binding as it is redundant with the
phy bindings. Clearly, ethernet does not work without the L1
layer, which is a phy device, or an integrated mac/phy device,
and all of these things should be described properly in DT.
The schema did not even come with a compatible, meaning nodelabels
were hardcoded into the drivers, which is unacceptable.
- Remove the binding file for ethernet-fixed-link.yaml.
- Remove fixed link functionality from the nxp s32 gmac driver.
Since this functionality is already covered by the phy support,
it is redundant.
- Remove fixed link include from the s32 gmac binding.
- Remove fixed link include from the nuvoton numaker binding.
As far as I can tell the corresonding driver does not even
use it anyways, and I did not find any board with this device
that describes a "fixed link".
- Move the definition into the nxp,kinetis-ethernet binding
as the eth_mcux driver, which is already being deprecated,
does use this, contain the debt to the legacy driver.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Added configuration of long press reset functionality.
Includes ship/hibernate to wake debounce time and
disabled/one_button/two_button mode selection.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
The DHT20 sensor is a temperature and humidity sensor that uses I2C to
communicate with a microcontroller. The DHT20 sensor is Aosong.
use standard crc
update description to add reference to AHT20 and AM2301B
clean code, use defines and bit manipulation
add dht20 to i2c test suite for build tests
update bit manipulation
use more defines instead of raw numbers
add bindings to allow aht20 or am2301b to be used in devicetree
in all 3 cases, the same dht20.c driver is compiled
Signed-off-by: Nathan Olff <nathan@kickmaker.net>
1. Update EDMA driver for version 4
2. The DMAMux module is not always present. Use the
feature define to make this optional.
3. Use the EDMA_SetChannelMux API for SoC's that supports
this feature.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Add enum for `constant-charge-voltage-max-microvolt` property to
signalize improper values given with device tree at compile time.
Signed-off-by: Lukasz Madej <l.madej@grinn-global.com>
Maximum charging current is selected with an external resistor in
the MAX20335 charger. Therefore it is not possible to configure it
with software directly. There is only a capability to limit current
set with hardware but configuration of the limiter is not
straight-forward.
To reflect real functionality, drop usage of
`constant-charge-current-max-microamp` property as an required one and
use custom `chgin-to-sys-current-limit-microamp` instead.
Use enum in binding file to signalize improper values at compile time.
Drop support for `CHARGER_PROP_CONSTANT_CHARGE_CURRENT_UA` API property
since this cannot be handled.
The `max20335_get_constant_charge_current()` function become useless so
remove it.
Signed-off-by: Lukasz Madej <l.madej@grinn-global.com>
Rework the data scaling algorithm for the "deadzone" mode so that the
deadzone is subtracted from the input rather than from the output. This
makes the whole output range usable rather than making the output jump
from the center value to the minimum deadzone range.
This changes the calibration data structure as well so now all values
refer to the input data, which is more coherent.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Byte value written to the device's
ERXFCON: ETHERNET RECEIVE FILTER CONTROL REGISTER
Sets the devices receive packet filter, optional. If not set
in device tree previous hard coded value`0xA3` is used.
Uni, multi and broadcast packets with valid CRC are accepted.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
This will update host dma copy aligmnet as with current
high value in some cases it was not possible to fully
empty the buffer
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
MODEM_UBX: Adds Support for UBX Messages in Modem Subsystem.
GNSS API Supported: get_supported_systems, set_fix_rate, get_fix_rate,
set_enabled_systems, get_enabled_systems, set_navigation_mode,
get_navigation_mode.
Boards Tested: MIMXRT1062_FMURT6, VMU_RT1170.
Note: Partial support for U-BLOX Messages is provided as of now.
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
Signed-off-by: Mayank Mahajan <mayankmahajan.x@nxp.com>
The STTS22H is an ultralow-power, high-accuracy, digital temperature
sensor offering high performance over the entire operating temperature
range. This driver is based on stmemsc HAL i/f v2.3
https://www.st.com/resource/en/datasheet/stts22h.pdf
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add ability to set a wakeup counter in case OS Timer is
disabled in certain low power modes. Also add code to
compensate the tick value.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Enables usage Bluetooth LE GATT as a serial endpoint to exchange data
using UART APIs. This implementation is compatible with UART Interrupt
Driven APIs and uses the nus-uart device-tree node properties to
configure FIFO buffers for transmitting and receiving. Defining
multiple instances of the driver is possible and it allows implementing
multiple GATT NUS service instances to exchange data as separate serial
endpoints.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
"RW pinctrl" is clearly SOC specific naming for an IP
that is not necessarily constrained to live on one SOC series.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
There were missing global dppic and ipct channels configuration
that allows to deliver events from global peripherlas like GRTC
to Radio domain.
Add missing configuration to nrf54h20 dtsi file.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
The GRTC channels and irqs configuration for Radio domain
is SOC specific not board specific. Move the configuration
to SOC dtsi file.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
The child-owned-channels property of GRTC is used by nrfx_grtc
driver to exclude channels for common pool of channels allowed
for dynamic allocation. That is sort-of workaround for missing
property that allowes to remove some channels from the pool.
There are also not aligned GRTC IRQs for nRF54H20 and nRF54L15.
Only one of avaialbe IRQs was added to GRTC in DTS whereas
there should be two. That allows to find second IRQ by other
drivers that use GRTC peripehral.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
Split up the driver for the PWM controller MAX31790
into a multi function device driver.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Remove the Audio Link Hub (ALH) nodes from the ACE 2.0 LNL DTS file.
This patch cleans up the Device Tree Source by removing the individual
ALH stream/FIFO nodes. The ALH hardware is not present in the ACE 2.0
architecture, and these nodes are therefore not applicable.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch reorders the power domain definitions for the Intel ADSP ACE
2.0 LNL (Lunarlake) platform in the Device Tree Source (DTS).
Changes include:
- Removing the definitions for io2_domain, io3_domain, and ml1_domain,
which are no longer present in the ACE 2.0 LNL configuration.
- Renaming and reassigning bit positions to existing power domains to
reflect the updated power management architecture.
The reordering ensures that the DTS reflects the current power domain
architecture of the ACE 2.0 LNL platform, facilitating accurate power
management within the SoC.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Changing the power domain from 'hst_domain' to 'io0_domain' for the HDA
DMA link in/out nodes. This aligns the power domain assignments with the
actual hardware configuration and ensures that the power management
subsystem can accurately manage the power states of these interfaces.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch reorders the power domain node definitions in the ACE 1.5
Meteorlake DTS file to improve readability and facilitate comparison with
the documentation.
Changes include:
- Reordering power domain nodes by their bit positions.
- No changes to the bit positions themselves; they remain as originally
defined.
This reordering does not affect the functionality but makes the DTS file
more maintainable and easier to cross-reference with the hardware
specification.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Some SAI instances are mutliline, meaning they can have multiple
TX/RX data lines (channels). Depending on the board, the index
of the TX/RX data lines that are connected to the consumer
(e.g: the codec) may not always be 0. This commit fixes this
issue by adding support for passing the index of the used
TX/RX data lines through the DTS.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add definition of the nRF54H20 SoC with its Application, Radio,
and Peripheral Processor (PPR) cores and an initial set of
peripherals.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove all optional, initial CAN sample point properties and rely on the
CAN timing calculations to automatically pick the preferred sample point
location based on the initial bitrate.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Make the properties for setting the initial sample points for both the
classic/arbitration phase and the data phase optional.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Implement a sensor for the output diagnostics of the low side
switch BD8LB600FS.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Split up the driver for the low side switch BD8LB600FS into a GPIO
and MFD part.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This binding is for the NXP FlexComm Interface. The
driver will setup an interface for use as a UART, SPI
or I2C device.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
These list of files add basic support for StarFive
JH7110 SOC Device Tree includes for VisionFive2
board.
Signed-off-by: Pratik Farkase <pratik.farkase@wsisweden.com>
Split the common keyboard scanning code out of the XEC specific driver
and use the generic code instead.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert the XEC keyboard scanning driver from kscan to input, add the
corresponding kscan compatibility node to the current board, build test
only.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This is a follow-up to commit 4db40601dd.
There are two ECB instances in nRF54H20 and the above commit added
only one of them.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
And add the corresponding bindings.
Move alse the already existing bindings for nrf-dppic, nrf-ppi,
and nrf-ipc so they are located together with the new ones and
in more appropriate folders (DPPIC and PPI peripherals are not
related to ARM, and IPC is for sending and receiving events,
not messages, so ipm/ does not seem to be the best fit for it).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enabling peripherals at SoC dts files should not be done, unless there
are good reasons (e.g. always needed peripherals). NFCT node should
either be enabled at board level, or, at application level.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Some CAN transceivers have a lower limit on their supported bitrate. Add an
optional "min-bitrate" for specifying this limit via devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The pit had a few warnings about
the format of the register address
being uppser case and one of the
reg index values were incorrect.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Add new devicetree bindings for F4 and L1 series for configuration of
block size used in flash write operations.
Allow byte-size write operations in `flash_stm32f1x.c`. This file is
being shared between F0, F1, F3, L0 and L1 series. L0 and L1 series
allows for single byte writes.
Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
This commit enables the IRQSTEER interrupt controller
on NXP's XTENSA-based i.MX8QM and i.MX8QXP.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Define the MPU attribute to be ATTR_MPU_EXTMEM for the
external region (qspi- or octo-spi NOR flash)
starting at 0x90000000 of the stm32h7 serie.
A XiP region should be Included inside with attribute
ATTR_MPU_IO, to access the external memory in XIP.
The stm32h7a/h7b serie as another external area at 0x70000000.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add Nuvoton numaker series flash memory controller(RMC) with erase,
read & write features of soc-flash.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Add Open Alliance spi protocol support.
Open Alliance is a chunk-based SPI protocol, based on sending
over SPI an ethernet frame divided in smaller chunks, using a
specific 32-bit header for each chunk transferred. All chunks
can be sent or received by a single dma transfer.
Default mode is set to Open Alliance SPI without protection,
since the adin2111 dev. board comes shipped this way.
Tested:
- Open Alliance SPI, no protection (default board shipped)
- Open Alliance SPI, protection
- Generic SPI, no crc
- Generic SPI, with crc8
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Define a single node that reflects the LCDC IP. Instead of defining
the same IP block twice with different compatibles (mipi dbi, display)
we define a single node for the default display interface and
other interfaces like the MIPI DBI should override the compatible entry
with the appropriate one within its DTS overlay file.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
Exhibit Renesas LCD controller's driver implementation. The driver
is intended to employ the controller in the continuous mode so
it can drive display panels in the parallel RGB mode.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
The MRAM has no concept of erase blocks or pages, so this is treated as
driver configuration.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Enabled the PIT and Multi channel support
for some of the rtXXXX devices.
- rt1010
- rt1060
- rt1160
- rt1170
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Updating the nxp,pit driver to support mutliple
channels. Updating the dts and board overlays
to account for the changes.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Add a new binding that should help with samples or MBOX tests by getting
information from DT.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
For sharing pin definition property with `worldsemi,ws2812-gpio`,
rename `output-pin` to `gpios`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
ws2812-gpio's `in-gpios` property is not used as an input pin.
Renaming it to `gpios` to reflect the actual situation.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
