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Introduce a CODEOWNERS file for auto-assign of review by GitHub Right now keep it simple for testing, we can decide how we want to go forward with this vs MAINTAINERs file, etc. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-07-07 15:56:05 +02:00
# CODEOWNERS for autoreview assigning in github
CODEOWNERS: Clarify behaviour Clarify the last matching rule, as it is not too intuitive (developers may have expected that all matching regexes would be added as code owners) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-06-15 11:17:01 +02:00
# https://help.github.com/en/articles/about-code-owners#codeowners-syntax
# Order is important; for each modified file, the last matching
# pattern takes the most precedence.
# That is, with the last pattern being
CODEOWNERS: add @nashif for docs Add @nashif as codeowner for docs temporarily until we have a dedicated owner. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-30 04:57:08 +01:00
# *.rst @nashif
# if only .rst files are being modified, only nashif is
CODEOWNERS: Clarify behaviour Clarify the last matching rule, as it is not too intuitive (developers may have expected that all matching regexes would be added as code owners) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-06-15 11:17:01 +02:00
# automatically requested for review, but you can manually
# add others as needed.
CODEOWNERS: Add for drivers/wifi same reviewers as for drivers/ethernet drivers/wifi/ is closely related to the (IP) network stack, so shouldn't be left without owners, so use the same as for Ethernet. Also, extend, don't replace reviewers for drivers/wifi/eswifi based on the above change and CODEOWNERS processing order. Also, add a reminder about this processing order at the top of file. Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2018-11-23 11:12:14 +01:00
CODEOWNERS: more tweaks Do not apply source code wide wildcard to idenitify the missing portions of the code that need entries. the * entry will be added at a later stage when we have more coverage. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-07-22 11:55:20 +02:00
# Do not use wildcard on all source yet
# * @galak @nashif
maintainers: update CODEOWNERS from MAINTAINERS file Converted using the script below with a few manual edits: from __future__ import print_function, unicode_literals, with_statement from glob import glob import email.utils seen = set() emails = set() with open('MAINTAINERS', 'rb') as f: new = False for line in f: line = line.decode('utf-8') if line.startswith('M:'): if new: emails = set() new = False print("") pattern = line.partition(':')[2].strip() emails.add(email.utils.parseaddr(pattern)[1]) elif line.startswith('F:'): new = True pattern = line.partition(':')[2].strip() if pattern.endswith("/"): pattern = pattern + "*" print("%s %s" %(pattern, " ".join(emails))) seen.add(pattern) Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-07-20 12:08:45 +02:00
CODEOWNERS: add owner for .github/ Owner for various github related files. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-08 14:42:59 +01:00
/.github/ @nashif
ci: github: west: Add a GH workflow to run the west command tests Replace running west command tests in run_ci.sh with a github workflow. This provides some benefits in that we can run the west command tests on multiple python versions and host OSes (linux, mac and windows). Also have the benefit that the tests are only run on modifications to files in scripts/west_commands/ or scripts/west-commands.yml. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 23:04:36 +01:00
/.github/workflows/ @galak @nashif
ci: Add initial buildkite ci setup Add setup to utilize buildkite for CI purposes: 1. .buildkite/hooks/pre-command: * Handles getting git checkout setup against upstream repo * Setup some west module cache (dirs, clean out files & locks) * init dir for ccache 2. .buildkite/hooks/post-command: * Report disk usage (meant for possible debugging) 3. .buildkite/pipeline.yml [uses to determine what to do]: * setup zephyr env vars * set which docker container to use (export some local disk caches for git, west modules, and ccache) * uses plug to general build annotation on failure (junit-annotate) 4. .buildkite/run.sh [ buildkite wrapper to invoke scripts/ci/run.sh ] Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-03 14:02:35 +02:00
/.buildkite/ @galak
CODEOWNERS: auto-assign reviews in MAINTAINERS.yml, get_maintainer.py Add an entry in CODEOWNERS for auto-assigning reviewers in MAINTAINERS.yml and get_maintainer.py files. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-17 10:55:21 +02:00
/MAINTAINERS.yml @ioannisg @MaureenHelm
CODEOWNERS: Add evgeniy-paltsev as an ARC part owner Add @evgeniy-paltsev as an ARC part owner in addition to @abrodkin and @ruuddw, so he will be chosen as a reviewer automatically. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-22 17:46:53 +01:00
/arch/arc/ @abrodkin @ruuddw @evgeniy-paltsev
CODEOWNERS: update architecture owners Update owners for both x86 and ARM. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-03 13:01:27 +02:00
/arch/arm/ @MaureenHelm @galak @ioannisg
arch: arm: Move ARM code to AArch32 sub-directory Before introducing the code for ARM64 (AArch64) we need to relocate the current ARM code to a new AArch32 sub-directory. For now we can assume that no code is shared between ARM and ARM64. There are no functional changes. The code is moved to the new location and the file paths are fixed to reflect this change. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-09 18:49:36 +01:00
/arch/arm/core/aarch32/cortex_m/cmse/ @ioannisg
/arch/arm/include/aarch32/cortex_m/cmse.h @ioannisg
arch: arm: aarch32: Rename `cortex_r` to `cortex_a_r` This commit renames the `cortex_r` directory under the AArch32 to `cortex_a_r`, in preparation for the AArch32 Cortex-A support. The rationale for this renaming is that the Cortex-A and Cortex-R share the same base design and the difference between them, other than the MPU vs. MMU, is minimal. Since most of the architecture port code and configurations will be shared between the Cortex-A and Cortex-R architectures, it is advantageous to have them together in the same directory. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-22 15:19:22 +01:00
/arch/arm/core/aarch32/cortex_a_r/ @MaureenHelm @galak @ioannisg @bbolen @stephanosio
arm/arm64: Fix misc and trivials for ARM/ARM64 split Fix the header guards, comments, github labeler, CODEOWNERS and MAINTAINERS files. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-26 15:22:59 +01:00
/arch/arm64/ @carlocaione
arch: arm64: Armv8-R AArch64 MPU implementation Armv8-R AArch64 MPU can support a maximum 16 memory regions, and the actual region number can be retrieved from the system register(MPUIR) during MPU initialization. Current MPU driver only suppots EL1. Signed-off-by: Haibo Xu <haibo.xu@arm.com> Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2021-03-04 10:51:11 +01:00
/arch/arm64/core/cortex_r/ @povergoing
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/arch/common/ @ioannisg @andyross
CODEOWNERS: Add evgeniy-paltsev as an ARC part owner Add @evgeniy-paltsev as an ARC part owner in addition to @abrodkin and @ruuddw, so he will be chosen as a reviewer automatically. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-22 17:46:53 +01:00
/soc/arc/snps_*/ @abrodkin @ruuddw @evgeniy-paltsev
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 15:25:23 +01:00
/soc/nios2/ @nashif
CODEOWNERS: update architecture owners Update owners for both x86 and ARM. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-03 13:01:27 +02:00
/soc/arm/ @MaureenHelm @galak @ioannisg
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/soc/arm/arm/mps2/ @fvincenzo
soc: arm: atmel: Introduce sam4l SoC Introduce SAM4L SoC initial files. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-19 00:05:31 +01:00
/soc/arm/atmel_sam/common/*_sam4l_*.c @nandojve
CODEOWNERS: code-owner for SAM3X Adding Code-Owner for Atmel SAM3X SOC (Cortex-M3). Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-03-04 23:05:05 +01:00
/soc/arm/atmel_sam/sam3x/ @ioannisg
CODEOWNERS: add owner for the same4 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-11-04 23:43:05 +01:00
/soc/arm/atmel_sam/sam4e/ @nandojve
soc: arm: atmel: Introduce sam4l SoC Introduce SAM4L SoC initial files. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-19 00:05:31 +01:00
/soc/arm/atmel_sam/sam4l/ @nandojve
CODEOWNERS: fix syntax for directories Add trailing "/" to signify directories. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-19 01:32:55 +01:00
/soc/arm/atmel_sam/sam4s/ @fallrisk
CODEOWNERS: Add SAM E70 code owner Add @nandojve, the SAM V71 platform maintainer, as a code owner for the SAM E70 platform, as these two platforms share the same base and are practically identical. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-24 08:40:45 +01:00
/soc/arm/atmel_sam/same70/ @nandojve
CODEOWNERS: add owner for the samv71 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-12-12 02:50:06 +01:00
/soc/arm/atmel_sam/samv71/ @nandojve
soc: arm: cypress: Introduce PSoC-63 BLE Add initial support for PSoC-63 BLE Series. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-09-10 17:41:25 +02:00
/soc/arm/cypress/ @nandojve
arm: Add Broadcom Valkyrie SoC support Add initial support for Broadcom Valkyrie SoC as part of Zephyr. Signed-off-by: Scott Branden <scott.branden@broadcom.com>
2020-01-08 22:18:10 +01:00
/soc/arm/bcm*/ @sbranden
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 19:29:24 +02:00
/soc/arm/gigadevice/ @nandojve
soc: arm: add infineon_xmc series support Add infineon xmc series with XMC4500 support. XMC series comes with, - CPU operates upto 120MHz - 3 RAM (PSRAM1 - code, DSRAM1 - data and DSRAM2 - communiation) - upto 1MB flash init: clock control & gpio is not done, so SoC initialization directly relies on HAL. Core operating clock is stored in no_init section, which is kept under DSRAM1. Only DSRAM1 is used until clock support. Using PSRAM1 and DSRAM1 needs adaptation in linker script - planned for next revision. Note: SystemInit cannot be consumed directly due to vector table + HAL linker dependency. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-04-21 11:37:42 +02:00
/soc/arm/infineon_xmc/ @parthitce
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/soc/arm/nxp*/ @mmahadevan108 @dleach02
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/soc/arm/nordic_nrf/ @ioannisg
CODEOWNERS: Add reviewers on Nuvoton NPCX series. Adding Nuvoton developers as reviewers on NPCX EC (Embedded Controller) SoC, device-tree, and driver sources. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-02-18 06:43:16 +01:00
/soc/arm/nuvoton_npcx/ @MulinChao @WealianLiao @ChiHuaL
soc: arm: rename soc/arm/nuvoton as soc/arm/nuvoton_numicro We try to reduce the ambiguity between 'soc/nuvoton/' and 'soc/nuvoton_npcx' folders. Most if soc vendors name their soc folder by the company name with SOC_FAMILY suffix instead of the company name directly. It is clearer if the soc company has different product lines that aim to specific markets. In this CL, the 'numicro' suffix is used for Nuvoton Microcontroller production line. It distinguishes the 'npcx' suffix that used for Nuvoton Embedded Controller (EC) of Notebook PC product line. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-07-20 08:47:15 +02:00
/soc/arm/nuvoton_numicro/ @ssekar15
soc: add EOS S3 SoC Add basic port for QuickLogic EOS S3 SoC. Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
2020-01-15 17:08:28 +01:00
/soc/arm/quicklogic_eos_s3/ @kowalewskijan @kgugala
soc: silabs_exx32: Add support for SiLabs EFM32PG1B SoC This commit adds support for Silicon Labs EFM32PG1B (Pearl Gecko) SoC. Signed-off-by: Rafael Dias Menezes <rdmeneze@gmail.com>
2021-01-09 14:14:16 +01:00
/soc/arm/silabs_exx32/efm32pg1b/ @rdmeneze
soc: silabs_exx32: Add support for SiLabs EFR32MG21 SoC This commit adds support for Silicon Labs EFR32MG21 (Mighty Gecko) SoC. Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
2020-07-13 17:31:19 +02:00
/soc/arm/silabs_exx32/efr32mg21/ @l-alfred
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/soc/arm/st_stm32/ @erwango
CODEOWNERS: Add reviewers on stm32 components Based on recent contributions, add reviewers on some STM32 components. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-09-04 13:49:30 +02:00
/soc/arm/st_stm32/*/power.c @FRASTM
CODEOWNERS: update arnop2 ownership name Following update of the Github username,replace owner from arnop2 to arnopo. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-12-06 17:00:08 +01:00
/soc/arm/st_stm32/stm32mp1/ @arnopo
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 18:47:13 +02:00
/soc/arm/ti_simplelink/cc13x2_cc26x2/ @bwitherspoon
CODEOWNERS: Update code ownership for TI SimpleLink code Updated for SimpleLink-related code in ext, board and soc. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-02-26 23:34:29 +01:00
/soc/arm/ti_simplelink/cc32xx/ @vanti
CODEOWNERS: fix syntax for directories Add trailing "/" to signify directories. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-19 01:32:55 +01:00
/soc/arm/ti_simplelink/msp432p4xx/ @Mani-Sadhasivam
CODEOWNERS: Add Xilinx ZynqMP platform codeowner Add @stephanosio as a code owner for the Xilinx ZynqMP platform, which is used as the primary testing platform for the Cortex-R architecture. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:35:44 +01:00
/soc/arm/xilinx_zynqmp/ @stephanosio
soc: arm: add Renesas rcar_gen3 series support Most of the Renesas RCar Gen3 based SoC contains a Cortex R7 processor. This processor has access to the same memory mapped devices than the Cortex-A5x cores. - CPU operates upto 800MHz - Can use ram area from 0x40040000 to 0x42000000 - Has 512 interrupts on GIC-400 compliant with Arm GICv2 Add support for r8a77951 as first SoC of this series which is also known as H3 ES2.0 and is present present on different boards such as Salvator and R-Car Starter Kit(H3ulcb). This first SoC definition is just enough to print Hello World in a ram console. Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-01-13 09:38:41 +01:00
/soc/arm/renesas_rcar/ @julien-massot
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/soc/xtensa/intel_s1000/ @sathishkuttan @dcpleung
arm/arm64: Fix misc and trivials for ARM/ARM64 split Fix the header guards, comments, github labeler, CODEOWNERS and MAINTAINERS files. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-26 15:22:59 +01:00
/soc/arm64/ @carlocaione
/soc/arm64/qemu_cortex_a53/ @carlocaione
/soc/arm64/bcm_vk/ @abhishek-brcm
CODEOWNERS: add myself as Layerscape code-owner Add myself to be NXP Layserscape SoC and LS1046A board code-owner. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-04-07 06:09:14 +02:00
/soc/arm64/nxp_layerscape/ @JiafeiPan
arm/arm64: Fix misc and trivials for ARM/ARM64 split Fix the header guards, comments, github labeler, CODEOWNERS and MAINTAINERS files. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-26 15:22:59 +01:00
/soc/arm64/xenvm/ @lorc
soc: arm64: Add FVP AEMv8R AArch64 soc Add essential files to create a new soc. Introduce a new type of soc series named fvp_aemv8r. Add a new soc named fvp_aemv8r_aarch64. Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2020-11-23 08:57:21 +01:00
/soc/arm64/arm/ @povergoing
board: arm64: Add FVP Base RevC 2xAEMv8A board Add support for the FVP Base RevC 2xAEMv8A board to be emulated using the same FVP. For now the virtual platform is only exposing one core and the basic set of peripherals (GICv3, ARM arch timer, PL011, etc...). INFO - Total complete: 256/ 256 100% skipped: 933, failed: 0 Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-04-09 16:39:46 +02:00
/soc/arm64/arm/fvp_aemv8a/ @carlocaione
west.yml: allow users to easily add more modules Import any manifest files in a new 'submanifests' directory into west.yml. This lets users define custom zephyr modules or easily override built-in modules by dropping their own manifest files into submanifests/some-user-file.yaml. Provide an example and a README with links to the relevant documentation in 'submanifests' to get users started. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-07-23 02:29:15 +02:00
/submanifests/* @mbolivar-nordic
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/arch/x86/ @jhedberg @nashif @jenmwms @aasthagr
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 15:25:23 +01:00
/arch/nios2/ @nashif
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/arch/posix/ @aescolar @daor-oti
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 18:35:27 +01:00
/arch/riscv/ @kgugala @pgielda
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/soc/posix/ @aescolar @daor-oti
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 18:35:27 +01:00
/soc/riscv/ @kgugala @pgielda
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/soc/riscv/openisa*/ @dleach02
codeowners: add owners to andes_v5 soc, board, dts, and drivers. Add myself and Teng-Shih-Wei as owners for andes_v5 soc series, dts, adp_xc7k_ae350 board, and device drivers from Andes. Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-07-02 08:42:45 +02:00
/soc/riscv/riscv-privilege/andes_v5/ @cwshu @Teng-Shih-Wei
CODEOWNERS: take ownership of neorv32 specific files Take ownership of all the neorv32 specific files (dts bindings, soc implementation, drivers, and board definition). Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-08-26 19:57:56 +02:00
/soc/riscv/riscv-privilege/neorv32/ @henrikbrixandersen
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/soc/x86/ @dcpleung @nashif @jenmwms @aasthagr
/arch/xtensa/ @dcpleung @andyross @nashif
/soc/xtensa/ @dcpleung @andyross @nashif
codeowners: add owner for SPARC Add myself as an owner for SPARC related files. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-02 15:38:36 +01:00
/arch/sparc/ @martin-aberg
/soc/sparc/ @martin-aberg
CODEOWNERS: Add evgeniy-paltsev as an ARC part owner Add @evgeniy-paltsev as an ARC part owner in addition to @abrodkin and @ruuddw, so he will be chosen as a reviewer automatically. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-22 17:46:53 +01:00
/boards/arc/ @abrodkin @ruuddw @evgeniy-paltsev
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/ @MaureenHelm @galak
/boards/arm/96b_argonkey/ @avisconti
boards: arm: Add 96Boards Avenger96 board support Add board support for 96Boards Avenger96 board from Arrow Electronics based on STM32MP157A MPU from ST Microelectronics. This board is one of the consumer editions boards of the 96Boards family following the Extented CE form factor. More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ By default Zephyr console output is available via RAM console, but it can also be changed to UART7 exposed as UART0 on 40 pin LS header. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-06-12 19:39:13 +02:00
/boards/arm/96b_avenger96/ @Mani-Sadhasivam
CODEOWNERS: remove rsalveti This GitHub account has been disabled for over a year (it was replaced by a `ricardosalveti` account). Remove from CODEOWNERS. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-15 19:16:19 +02:00
/boards/arm/96b_carbon/ @idlethread
boards: arm: Add support for 96Boards Meerkat96 board Add board suppor for 96Boards Meerkat96 board from Novtech based on NXP i.MX7 multi core processor. Zephyr is ported to run on the single core Cortex-M co-processor on this board. More information about this board can be found in 96Boards website: https://www.96boards.org/product/imx7-96/ By default Zephyr console output is available via UART1 available at the 40pin LS connector. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-06-13 19:25:31 +02:00
/boards/arm/96b_meerkat96/ @Mani-Sadhasivam
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/96b_nitrogen/ @idlethread
/boards/arm/96b_neonkey/ @Mani-Sadhasivam
/boards/arm/96b_stm32_sensor_mez/ @Mani-Sadhasivam
CODEOWNERS: Add codeowner for 96b_wistrio Add myself as the codeowner for 96Boards Wistrio. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 13:56:50 +02:00
/boards/arm/96b_wistrio/ @Mani-Sadhasivam
CODEOWNERS: add code-owner for Arduino Due Assigning code-owner for Arduino Due board. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-03-14 16:10:04 +01:00
/boards/arm/arduino_due/ @ioannisg
codeowners: add code owner for blackpill_f401ce, blackpill_f411ce Add @coderkalyan (Kalyan Sriram <coder.kalyan@gmail.com>) as code owner for blackpill_f401ce, blackpill_f411ce boards. Signed-off-by: Kalyan Sriram <kalyan@coderkalyan.com>
2021-04-29 18:20:44 +02:00
/boards/arm/blackpill_f401ce/ @coderkalyan
/boards/arm/blackpill_f411ce/ @coderkalyan
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 18:47:13 +02:00
/boards/arm/cc1352r1_launchxl/ @bwitherspoon
/boards/arm/cc26x2r1_launchxl/ @bwitherspoon
CODEOWNERS: Update code ownership for TI SimpleLink code Updated for SimpleLink-related code in ext, board and soc. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-02-26 23:34:29 +01:00
/boards/arm/cc3220sf_launchxl/ @vanti
boards: arm: Add PSoC-62 BLE Pioneer Kit Introduce PSoC-62 BLE Pioneer Kit. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-09-10 17:44:51 +02:00
/boards/arm/cy8* @nandojve
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/disco_l475_iot1/ @erwango
soc: silabs_exx32: Add support for SiLabs EFM32PG1B SoC This commit adds support for Silicon Labs EFM32PG1B (Pearl Gecko) SoC. Signed-off-by: Rafael Dias Menezes <rdmeneze@gmail.com>
2021-01-09 14:14:16 +01:00
/boards/arm/efm32pg_stk3401a/ @rdmeneze
boards: arm: add FaZe board support The FaZe board can be found in the Seagate FireCuda Gaming SSD devices. A NVMe SSD and two chips are embedded: an ASMedia ASM2364 USB-to-PCIe bridge controller and a NXP LPC11U67 MCU. The former is handling the USB type-C to SSD I/Os while the latter is dedicated to the LED effects. The two chips are connected together through I2C and GPIOs. This Zephyr port is running on the LPC11U67 MCU. Here is a list of the devices connected to the LPC11U67 on a FaZe board: - ASMedia ASM2364 USB-to-PCIe bridge (I2C master on port O) - 6 RGB LEDs connected connected to a TI LP5030 LED controller (I2C device on port 1) - 1 white LED (SSD activity blinking) Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com> Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-05-14 16:43:18 +02:00
/boards/arm/faze/ @mbittan @simonguinot
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/boards/arm/frdm*/ @mmahadevan108 @dleach02
/boards/arm/frdm*/doc/ @dleach02 @MeganHansen
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 19:29:24 +02:00
/boards/arm/gd32*/ @nandojve
board: arm: Add google_kukui board This adds support for the EC (embedded controller) on a Google reference board with codename "kukui". This board uses the STM32F098RC chip. We built an application for the board and verified UART functionality on the board. Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-26 00:16:32 +02:00
/boards/arm/google_*/ @jackrosenthal
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/boards/arm/hexiwear*/ @mmahadevan108 @dleach02
/boards/arm/hexiwear*/doc/ @dleach02 @MeganHansen
arm: Add code owner for the Segger's ip_k66f board I would like to add myself as a co-maintainer for the ip_k66f board. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-03-31 13:35:55 +02:00
/boards/arm/ip_k66f/ @parthitce @lmajewski
boards: arm: Add Legend 2.5" boards This commit adds support for the Legend 2.5" boards (legend25_ssd and legend25_hdd) based on the STM32F070CB MCU. These boards can be found in the Seagate FireCuda Gaming Drive, Gaming Drive for Xbox, SSD Gaming Drive for Xbox, and Gaming Drive for PlayStation devices. Both boards contain the following hardware components: - A B1414 LED strip connected to the PA7 pin (SPI MOSI) - A SPI flash (FM25F005) connected on SPI2 bus The Legend 2.5" HDD board also contains an activity LED connected on TIM3 CH3 Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com> Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-10-22 18:43:41 +02:00
/boards/arm/legend/ @mbittan @simonguinot
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/boards/arm/lpcxpresso*/ @mmahadevan108 @dleach02
/boards/arm/lpcxpresso*/doc/ @dleach02 @MeganHansen
CODEOWNERS: Add myself as the codeowner for imx8m evk and uart driver Add myself as the codeowner for imx8m evk and uart driver. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-11-23 14:33:16 +01:00
/boards/arm/mimx8mm_evk/ @Mani-Sadhasivam
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/boards/arm/mimxrt*/ @mmahadevan108 @dleach02
/boards/arm/mimxrt*/doc/ @dleach02 @MeganHansen
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/mps2_an385/ @fvincenzo
/boards/arm/msp_exp432p401r_launchxl/ @Mani-Sadhasivam
CODEOWNERS: Add reviewers on Nuvoton NPCX series. Adding Nuvoton developers as reviewers on NPCX EC (Embedded Controller) SoC, device-tree, and driver sources. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-02-18 06:43:16 +01:00
/boards/arm/npcx7m6fb_evb/ @MulinChao @WealianLiao @ChiHuaL
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 20:42:35 +02:00
/boards/arm/nrf*/ @carlescufi @lemrey @ioannisg
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/boards/arm/nucleo*/ @erwango @ABOSTM @FRASTM
CODEOWNERS: remove rsalveti This GitHub account has been disabled for over a year (it was replaced by a `ricardosalveti` account). Remove from CODEOWNERS. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-15 19:16:19 +02:00
/boards/arm/nucleo_f401re/ @idlethread
board: arm: add support for nuvoton pfm m487 add support for nuvoton pfm m487 development board Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2020-04-24 16:22:12 +02:00
/boards/arm/nuvoton_pfm_m487/ @ssekar15
CODEOWNERS: Add Xilinx ZynqMP platform codeowner Add @stephanosio as a code owner for the Xilinx ZynqMP platform, which is used as the primary testing platform for the Cortex-R architecture. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:35:44 +01:00
/boards/arm/qemu_cortex_r*/ @stephanosio
CODEOWNERS: adding code owner for ARM Qemu Cortex-M* platforms Adding code owner for ARM boards - qemu_cortex_m0 - qemu_cortex_m3 Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-09-30 15:50:22 +02:00
/boards/arm/qemu_cortex_m*/ @ioannisg
boards: add EOS S3 Quick Feather board Add basic port for EOS S3 Quick Feather board. Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
2020-01-23 10:22:52 +01:00
/boards/arm/quick_feather/ @kowalewskijan @kgugala
boards: arm: Add RAK4631 Wisblock Core LPWAN board Add rak4631 board from RAKWireless based on nrf52840 and SX1262. Board Documentation is completed Signed-off-by: Guillaume Paquet <guillaume.paquet@smile.fr>
2021-04-05 20:11:45 +02:00
/boards/arm/rak4631_nrf52840/ @gpaquet85
boards: arm: nordic: rakwireless Introduce rak5010_nrf52840 board Add rak5010 board from RAKWireless based on nrf52840. Board Documentation is completed Signed-off-by: Guillaume Paquet <guillaume.paquet@smile.fr>
2020-09-08 16:20:17 +02:00
/boards/arm/rak5010_nrf52840/ @gpaquet85
board: arm: ronoth_lodev: add Ronoth LoDev board support The Ronoth LoDev in an open source board which uses the AcSIP S76S. Signed-off-by: Dean Weiten <dmw@weiten.com>
2021-03-03 15:15:34 +01:00
/boards/arm/ronoth_lodev/ @NorthernDean
board: arm: add support for infineon relax kit Add support for relax kit with infineon xmc4500 SoC. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-04-21 12:30:02 +02:00
/boards/arm/xmc45_relax_kit/ @parthitce
CODEOWNERS: add owner for the same4 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-11-04 23:43:05 +01:00
/boards/arm/sam4e_xpro/ @nandojve
boards: arm: atmel: Introduce sam4l_ek board Add initial version. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-19 00:40:21 +01:00
/boards/arm/sam4l_ek/ @nandojve
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/sam4s_xplained/ @fallrisk
CODEOWNERS: Add SAM E70 code owner Add @nandojve, the SAM V71 platform maintainer, as a code owner for the SAM E70 platform, as these two platforms share the same base and are practically identical. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-24 08:40:45 +01:00
/boards/arm/sam_e70_xplained/ @nandojve
CODEOWNERS: add owner for the samv71 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-12-12 02:50:06 +01:00
/boards/arm/sam_v71_xult/ @nandojve
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/v2m_beetle/ @fvincenzo
/boards/arm/olimexino_stm32/ @ydamigos
boards: arm: Add support for SensorTile.box board The SensorTile.box is a board designed for IoT applications embedding a wide range of intelligent low power MEMS sensors, a STM32L4 microcontroller to manage sensor configuration and process sensor output data, a micro-USB battery charging interface and an ST Bluetooth Low Energy module for wireless communication with a BLE-enabled smartphone. Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-08-05 12:57:25 +02:00
/boards/arm/sensortile_box/ @avisconti
boards: arm: Add steval_fcu001v1 board support BSP for steval_fcu001v1 resubmitted as per PR #18746 Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
2019-10-06 10:01:17 +02:00
/boards/arm/steval_fcu001v1/ @Navin-Sankar
boards: add stm32l1 discovery Tested apps: hello_world, blinky Tested peripherals: UART, SPI Signed-off-by: Karl Palsson <karlp@etactica.com>
2019-10-02 01:12:31 +02:00
/boards/arm/stm32l1_disco/ @karlp
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/boards/arm/stm32*_disco/ @erwango @ABOSTM @FRASTM
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/boards/arm/stm32f3_disco/ @ydamigos
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/boards/arm/stm32*_eval/ @erwango @ABOSTM @FRASTM
boards: arm: Add support for R-Car H3ULCB board Add basic configuration for H3ULCB, just enough to see the Zephyr boot banner on the ram console. This configuration make use of the Cortex-R7 present on r8a977951 SoC. Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-01-13 15:11:13 +01:00
/boards/arm/rcar_h3ulcb/ @julien-massot
boards: arm: Modify BMD-345-EVAL support Modify support for u-blox BMD-345-EVAL which uses the nRF52840 and a Skyworks RFX2411 FEM. These edits follow the naming cnoventions that is used with the other u-blox EVKs recently added, or in progress This board is similar to the nRF52840dk_nrf52840 with the addition of a FEM. Four Arduino GPIO pins have been reassigned to the PA_LNA control pins. u-blox would prefer to use this naming convention to match other BMD-3xx-EVAL and EVK-NINA-Bx boards recently submitted. Tested with blinky, button, and Bluetooth peripheral_hr Checking dts files Updated CODEOWNERS to rename bmd_345_eval to ubx_bmd345eval_nrf52840 Added CMakeLists.txt, updated board.c Signed-off-by: Bob Recny <bob.recny@u-blox.com>
2021-04-22 01:41:10 +02:00
/boards/arm/ubx_bmd345eval_nrf52840/ @Navin-Sankar @brec-u-blox
CODEOWNERS: handle an account change s/mbolivar/mbolivar-nordic/ Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-17 16:40:58 +01:00
/boards/common/ @mbolivar-nordic
cmake: deprecation of board names This commit introduces boards/deprecated.cmake to allow deprecation of existing boards, when a board is renamed. This allows users to still specify the old board name, and let Zephyr build system to select the new board name. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-03-16 15:36:52 +01:00
/boards/deprecated.cmake @tejlmand
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 15:25:23 +01:00
/boards/nios2/ @nashif
/boards/nios2/altera_max10/ @nashif
CODEOWNERS, MAINTAINERS.yml: Update github username GitHub username @cbsiddharth was changed to @sidcha. Update CODEOWNERS and MAINTAINERS.yml entries. Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2021-05-08 23:57:34 +02:00
/boards/arm/stm32_min_dev/ @sidcha
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/boards/posix/ @aescolar @daor-oti
/boards/posix/nrf52_bsim/ @aescolar @wopu-ot
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 18:35:27 +01:00
/boards/riscv/ @kgugala @pgielda
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/boards/riscv/rv32m1_vega/ @dleach02
boards: risc-v: add BeagleV Starlight JH7100 board support Adding support for beagleV Starlight board based on Starfive JH7100 SoC. It's a base support, no drivers other than uart has been tested. Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal49@gmail.com>
2021-05-18 02:57:18 +02:00
/boards/riscv/beaglev_starlight_jh7100/ @rajnesh-kanwal
codeowners: add owners to andes_v5 soc, board, dts, and drivers. Add myself and Teng-Shih-Wei as owners for andes_v5 soc series, dts, adp_xc7k_ae350 board, and device drivers from Andes. Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-07-02 08:42:45 +02:00
/boards/riscv/adp_xc7k_ae350/ @cwshu @Teng-Shih-Wei
CODEOWNERS: take ownership of neorv32 specific files Take ownership of all the neorv32 specific files (dts bindings, soc implementation, drivers, and board definition). Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-08-26 19:57:56 +02:00
/boards/riscv/neorv32/ @henrikbrixandersen
CODEOWNERS: Add codeowner to boards/shields Following new shield introduction in #14057, it has been highlighted there was no codeowner for boards/shields/. Assign erwango as codeowner. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-11 09:31:53 +01:00
/boards/shields/ @erwango
boards: shields: Introduce atmel_rf2xx module shield The Atmel RF2xx module shield is a generic solution to enable any Atmel AT86RF2xx IEEE 802.15.4 transceiver. This module enables IEEE 802.15.4 RF2xx Zephyr driver. The Atmel RF2xx module shield enables any board with an Atmel Xplained, Xplained-Pro, Arduino or MikroBus expansion header to connect to networks operation with IEEE 802.15.4, OpenThread or any other stack based on this media type. The Atmel RF2xx module is configured to allow interoperate with other medias like Ethernet. User need configure network stack properlly. Fixes #26259. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-05 05:52:14 +02:00
/boards/shields/atmel_rf2xx/ @nandojve
CODEOWNERS: Add boards/shields/esp_8266 owner The esp_8266 shield was added without owner on #24710. Add myself as an owner of esp_8266 shield files. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-11 19:50:40 +02:00
/boards/shields/esp_8266/ @nandojve
boards: shields: Introduce inventek es-WIFI shield Add Inventek es-WIFI modules shield. This shield exposes es-WIFI driver using Arduino Uno R3 header by UART or SPI interfaces. It shows how user can create their own overlay and expose es-WIFI driver. The current Inventek's EVB doesn't have all pins necessary to control the module by Arduino hearder. This shows how to wire to get ISM43xx EVB working. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-10-23 14:41:41 +02:00
/boards/shields/inventek_eswifi/ @nandojve
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/boards/x86/ @dcpleung @nashif @jenmwms @aasthagr
CODEOWNERS: add owners for acrn development Adding myself @enjiamai as codeowners for /board/x86/acrn for development. Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2021-07-29 10:53:18 +02:00
/boards/x86/acrn/ @enjiamai
CODEOWNERS: update owners and added xcc/s1000 related lines Updated for board and toolchain and a few minor fixes. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-24 19:04:38 +01:00
/boards/xtensa/ @nashif @dcpleung
/boards/xtensa/intel_s1000_crb/ @sathishkuttan @dcpleung
boards/xtensa: Add support for ODROID-GO Game Kit Add support for ODROID-GO Game Kit Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-16 12:19:28 +02:00
/boards/xtensa/odroid_go/ @ydamigos
CODEOWNERS: add codeowner for SOF with Zephyr on NXP i.MX8 Add myself and Daniel Baluta as codeowners for i.MX8 related files for SOF with Zephyr OS. Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-07-05 18:11:35 +02:00
/boards/xtensa/nxp_adsp_imx8/ @iuliana-prodan @dbaluta
codeowners: add owner for SPARC Add myself as an owner for SPARC related files. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-02 15:38:36 +01:00
/boards/sparc/ @martin-aberg
arm/arm64: Fix misc and trivials for ARM/ARM64 split Fix the header guards, comments, github labeler, CODEOWNERS and MAINTAINERS files. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-26 15:22:59 +01:00
/boards/arm64/qemu_cortex_a53/ @carlocaione
/boards/arm64/bcm958402m2_a72/ @abhishek-brcm
CODEOWNERS: add myself as Layerscape code-owner Add myself to be NXP Layserscape SoC and LS1046A board code-owner. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-04-07 06:09:14 +02:00
/boards/arm64/nxp_ls1046ardb/ @JiafeiPan
arm/arm64: Fix misc and trivials for ARM/ARM64 split Fix the header guards, comments, github labeler, CODEOWNERS and MAINTAINERS files. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-26 15:22:59 +01:00
/boards/arm64/xenvm/ @lorc
board: arm64: Add FVP BaseR AEMv8R board Add essential files to create a new board. Enable arch timer, uart, multi-threading. Set memory map for flash and sram. The new board name is fvp_baser_aemv8r with the fvp_aemv8r_aarch64 soc. Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2020-11-24 07:14:08 +01:00
/boards/arm64/fvp_baser_aemv8r/ @povergoing
board: arm64: Add FVP Base RevC 2xAEMv8A board Add support for the FVP Base RevC 2xAEMv8A board to be emulated using the same FVP. For now the virtual platform is only exposing one core and the basic set of peripherals (GICv3, ARM arch timer, PL011, etc...). INFO - Total complete: 256/ 256 100% skipped: 933, failed: 0 Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-04-09 16:39:46 +02:00
/boards/arm64/fvp_base_revc_2xaemv8a/ @carlocaione
codeowners: Add code owners for Intel SoC FPGA Agilex Add code owners for Intel SoC FPGA Agilex board and clock drivers. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-04-21 11:41:05 +02:00
/boards/arm64/intel_socfpga_agilex_socdk/ @siclim @ngboonkhai
CODEOWNERS: add cmake owners Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-31 13:31:34 +01:00
# All cmake related files
CODEOWNERS: Re-assign reviews from SebastianBoe to tejlmand Transfer review assignments from SebastianBoe to tejlmand. Sebastian Bøe's role is being transferred to Torsten Rasmussen (tejlmand). Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2020-03-26 12:12:59 +01:00
/cmake/ @tejlmand @nashif
CODEOWNERS: Add reviewers on Synopsys metaware toolchain Adding Synopsys developers as reviewers on arcmwdt components. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-09-14 09:59:59 +02:00
/cmake/*/arcmwdt/ @abrodkin @evgeniy-paltsev @tejlmand
CODEOWNERS: Re-assign reviews from SebastianBoe to tejlmand Transfer review assignments from SebastianBoe to tejlmand. Sebastian Bøe's role is being transferred to Torsten Rasmussen (tejlmand). Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2020-03-26 12:12:59 +01:00
/CMakeLists.txt @tejlmand @nashif
CODEOWNERS: add @nashif for docs Add @nashif as codeowner for docs temporarily until we have a dedicated owner. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-30 04:57:08 +01:00
/doc/ @dbkinder
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/doc/guides/coccinelle.rst @himanshujha199640 @JuliaLawall
/doc/CMakeLists.txt @carlescufi
doc: move scripts to _scripts Move Sphinx related content to folders with underscore prefix. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-03-29 20:50:01 +02:00
/doc/_scripts/ @carlescufi
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/doc/guides/bluetooth/ @joerchan @jhedberg @Vudentz
CODEOWNERS: devicetree updates Update maintainers for code and docs. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-20 17:17:16 +01:00
/doc/guides/dts/ @galak @mbolivar-nordic
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/doc/reference/bluetooth/ @joerchan @jhedberg @Vudentz
CODEOWNERS: devicetree updates Update maintainers for code and docs. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-20 17:17:16 +01:00
/doc/reference/devicetree/ @galak @mbolivar-nordic
doc: networking: Add ISO-TP documentation This commit adds the documentation for the ISO-TP library Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-08-31 11:35:17 +02:00
/doc/reference/networking/can* @alexanderwachter
codeowners: Add owners to security documentation Add myself and David Brown as owners for security documentation. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-19 00:27:16 +02:00
/doc/security/ @ceolin @d3zd3z
CODEOWNERS: adapt for debug and tracing add subsys/tracing and include/tracing and drivers/debug Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-07 03:00:50 +01:00
/drivers/debug/ @nashif
drivers: i2c: Introduce SAM4L i2c TWIM driver The SAM4L have a unique I2C driver. It shares simultaneously pins for both master and slave controllers. Each controller have their own instance. This introduces the TWIM controller that handles only the master part. The TWIM controller uses no copy and the driver was prepared to work with both 7 and 10 bits address. The controller can handler up to 256 bytes for a single transfer allowing long data communication with almost no CPU intervention. The driver was wrote specifically to Zephyr. It receives a transfer list of from upper layers to a specific device on the bus. It programs the first and second transfer, if it exists, before start. At end of full read/write interrupt, will program the next data block. This process repeats until all transfers be executed. The driver uses interrupt from TWIM to check for erros or program next tranfer. Future work can enable low power mode on the driver allowing long transfers with low power consumption. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-05-10 17:25:38 +02:00
/drivers/*/*sam4l* @nandojve
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 18:47:13 +02:00
/drivers/*/*cc13xx_cc26xx* @bwitherspoon
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 19:29:24 +02:00
/drivers/*/*gd32* @nandojve
CODEOWNERS: simplify LiteX-related entries This adds a generic entry for all LiteX-related drivers. Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-05-27 10:30:04 +02:00
/drivers/*/*litex* @mateusz-holenko @kgugala @pgielda
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/drivers/*/*mcux* @mmahadevan108 @dleach02
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/drivers/*/*stm32* @erwango @ABOSTM @FRASTM
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/drivers/*/*native_posix* @aescolar @daor-oti
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/drivers/*/*lpc11u6x* @mbittan @simonguinot
CODEOWNERS: Add reviewers on Nuvoton NPCX series. Adding Nuvoton developers as reviewers on NPCX EC (Embedded Controller) SoC, device-tree, and driver sources. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-02-18 06:43:16 +01:00
/drivers/*/*npcx* @MulinChao @WealianLiao @ChiHuaL
codeowners: add owners to andes_v5 soc, board, dts, and drivers. Add myself and Teng-Shih-Wei as owners for andes_v5 soc series, dts, adp_xc7k_ae350 board, and device drivers from Andes. Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-07-02 08:42:45 +02:00
/drivers/*/*andes* @cwshu @Teng-Shih-Wei
CODEOWNERS: take ownership of neorv32 specific files Take ownership of all the neorv32 specific files (dts bindings, soc implementation, drivers, and board definition). Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-08-26 19:57:56 +02:00
/drivers/*/*neorv32* @henrikbrixandersen
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/adc/ @anangl
drivers: adc: add driver support for ADC1 of stm32 This commit adds driver support for ADC1 on all 8 supported series of stm32 with resolution and conversion time selection and calibration. Currently DMA is not supported for all series, and without it, zephyr won't be able to catch up ADC's end of conversion interrupt, so this version of the driver supports one channel conversion only. Users want multi-channel conversion should use multiple sequences in their app code. This driver uses LL lib rather than HAL because the current HAL lib for ADC will call HAL_DMA_* functions rather than using zephyr's common DMA interface, so that way the driver will break the consistency of the code. This driver has been tested on multiple nucleo boards including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/F746ZG/L073RZ/L476RG and all passed the test cases in tests/drivers/adc/adc_api. If the external ADC line is floating, it may fail the tests since ADC may get 0V and the test cases think 0 is failing. Connect it to any voltage source between 0-3.3V will help passing the test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-05-07 10:37:35 +02:00
/drivers/adc/adc_stm32.c @cybertale
drivers: audio: dmic: Add support for nRF PDM peripherals Add a shim that allows using the nrfx PDM driver via the Zephyr API. Add also missing devicetree nodes representing the PDM peripherals in the nRF52 Series SoCs. Extend the "nordic,nrf-pdm" binding with a new property that allows specifying the clock source to be used by the PDM peripheral (so that it is possible to use HFXO for better accuracy of the peripheral clock or, in the nRF53 Series SoCs, to use the dedicated audio oscillator). Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-08-19 17:11:46 +02:00
/drivers/audio/*nrfx* @anangl
nuvoton: battery-backed ram Add bindings and entry for the battery-backed ram in the nuvoton npcx. This commit is an upstream port of https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/ec/zephyr/dts/bindings/cros_bbram/nuvoton,npcx-cros-bbram.yaml;l=1;drc=e9af813c36b7b411bf2a01cbc1b09d5fdec49b8a Along with a bit of cleaning up and an emulator. Signed-off-by: Yuval Peress <peress@chromium.org>
2021-01-25 08:51:17 +01:00
/drivers/bbram/* @yperess @sjg20 @jackrosenthal
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/drivers/bluetooth/ @joerchan @jhedberg @Vudentz
cache: Introduce external cache controller system support The cache API currently shipped in Zephyr is assuming that the cache controller is always on-core thus managed at the arch level. This is not always the case because many SoCs rely on external cache controllers as a peripheral external to the core (for example PL310 cache controller and the L2Cxxx family). In some cases you also want a single driver to control a whole set of cache controllers. Rework the cache code introducing support for external cache controllers. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-04-28 10:38:27 +02:00
/drivers/cache/ @carlocaione
drivers: syscon: Add support for multiple regions 1. Add support for multiple syscon entries (as a side effect, this also fixed syscon.c implementations which weren't being linked to their syscon.h counterparts). 2. Add support for different width registers in syscon. 3. Add tests for syscon Signed-off-by: Yuval Peress <peress@chromium.org>
2021-08-04 07:43:58 +02:00
/drivers/syscon/ @carlocaione @yperess
CODEOWNERS: CAN ownership Add @alexanderwachter as CAN maintainer Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-25 17:15:06 +01:00
/drivers/can/ @alexanderwachter
drivers: can: mcp2515: Add driver for MCP2515 CAN controller The MCP2515 is a CAN controller that can be connected via SPI to an host MCU. This driver adds support for the MCP2515 as a new driver in the CAN subsystem. As it is a SPI peripheral it uses a thread for its interrupt handling and the received message filtering is done inside this interrupt thread, as the MCP2515 filter capabilities are not sufficient for the Zephyr CAN interface. The driver was validated with an external CAN logger and the adjusted CAN sample application. Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2018-06-12 08:23:20 +02:00
/drivers/can/*mcp2515* @karstenkoenig
drivers: can: Add Renesas R-Car driver This driver is for classic CAN, it makes use of CAN interface in FIFO mode. This driver support Standard ID as well as Extended ID. Tested on H3ULCB, Ebisu platform, with external adapter and in loopback mode. Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-05-10 10:19:57 +02:00
/drivers/can/*rcar* @julien-massot
codeowners: Add code owners for Intel SoC FPGA Agilex Add code owners for Intel SoC FPGA Agilex board and clock drivers. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-04-21 11:41:05 +02:00
/drivers/clock_control/*agilex* @siclim
drivers: clock_control: nrf: reimplementation including API updates Reimplementation of clock control driver for nrf platform. It includes latest API changes: asynchronous starting and getting clock status. Additionally, it implements calibration algorithm which optionally skips calibration based on no temperature change. Internal temperature sensor is used for that. Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2019-06-26 13:27:31 +02:00
/drivers/clock_control/*nrf* @nordic-krch
esp32: drivers: clock_control: add ownership into CODEOWNERS file. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-09-16 12:57:28 +02:00
/drivers/clock_control/*esp32* @extremegtx @glaubermaroto
drivers: clock_control: add R-Car CPG MSSR driver Clock Pulse Generator, Module Standby Software Reset, are registers presents in Renesas Gen3 SoC series. MSSR is used to supply clock to the different modules, shuch as timer, or UART, it's also possible to issue a reset the different module. CPG registers allow to get the rate or to set some divider like for the CAN clock. Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-01-15 16:10:46 +01:00
/drivers/clock_control/*rcar* @julien-massot
CODEOWNERS: Set @nordic-krch as the codeowner of the counter driver As the author of the latest rework of the counter driver API, @nordic-krch is a more appropriate person than me to be the codeowner of this driver. Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-03-27 10:58:14 +01:00
/drivers/counter/ @nordic-krch
CODEOWNERS: Add ipm_console codeowner. Add @finikorg as codeowner for ipm_console. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-02-19 11:37:18 +01:00
/drivers/console/ipm_console.c @finikorg
console: Add semihosting console Many chips have only one serial port. When the serial port is occupied by other devices, there is a lack of a console to output debugging information. Semihosting can provide a console. The disadvantage of semihosting is that a debugger must be connected, so it can only be used for online debugging. Signed-off-by: ZhongYao Luo <LuoZhongYao@gmail.com> Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-11-29 08:07:21 +01:00
/drivers/console/semihost_console.c @luozhongyao
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/drivers/counter/counter_cmos.c @dcpleung
drivers: crypto: add driver for nRF ECB add driver for nRF AES Electronic CodeBook (ECB) peripheral Signed-off-by: Maciej Fabia <maciej.fabia@nordicsemi.no>
2020-03-20 01:17:31 +01:00
/drivers/crypto/*nrf_ecb* @maciekfabia @anangl
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/display/ @vanwinkeljan
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/drivers/display/display_framebuf.c @dcpleung
drivers: dac: Add API for DAC peripherals DAC (digital to analog converter) peripheral driver with a generic API suitable for most MCUs (only basic DAC features considered). Signed-off-by: Martin Jäger <martin@libre.solar>
2020-01-10 10:10:12 +01:00
/drivers/dac/ @martinjaeger
CODEOWNERS: Adding owner on DW DMA driver Just to make CI happy. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-17 08:32:59 +01:00
/drivers/dma/*dw* @tbursztyka
CODEOWNERS: Add ownership for SAM0 DMA driver Add myself as owner for the SAM0 DMA driver. Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-04-30 01:29:00 +02:00
/drivers/dma/*sam0* @Sizurka
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/drivers/dma/dma_stm32* @cybertale @lowlander
drivers: dma: Add pl330 dma driver Add PL330 dma driver support, this driver - supports 32 bit memory to memory operation - supports 36 bit memory to memory operation under a config flag DMA_64BIT - supports secure channel Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2020-05-03 05:57:19 +02:00
/drivers/dma/*pl330* @raveenp
drivers: dma: Add iProc PAXDMA driver Add PAX[PCIE<->AXI] DMA driver which supports DMA transfers between host and target memory over PCIe link. Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2020-07-29 16:17:30 +02:00
/drivers/dma/*iproc_pax* @raveenp
ec_host_cmd_periph: add device API The host command peripheral device API abstracts how an embedded controller sends and receives data from a host on a bus. Each bus like eSPI, SPI, or I2C would implement their own host command peripheral device. Each hardware device would then handle the necessary hardware access to send and receive data over that bus. The chosen host command peripheral device will be used by the host command handler framework to send and receive host data correctly. Signed-off-by: Jett Rink <jettrink@google.com>
2020-08-31 23:55:48 +02:00
/drivers/ec_host_cmd_periph/ @jettr
CODEOWNERS: Adding drivers/edac owner Adding myself to the list for drivers/edac. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-12-18 10:29:39 +01:00
/drivers/edac/ @finikorg
drivers: eeprom: add API for EEPROM devices Add API for accessing Electrically Erasable Programmable Read-Only Memory (EEPROM) devices. EEPROMs have an erase block size of 1 byte, a long lifetime, and allows overwriting data on byte-by-byte access. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-10-20 21:22:03 +02:00
/drivers/eeprom/ @henrikbrixandersen
drivers: eeprom: add driver support for EEPROM of STM32L1 Could not find a supported LL with EEPROM. So I used HAL. Tested with: 96b_wistrio Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2019-12-10 03:44:44 +01:00
/drivers/eeprom/eeprom_stm32.c @KwonTae-young
drivers: entropy: introduce new Telink B91 Entropy driver Entropy driver basic support for new Telink B91 platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-26 10:27:10 +02:00
/drivers/entropy/*b91* @yurvyn
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/drivers/entropy/*rv32m1* @dleach02
drivers: entropy: gecko: add entropy driver based on GECKO TRNG Add entropy driver based on GECKO TRNG module along with device tree support for EFM32PG and EFR32MG SOCs. Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
2020-02-21 15:22:05 +01:00
/drivers/entropy/*gecko* @chrta
CODEOWNERS: aplhabetical sorting Some lines were not at the expected place. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-09-04 12:12:34 +02:00
/drivers/entropy/*litex* @mateusz-holenko @kgugala @pgielda
API: espi: Add API for Enhanced Serial Peripheral Interface This API defines following call for eSPI bus drivers - espi_set_config - espi_get_channel_status - espi_send_read_request - espi_send_write_request - espi_send_vwire - espi_receive_vwire - espi_send_oob - espi_receive_oob - espi_flash_read - espi_flash_write - espi_flash_erase Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-05-10 04:05:40 +02:00
/drivers/espi/ @albertofloyd @franciscomunoz @scottwcpg
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/drivers/ethernet/ @tbursztyka @pfalcon
ethernet: Synopsys DesignWare MAC driver This is a driver for the Synopsys DesignWare MAC. It should work with the "DesignWare Cores Ethernet Quality-of-Service" versions 4.x and 5.x. This driver uses a zero-copy strategy, meaning that the hardware reads and writes data directly from/to packet fragment buffers provided by the network subsystem without first copying the data into a dedicated DMA bounce buffer. Platform specific setup is necessary for the hardware to work. Currently, only the STM32H7X series is implemented and tested. While this part needs refinement, this driver performs better and uses far less code space than the HAL-based alternative. Not yet implemented: - MDIO (it is WIP, currently relying on default PHY config) - PTP support - VLAN support - various hardware offloads (when available) Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-09-08 05:56:31 +02:00
/drivers/ethernet/*dwmac* @npitre
CODEOWNERS: Remove comma Fixes incorrect syntax in CODEOWNERS file to restore automatic GitHub reviewer assignments. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-10-07 02:30:43 +02:00
/drivers/ethernet/*stm32* @Nukersson @lochej
drivers: eth: add driver for w5500 Ethernet Controller Add driver for w5500 Ethernet Controller Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-09-02 10:36:48 +02:00
/drivers/ethernet/*w5500* @parthitce
CODEOWNERS: add code owner for Xilinx GEM driver Add the code owner entries for all files related to the Xilinx GEM Ethernet device driver. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-06-23 17:13:00 +02:00
/drivers/ethernet/*xlnx_gem* @ibirnbaum
drivers: Add Ethernet PHY API This commit adds support for Ethernet PHY drivers via a PHY API. It also includes a driver for a generic MII compliant PHY which supports most PHYs on the market. Separating PHY driver from the SoC specific Ethernet driver simplifies the Ethernet driver code and enables code re-use. Drivers for specific PHYs with more advanced features, such as RGMII delay in PHY can be developed independent of the Ethernet MAC driver. Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
2021-05-03 03:06:30 +02:00
/drivers/ethernet/phy/ @rlubos @tbursztyka @arvinf
drivers: Add mdio API This commit adds support for MDIO bus. The bus is used by Ethernet MACs to communicate with PHYs. Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
2021-05-03 02:49:04 +02:00
/drivers/mdio/ @rlubos @tbursztyka @arvinf
CODEOWNERS: extend flash driver ownership Added @nvlsianpu as flash and nrf-flash maintainer Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-10-10 11:14:10 +02:00
/drivers/flash/ @nashif @nvlsianpu
drivers: flash: introduce new Telink B91 Flash driver Flash driver basic support for Telink B91 platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-26 11:48:22 +02:00
/drivers/flash/*b91* @yurvyn
CODEOWNERS: extend flash driver ownership Added @nvlsianpu as flash and nrf-flash maintainer Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-10-10 11:14:10 +02:00
/drivers/flash/*nrf* @nvlsianpu
soc: esp32s2: drivers: flash: add support to host SPI Flash driver. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-09-21 02:19:23 +02:00
/drivers/flash/*esp32* @glaubermaroto
drivers: fpga controller: add eos_s3 fpga driver This adds driver for EOS_S3 SoC FPGA. Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com> Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
2021-06-23 09:45:20 +02:00
/drivers/fpga/ @tgorochowik @kgugala
CODEOWNERS: remove my assignments I won't be supporting Zephyr for the foreseeable future, so remove my association with specific subsystems. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2021-03-17 14:51:38 +01:00
/drivers/gpio/ @mnkp
drivers: gpio: introduce new Telink B91 GPIO driver GPIO driver basic support for new Telink B91 platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-09 10:44:22 +02:00
/drivers/gpio/*b91* @yurvyn
drivers: adc: add LMP90xxx ADC driver with GPIO Add driver for the Texas Instruments LMP90xxx series of multi-channel, low-power 16-/24-bit sensor analog frontends (AFEs). The functionality is split into two drivers; an ADC driver and a GPIO driver. Tested with LMP90080 and LMP90100. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-10-07 13:08:44 +02:00
/drivers/gpio/*lmp90xxx* @henrikbrixandersen
CODEWONERS: Update for gpio_stm32 driver Change codeowner following driver indeep rework. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-10-15 09:35:28 +02:00
/drivers/gpio/*stm32* @erwango
drivers: gpio: add EOS S3 GPIO driver Add GPIO driver for QuickLogic EOS S3 SoC. Co-authored-by: Jan Kowalewski <jkowalewski@antmicro.com> Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com> Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
2020-02-04 11:23:26 +01:00
/drivers/gpio/*eos_s3* @wtatarski @kowalewskijan @kgugala
drivers: gpio: add Renesas RCar gpio Add GPIO controller driver that can be found on Renesas RCar gen3 soc series. Controller can handle up to 32 GPIOs per banks. Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-03-11 16:28:14 +01:00
/drivers/gpio/*rcar* @julien-massot
esp32: drivers: gpio: code refactoring to ease driver code reuse between socs. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-08-11 19:01:09 +02:00
/drivers/gpio/*esp32* @glaubermaroto
CODEOWNERS: Add hwinfo ownership Add @alexanderwachter as hwinfo maintainer. Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-25 17:22:06 +01:00
/drivers/hwinfo/ @alexanderwachter
drivers: i2c: Add a dump routine Add a function to dump out a set of I2C messages. It uses debug logging so it only useful for debugging. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-04 23:08:13 +02:00
/drivers/i2c/i2c_common.c @sjg20
emul: i2c: Add support for I2C emulators Add an emulation controller which routes I2C traffic to attached emulators depending on the I2C address selected. This allows drivers for I2C peripherals to be tested on systems that don't have that peripheral attached, with the emulator handling the I2C traffic. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-08-20 16:14:35 +02:00
/drivers/i2c/i2c_emul.c @sjg20
drivers/i2c: add i2c driver on it8xxx2 platform This commit is about the it8xxx2 i2c master driver which includes six SMBus channels. The enhanced channel i2c3, i2c4, i2c5 are controller which are designed to support the I2C protocol. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2020-12-22 14:29:02 +01:00
/drivers/i2c/i2c_ite_it8xxx2.c @GTLin08
i2c: add i2c shell with scan cmd Add a shell to interact with I2C devices. Currently scanning for devices is supported. Example output: uart:~$ i2c scan I2C_1 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- 18 -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: 40 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- 2 devices found on I2C_1 uart:~$ i2c scan I2C_3 i2c - I2C commands Subcommands: I2C_1 :I2C_1 I2C_2 :I2C_2 uart:~$ i2c scan I2C_2 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e -- 20: -- -- -- -- -- -- -- -- -- 29 -- -- -- 2d -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- 56 -- -- -- -- -- -- 5d -- 5f 60: -- -- -- -- -- -- -- -- -- -- 6a -- -- -- -- -- 70: -- -- -- -- -- -- -- -- 7 devices found on I2C_2 This shell is based on the a sample that did the same thing and was limited in support. The sample is now removed in favour of this generic shell module. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-08 23:36:01 +01:00
/drivers/i2c/i2c_shell.c @nashif
emul: i2c: Add support for I2C emulators Add an emulation controller which routes I2C traffic to attached emulators depending on the I2C address selected. This allows drivers for I2C peripherals to be tested on systems that don't have that peripheral attached, with the emulator handling the I2C traffic. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-08-20 16:14:35 +02:00
/drivers/i2c/Kconfig.i2c_emul @sjg20
drivers/i2c: add i2c driver on it8xxx2 platform This commit is about the it8xxx2 i2c master driver which includes six SMBus channels. The enhanced channel i2c3, i2c4, i2c5 are controller which are designed to support the I2C protocol. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2020-12-22 14:29:02 +01:00
/drivers/i2c/Kconfig.it8xxx2 @GTLin08
Revert "drivers: move eeprom_slave driver to tests directory" This reverts commit cabbd916cfba20f39a91922b740d914f38a21b2d. This is considered to be useful enough that it should be restored as a stable Zephyr API. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-12-15 18:43:51 +01:00
/drivers/i2c/slave/*eeprom* @henrikbrixandersen
drivers: i2c: add dummy driver for vnd,i2c We will need this to be able to DEVICE_DT_GET() bus devices from tests/drivers/build_all in an upcoming commit. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-01-16 01:35:53 +01:00
/drivers/i2c/Kconfig.test @mbolivar-nordic
/drivers/i2c/i2c_test.c @mbolivar-nordic
drivers: i2c: add Renesas R-Car driver This patch add support for I2C on the Renesas R-Car. This I2C hardware block can be found on various Renesas R-Car SoC series. It allows to perfom read and write on I2C buses in an interrupt based way on R-Car Gen3 H3ULCB board. Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-05-11 09:48:22 +02:00
/drivers/i2c/*rcar* @aaillet
drivers: i2s: Add LiteX I2S controller driver This introduces LiteX I2S driver supporting the following features: - 8,16,24,32 bit sample width, - mono/stereo sound, - different sample frequencies - big/little-endian data format, - concatenated channels mode (for selected sample widths only), - slave/master mode operation. Signed-off-by: Pawel Sagan <psagan@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-03-12 17:54:08 +01:00
/drivers/i2s/*litex* @mateusz-holenko @kgugala @pgielda
drivers: i2s: Add support for nRF I2S peripherals Add a shim that allows using the nrfx I2S driver via the Zephyr API. Add also missing devicetree nodes representing the I2S peripherals in the nRF52 Series SoCs. Extend the "nordic,nrf-i2s" binding with a new property that allows specifying the clock source to be used by the I2S peripheral (so that it is possible to use HFXO for better accurracy of the peripheral clock or, in the nRF53 Series SoCs, to use the dedicated audio oscillator). Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-04-13 15:00:03 +02:00
/drivers/i2s/i2s_ll_stm32* @avisconti
/drivers/i2s/*nrfx* @anangl
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/drivers/ieee802154/ @rlubos @tbursztyka
drivers: ieee802154: introduce new Telink B91 IEEE802154 driver IEEE802154 driver basic support for Telink B91 platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-29 14:53:57 +02:00
/drivers/ieee802154/*b91* @yurvyn
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/drivers/ieee802154/ieee802154_rf2xx* @tbursztyka @nandojve
drivers: ieee802154: cc13xx_cc26xx: use ti rf driver api This change reworks the cc13xx_cc26xx IEEE 802.15.4 driver to use the TI RF driver API that is available in modules/hal/ti. There are a number of benefits to using TI's API including - a stable multi-OS vendor library and API - API compatibility with the rest of the SimpleLink SDK and SoC family - potential multi-protocol & multi-client radio operation (e.g. both 15.4 and BLE) - coexistence support with other chipsets via gpio - vetted TI RF driver resources, such as - the radio command queue - highly tuned / coupled RTC & RAT (RAdio Timer) API Fixes #26312 Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-10-21 19:36:48 +02:00
/drivers/ieee802154/ieee802154_cc13xx* @bwitherspoon @cfriedt
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/drivers/interrupt_controller/ @dcpleung @nashif
CODEOWNERS: Add ARM GIC interrupt controller driver codeowner Add @stephanosio as a code owner for the ARM Generic Interrupt Controller (GIC) driver. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:31:04 +01:00
/drivers/interrupt_controller/intc_gic.c @stephanosio
esp32: drivers: interrupt_controller: add interrupt allocation support Add interrupt allocation support for ESP32. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-04-12 21:13:54 +02:00
/drivers/interrupt_controller/*esp32* @glaubermaroto
drivers: ipm: mhu: Add MHU driver for V2M Musca MHU (Message Handling Unit) enables software to raise interrupts to the processor cores. It is enabled in SSE 200 subsystems. This patch aims to implement inter processor communication. Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-01-18 16:06:48 +01:00
/drivers/ipm/ipm_mhu* @karl-zh
CODEOWNERS: add code owners for nRFx IPM driver We are adding code owners for the Nordic nRFx IPM driver files. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-11-11 16:44:16 +01:00
/drivers/ipm/Kconfig.nrfx @masz-nordic @ioannisg
/drivers/ipm/Kconfig.nrfx_ipc_channel @masz-nordic @ioannisg
CODEOWNERS: Add IPM ADSP driver code owner Auto assign to ipm_adsp.c as a code owner. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-08-07 12:13:24 +02:00
/drivers/ipm/ipm_intel_adsp.c @finikorg
ipm: add driver for the CAVS DSP Intra-DSP Communication (IDC) This adds a rather primitive driver for use with the Intra-DSP Communication (IDC) on the DSP on certain Intel SoCs. The IDC generates interrupts from one core to another by writing to certain registers. This is also being utilized as the scheduler IPI since it can interrupt other cores. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-02-27 03:11:44 +01:00
/drivers/ipm/ipm_cavs_idc* @dcpleung
CODEOWNERS: add code owners for nRFx IPM driver We are adding code owners for the Nordic nRFx IPM driver files. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-11-11 16:44:16 +01:00
/drivers/ipm/ipm_nrfx_ipc.c @masz-nordic @ioannisg
/drivers/ipm/ipm_nrfx_ipc.h @masz-nordic @ioannisg
CODEOWNERS: update arnop2 ownership name Following update of the Github username,replace owner from arnop2 to arnopo. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-12-06 17:00:08 +01:00
/drivers/ipm/ipm_stm32_ipcc.c @arnopo
CODEOWNERS: add owners for stm32 hsem ipm driver Add condeowner for STM32 HSEM IPM driver files. Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2021-08-03 04:34:30 +02:00
/drivers/ipm/ipm_stm32_hsem.c @cameled
CODEOWNERS: Remove myself of KSCAN and PS/2 subsytem codeowner Not enough time to review changes in these subsystems. Propose to have VenkatKotakonda as KSCAN subsystem owner instead. Adding SoC-specific driver owners. Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-06-25 23:47:51 +02:00
/drivers/kscan/ @VenkatKotakonda @franciscomunoz @scottwcpg
/drivers/kscan/*xec* @franciscomunoz @scottwcpg
/drivers/kscan/*ft5336* @MaureenHelm
drivers: ht16k33: convert keyscan driver from gpio API to kscan API Convert the keyscan portion of the Holtek HT16K33 driver to adhere to the kscan API instead of the GPIO API. When this driver was introduced the kscan API was not present. The keyscan driver was therefore implemented as a GPIO interrupt driver. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-06-14 22:58:56 +02:00
/drivers/kscan/*ht16k33* @henrikbrixandersen
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/led/ @Mani-Sadhasivam
CODEOWNERS: handle an account change s/mbolivar/mbolivar-nordic/ Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-17 16:40:58 +01:00
/drivers/led_strip/ @mbolivar-nordic
CODEOWNERS: Add entry for LoRa support Add CODEOWNERS entry for LoRa API, drivers and samples. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-07-22 17:12:47 +02:00
/drivers/lora/ @Mani-Sadhasivam
drivers: mbox: Introduce MBOX driver class One limitation of the current IPM API is that it is assuming that the hardware is only exporting one single channel through which the data can be sent or signalling can happen. If the hardware supports multiple channels, the IPM device must be instantiated (possibly in the DT) several times, one for each channel to be able to send data through multiple channels using the same hw peripheral. Also in the current IPM API only one callback can be registered, that means that only one driver is controlling all the signalling happening on all the channels. This patch is introducing a new MBOX API that is supporting multi-channel signalling and data exachange leveraging and extending the previous (and outdated) IPM API. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-10-15 11:55:56 +02:00
/drivers/mbox/ @carlocaione
CODEOWNERS: add myself to memc drivers Add myself to memc (memory controller) drivers. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-06 20:17:19 +01:00
/drivers/memc/ @gmarull
drv: display: Initial FT800 display driver This patch includes initial support for FT800 display driver. It includes basic features. It can be easily extended with more FT800 display list and co-processor features. Signed-off-by: Hubert Miś <hubert.mis@gmail.com>
2021-02-08 21:14:29 +01:00
/drivers/misc/ @tejlmand
/drivers/misc/ft8xx/ @hubertmis
CODEOWNERS: @LairdCP/zephyr team owns HL7800 Change owner of the HL7800 modem driver to the @LairdCP/zephyr team. Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-08-06 18:33:26 +02:00
/drivers/modem/hl7800.c @LairdCP/zephyr
/drivers/modem/Kconfig.hl7800 @LairdCP/zephyr
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/drivers/pcie/ @dcpleung @nashif @jhedberg
CODEOWNERS: aplhabetical sorting Some lines were not at the expected place. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-09-04 12:12:34 +02:00
/drivers/peci/ @albertofloyd @franciscomunoz @scottwcpg
CODEOWNERS: add myself to pinctrl Add myself as code owner for pinctrl drivers. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-09-15 16:34:37 +02:00
/drivers/pinctrl/ @gmarull
drivers: pinmux: introduce new Telink B91 Pinmux driver Pinmux driver basic support for new Telink B91 platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-09 10:45:23 +02:00
/drivers/pinmux/*b91* @yurvyn
arc: hsdk: add pinmux driver support and doc enhancement * add pinmux driver. hsdk board has arduino, mikrobus and pmod interfaces, which can be confiured for different function, such as: gpio, spi, uart, iic. * add introduction for arduino, mikrobus and pmod interfaces. Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2019-09-10 05:18:25 +02:00
/drivers/pinmux/*hsdk* @iriszzw
boards/riscv: add new riscv platform-it8xxx2 We create a new platform for our chip series it8xxx2. It is a riscv base soc. Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw>
2020-09-09 05:01:57 +02:00
/drivers/pinmux/*it8xxx2* @ite
esp32: drivers: pinmux: code refactoring to make use of Espressif's hal in order to ease both driver maintenance and code reuse between socs. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-08-11 18:56:53 +02:00
/drivers/pinmux/*esp32* @glaubermaroto
aarch64: pm_cpu_ops: Introduce pm_cpu_ops subsystem AArch64 has support for PSCI. This is especially useful for SMP because PSCI is used to power on the secordary cores. When the PSCI driver was introduced in Zephyr it was designed to rely on a very PSCI-centric subsystem / interface. There are two kinds of problems with this choice: 1. PSCI is only defined for the non-secure world and it is designed to boot CPU cores into non-secure state (that means that PSCI is only supposed to work if Zephyr is running in non-secure state) 2. There can be other ways or standards used to start / stop a core different from PSCI This patch is trying to fix the original wrong assumption by making the interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI only as an actual driver that is a user of this new interface / subsystem. For now the new subsystem is only exposing two methods: cpu_on and cpu_off, others will probably follow according to the needs. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-01 08:57:15 +01:00
/drivers/pm_cpu_ops/ @carlocaione
CODEOWNERS: Remove myself of KSCAN and PS/2 subsytem codeowner Not enough time to review changes in these subsystems. Propose to have VenkatKotakonda as KSCAN subsystem owner instead. Adding SoC-specific driver owners. Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-06-25 23:47:51 +02:00
/drivers/ps2/ @franciscomunoz @scottwcpg
/drivers/ps2/*xec* @franciscomunoz @scottwcpg
CODEOWNERS: PS/2: npcx: add owners for npcx PS/2 driver Add Nuvoton developers as code owners for npcx PS/2 driver. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2021-06-28 04:38:36 +02:00
/drivers/ps2/*npcx* @MulinChao @WealianLiao @ChiHuaL
drivers: pwm: introduce new Telink B91 PWM driver PWM driver basic support for Telink B91 SoC. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-27 11:39:02 +02:00
/drivers/pwm/*b91* @yurvyn
CODEOWNERS: take ownership of PWM capture helper functions Take ownership of the PWM capture helper functions. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-12-27 16:49:19 +01:00
/drivers/pwm/*rv32m1* @henrikbrixandersen
drivers: pwm: add a SAM0 TCC based PWM driver This runs the Timer/Counter for Control in 'normal' PWM mode. The number of channels and counter width depends on the device and is imported from DeviceTree. Signed-off-by: Michael Hope <mlhx@google.com>
2020-06-01 13:36:22 +02:00
/drivers/pwm/*sam0* @nzmichaelh
CODEOWNERS: Add reviewers on stm32 components Based on recent contributions, add reviewers on some STM32 components. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-09-04 13:49:30 +02:00
/drivers/pwm/*stm32* @gmarull
drivers: pwm: add driver for the Xilinx AXI Timer Add PWM controller driver for the Xilinx AXI Timer v2.0 IP. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-10-20 19:17:34 +02:00
/drivers/pwm/*xlnx* @henrikbrixandersen
CODEOWNERS: take ownership of PWM capture helper functions Take ownership of the PWM capture helper functions. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-12-27 16:49:19 +01:00
/drivers/pwm/pwm_capture.c @henrikbrixandersen
/drivers/pwm/pwm_shell.c @henrikbrixandersen
gecko pwm: add pwm driver for the gecko. pwm driver + Kconfig and Cmake files for the efr32 soc family. Signed-off-by: Sun Amar <sun681@gmail.com>
2021-03-21 23:18:04 +01:00
/drivers/pwm/*gecko* @sun681
ITE drivers/pwm: add PWM for it8xxx2 Add pulse width modulator (PWM) for it8xxx2. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-06-07 09:21:22 +02:00
/drivers/pwm/*it8xxx2* @RuibinChang
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 20:42:35 +02:00
/drivers/sensor/ @MaureenHelm
CODEOWNERS: Add codeowner for ams iAQcore and ENS210 Add @alexanderwachter as codeowner for AMS iAQcore and ENS210 Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-03-02 16:17:04 +01:00
/drivers/sensor/ams_iAQcore/ @alexanderwachter
/drivers/sensor/ens210/ @alexanderwachter
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/sensor/hts*/ @avisconti
/drivers/sensor/lis*/ @avisconti
/drivers/sensor/lps*/ @avisconti
/drivers/sensor/lsm*/ @avisconti
CODEOWNERS: Add codeowner for drivers/sensor/mpr Add myself as codeowner as this was not done in the initial PR for the mpr driver. Signed-off-by: Sven Herrmann <sven.herrmann@posteo.de>
2020-07-22 10:47:24 +02:00
/drivers/sensor/mpr/ @sven-hm
driver/sensor: add STTS751 temperature sensor Add support to STM STTS751 temperature sensor. Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-07-16 08:40:16 +02:00
/drivers/sensor/st*/ @avisconti
drivers: serial: introduce new Telink B91 Serial driver Serial driver basic support for new Telink B91 platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-09 10:46:07 +02:00
/drivers/serial/*b91* @yurvyn
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 15:25:23 +01:00
/drivers/serial/uart_altera_jtag_hal.c @nashif
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/drivers/serial/*ns16550* @dcpleung @nashif @jenmwms @aasthagr
CODEOWNERS: Add @Mierunski and @anangl for nRF UART drivers Add code owners for nRF UART drivers and the corresponding Kconfig file so that some reviewers are automatically assigned for these files. Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-04-09 11:07:06 +02:00
/drivers/serial/*nrfx* @Mierunski @anangl
drivers: serial: add LiteUART driver Add LiteX UART driver with bindings for this device. Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-03-28 14:37:03 +01:00
/drivers/serial/uart_liteuart.c @mateusz-holenko @kgugala @pgielda
CODEOWNERS: Add myself as the codeowner for imx8m evk and uart driver Add myself as the codeowner for imx8m evk and uart driver. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-11-23 14:33:16 +01:00
/drivers/serial/Kconfig.mcux_iuart @Mani-Sadhasivam
/drivers/serial/uart_mcux_iuart.c @Mani-Sadhasivam
drivers: serial: uart_rtt: Virtual UARTs over RTT channels Add support for virtual UART device that uses Segger RTT channels for data transfers. Due to the RTT principle, this driver supports only polling API. Signed-off-by: Pavel Kral <pavel.kral@omsquare.com>
2019-07-15 18:47:43 +02:00
/drivers/serial/Kconfig.rtt @carlescufi @pkral78
/drivers/serial/uart_rtt.c @carlescufi @pkral78
serial: Add Xilinx ZynqMP PS uart driver Add ZynqMP PS uart driver for Xilinx ZynqMP platform Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
2018-11-18 08:29:47 +01:00
/drivers/serial/Kconfig.xlnx @wjliang
/drivers/serial/uart_xlnx_ps.c @wjliang
drivers: serial: add driver for the Xilinx UART Lite IP Add serial driver for the Xilinx UART Lite IP. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-07-29 00:14:22 +02:00
/drivers/serial/uart_xlnx_uartlite.c @henrikbrixandersen
drivers: serial: add XMC seris UART support Add infineon XMC4 series UART support. Driver supports only poll mode using XMCLib. Out of 4 available UART's on SoC, only UART1 is confgired by default in UART mode until GPIO & pinctrl support. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-04-21 12:16:59 +02:00
/drivers/serial/*xmc4xxx* @parthitce
driver: serial: replace suffix nuvoton with numicro Replace the suffix "nuvoton" with "numicro" for Nuvoton microcontroller serial driver. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-07-20 08:25:53 +02:00
/drivers/serial/*numicro* @ssekar15
codeowners: add owner for SPARC Add myself as an owner for SPARC related files. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-02 15:38:36 +01:00
/drivers/serial/*apbuart* @martin-aberg
drivers: serial: add Renesas R-Car driver This patch add support for polling based UART on the Renesas R-Car SCIF (Serial Communication Interface with FIFO) This hardware block can be found on various Renesas R-Car SoC series. It allows to get console on R-Car Gen3 H3ULCB board. Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-05-06 12:32:25 +02:00
/drivers/serial/*rcar* @aaillet
drivers: serial: add a dummy driver for vnd,serial This commit adds a serial dummy driver compatible to vnd,serial. This is needed that devices can access the uart device in tests like tests/drivers/build_all/... . Add myself as codeowner to avoid complicance check failure. Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-08 17:15:52 +02:00
/drivers/serial/Kconfig.test @str4t0m
/drivers/serial/serial_test.c @str4t0m
drivers: serial: added minimal uart driver for esp32c3 based on uart rom functions, also enable console driver on top if this driver enabling logging Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-07-03 02:16:08 +02:00
/drivers/serial/*esp32c3* @uLipe
esp32s2: drivers: serial: add minimal uart driver based on uart rom functions, also enable console driver on top of this driver, which enables logging Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-08-05 19:05:18 +02:00
/drivers/serial/*esp32s2* @glaubermaroto
drivers: disk: cleanup after driver relocation Add common SDMMC_LOG_LEVEL and SDMMC_VOLUME_NAME. Initialize drivers at POST_KERNEL level. Update CODEOWNERS after sdmmc drivers relocation. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-02-24 09:56:01 +01:00
/drivers/disk/ @jfischer-no
/drivers/disk/sdmmc_sdhc.h @JunYangNXP
/drivers/disk/sdmmc_spi.c @JunYangNXP
/drivers/disk/usdhc.c @JunYangNXP
/drivers/disk/sdmmc_stm32.c @anthonybrandon
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/drivers/net/ @rlubos @tbursztyka
/drivers/ptp_clock/ @tbursztyka
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/spi/ @tbursztyka
drivers: spi: introduce new Telink B91 SPI driver SPI driver basic support for Telink B91 SoC. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-08-05 11:25:57 +02:00
/drivers/spi/*b91* @yurvyn
drivers: spi: rv32m1: Add driver for RV32M1 LPSPI Add SPI driver and bindings for LPSPI peripheral for the RV32M1 SOC. Based heavily on the existing mcux LPSPI driver. Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2019-08-07 17:13:35 +02:00
/drivers/spi/spi_rv32m1_lpspi* @karstenkoenig
esp32: drivers: spi: driver refactoring in preparation to support other esp32-family socs on top of existing driver. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-10-01 17:02:19 +02:00
/drivers/spi/*esp32* @glaubermaroto
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/drivers/timer/apic_timer.c @dcpleung @nashif
drivers/timer: Add x86 APIC TSC_DEADLINE driver Modern hardware all supports a TSC_DEADLINE mode for the APIC timer, where the same GHz-scale 64 bit TSC used for performance monitoring becomes the free-running counter used for cpu-local timer interrupts. Being a free running counter that does not need to be reset, it will not lose time in an interrupt. Being 64 bit, it needs no rollover or clamping logic in the driver when presented with a 32 bit tick count. Being a proper comparator, it will correctly trigger interrupts for times set "in the past" and thus needs no minimum/clamping logic. The counter is synchronized across the system architecturally (modulo one burp where firmware likes to change the adjustment value) so usage is SMP-safe by default. Access to the 64 bit counter and comparator value are single-instruction atomics even on 32 bit systems, so it beats even the RISC-V machine timer in complexity (which was our reigning champ for "simplest timer driver"). Really this is just ideal for Zephyr. So rather than try to add support for it to the existing APIC driver and increase complexity, make this a new standalone driver instead. All modern hardware has what it needs. The sole gotcha is that it's not easily emulatable (qemu supports it only under kvm where they can freeload on the host TSC) so it can be exercised only on hardware platforms right now. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-05-05 19:37:39 +02:00
/drivers/timer/apic_tsc.c @andyross
drivers: timer: Add per-core ARM architected timer ARM cores may have a per-core architected timer, which provides per-cpu timers, attached to a GIC to deliver its per-processor interrupts via PPIs. This is the most common case supported by QEMU in the virt platform. This patch introduces support for this timer abstracting the way the timer registers are actually accessed. This is needed because different architectures (for example ARMv7-R vs ARMv8-A) use different registers and even the same architecture (ARMv8-A) can actually use different timers (ELx physical timers vs ELx virtual timers). So we introduce the common driver here but the actual SoC / architecture / board must provide the three helpers (arm_arch_timer_set_compare(), arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file imported through the arch/cpu.h header file. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-10-27 17:12:58 +01:00
/drivers/timer/arm_arch_timer.c @carlocaione
CODEOWNERS: Adding missing code owner for Cortex-M SysTick driver Adding code-owner for the ARM Cortex-M SysTick-based timer driver. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-10 10:10:18 +02:00
/drivers/timer/cortex_m_systick.c @ioannisg
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 15:25:23 +01:00
/drivers/timer/altera_avalon_timer_hal.c @nashif
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 18:35:27 +01:00
/drivers/timer/riscv_machine_timer.c @kgugala @pgielda
boards/riscv: add new riscv platform-it8xxx2 We create a new platform for our chip series it8xxx2. It is a riscv base soc. Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw>
2020-09-09 05:01:57 +02:00
/drivers/timer/ite_it8xxx2_timer.c @ite
drivers: timer: xlnx_psttc_timer: Implement tickless support This commit reworks the Xilinx TTC timer driver to use the "match" mode instead of the "interval" mode which counts up to the specified value and resets to zero. Using the "match" mode ensures that the timer keeps counting even after an interrupt is triggered, and facilitates the tickless mode support implementation. This also allows `z_timer_cycle_get_32` to return the correct cycle count when interrupt is locked; thereby, fixing the k_busy_wait hang issue. Note that the TTC "match" mode emulation (and tickless timer operation) is only stable when the QEMU icount mode is enabled. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-18 05:47:19 +01:00
/drivers/timer/xlnx_psttc_timer* @wjliang @stephanosio
CODEOWNERS: Add entry for CC13x2/CC26x2 RTC timer driver Adding @vanti as an owner. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-09-19 19:23:03 +02:00
/drivers/timer/cc13x2_cc26x2_rtc_timer.c @vanti
timer: add CAVS DSP wall clock timer for Intel SoC The DSP wall clock timer on some Intel SoC is a timer driven directly by external oscillator and is external to the CPU core(s). It is not as fast as the internal core clock, but provides a common and synchronized counter for all CPU cores (which is useful for SMP). This uses the RISCV timer as base as it is using 64-bit counter. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 07:31:41 +01:00
/drivers/timer/cavs_timer.c @dcpleung
CODEOWNERS: Add reviewers on stm32 components Based on recent contributions, add reviewers on some STM32 components. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-09-04 13:49:30 +02:00
/drivers/timer/stm32_lptim_timer.c @FRASTM
codeowners: add owner for SPARC Add myself as an owner for SPARC related files. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-02 15:38:36 +01:00
/drivers/timer/leon_gptimer.c @martin-aberg
drivers: timer: add R-Car cmt driver Compare Match Timer is a 32 bit compare match timer that can be found on various Renesas R-Car SoC. Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-04-22 07:40:51 +02:00
/drivers/timer/rcar_cmt_timer.c @julien-massot
drivers: timer: esp32c3: add esp32c3 systimer driver to CODEOWNERS Also added maintainer to the entry Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com> Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-06-14 16:19:33 +02:00
/drivers/timer/esp32c3_sys_timer.c @uLipe
MAINTAINERS: Remove myself as a USB maintainer I have not had time to work with USB recently, so removing myself from MAINTAINERS and CODEOWNERS for the USB subsystem. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-03-08 13:40:06 +01:00
/drivers/usb/ @jfischer-no
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/drivers/usb/device/usb_dc_stm32.c @ydamigos @loicpoulain
CODEOWNERS: Add drivers/video path Add myself to owner of drivers/video. Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-07-01 17:29:42 +02:00
/drivers/video/ @loicpoulain
drivers: i2c: introduce new Telink B91 I2C driver I2C driver basic support for Telink B91 platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-30 15:50:39 +02:00
/drivers/i2c/*b91* @yurvyn
CODEOWNERS: stm32: Update on active members In early Zephyr days, STM32 code base greatly benefited from the care of a handful of people. These days are gone and so did these few people that haven't been contributing for at least a year now. CODEOWNERS file is updated to reflect current status of contribution, for the areas where the is an active contributor. Let them be thank for these initial contributions. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-08-28 09:20:21 +02:00
/drivers/i2c/i2c_ll_stm32* @ydamigos
drivers: i2c: rv32m1: add I2C driver for the RV32M1 RI5CY SoC Add driver and device tree binding for the Low Power Inter-Integrated Circuit (LPI2C) controllers found in the RV32M1 RI5CY SoC. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-04-01 21:09:44 +02:00
/drivers/i2c/i2c_rv32m1_lpi2c* @henrikbrixandersen
CODEOWNERS: Add ownership for SAM0 I2C driver Add myself as owner for the SAM0 I2C driver. Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-04-30 01:17:44 +02:00
/drivers/i2c/*sam0* @Sizurka
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 21:43:50 +02:00
/drivers/i2c/i2c_dw* @dcpleung
driver: i2c: Add TCA9546a I2C switch driver The driver only support use case where the channels are used in mutual exclusion. Origin: Original Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
2021-07-28 10:42:31 +02:00
/drivers/i2c/*tca9546a* @kurddt
drivers: watchdog: add system calls wdt_install_timeout() was skipped as it installs an ISR-context callback handler function. The rest are simple wrappers. Added myself as the maintainer of the syscall handlers. WDT subsystem appears to not currently have an owner. Fixes: #21432 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-12-16 21:15:45 +01:00
/drivers/*/*xec* @franciscomunoz @albertofloyd @scottwcpg
drivers/watchdog: Add support for SiLabs Gecko Watchdog Watchdog type is found on e.g. Pearl/Jade Gecko, often more than 1 is present. Driver supports timeout and (minimum) window configuration and reset or timeout interrupt support for now. Signed-off-by: Oane Kingma <o.kingma@interay.com>
2019-11-04 16:08:24 +01:00
/drivers/watchdog/*gecko* @oanerer
drivers: watchdog: implement SiFive FE310 watchdog driver This patch adds watchdog driver for HiFive1 rev.B that has SiFive Freedom E310 SoC. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2020-11-28 15:02:03 +01:00
/drivers/watchdog/*sifive* @katsuster
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/drivers/watchdog/wdt_handlers.c @dcpleung @nashif
drivers: watchdog: cc32xx: Add support Impelement watchdog for ti_cc32xx family Signed-off-by: Pavlo Hamov <pasha.gamov@gmail.com>
2021-02-17 16:07:08 +01:00
/drivers/watchdog/*cc32xx* @pavlohamov
ITE driver/watchdog: add watchdog timer for it8xxx2 Add watchdog timer for it8xxx2. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-01-20 08:29:19 +01:00
/drivers/watchdog/wdt_ite_it8xxx2.c @RuibinChang
/drivers/watchdog/Kconfig.it8xxx2 @RuibinChang
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/drivers/wifi/ @rlubos @tbursztyka @pfalcon
drivers: wifi: esp_at: rename driver from esp Recently WiFi ESP32 driver (utilizing WiFi radio in ESP32 SoC) was introduced into drivers/wifi/esp32/ and it already caused confusion as there was existing drivers/wifi/esp/ directory for ESP-AT driver (utilizing external WiFi chip, by communicating using AT commands from any serial capable platform). So question has arisen whether it is good to merge both, while they are totally different drivers. Rename ESP-AT driver to be placed in drivers/wifi/esp_at/, so that it is easier to figure out difference between "esp32" and "esp_at" just by looking at driver name. Rename also DT compatible and all Kconfig options for the same reason. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-05-06 10:51:46 +02:00
/drivers/wifi/esp_at/ @mniestroj
drivers: wifi: eswifi: Add uart bus interface Add uart bus interface to extended esWIFI driver. This enables all Inventek modules with IWIN AT Commands firmware. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-10-23 02:23:49 +02:00
/drivers/wifi/eswifi/ @loicpoulain @nandojve
codeowners: Add myself to winc1500 Add myself as code owner for winc1500 driver. Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
2020-10-08 10:38:09 +02:00
/drivers/wifi/winc1500/ @kludentwo
CODEOWNERS: Adding /drivers/virtualization owner Adding myself there. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-12-16 16:11:07 +01:00
/drivers/virtualization/ @tbursztyka
CODEOWNERS: Add evgeniy-paltsev as an ARC part owner Add @evgeniy-paltsev as an ARC part owner in addition to @abrodkin and @ruuddw, so he will be chosen as a reviewer automatically. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-22 17:46:53 +01:00
/dts/arc/ @abrodkin @ruuddw @iriszzw @evgeniy-paltsev
dts: arm: s76s: add AcSIP S76S SiP support The AcSIP S76S is a STM32L073+SX1276+PA SoC which supports LoRa communications. Signed-off-by: Dean Weiten <dmw@weiten.com>
2021-01-28 05:54:09 +01:00
/dts/arm/acsip/ @NorthernDean
CODEOWNERS: add owner for the same4 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-11-04 23:43:05 +01:00
/dts/arm/atmel/sam4e* @nandojve
dts: arm: atmel: Introduce sam4l SoC Introduce SAM4L SoC device tree definitions. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-18 22:04:45 +01:00
/dts/arm/atmel/sam4l* @nandojve
CODEOWNERS: Add code ownership for Atmel samr21 code Take ownership of external SDK files. Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2019-03-05 19:26:41 +01:00
/dts/arm/atmel/samr21.dtsi @benpicco
soc: atmel_sam0: Add SAME54 This adds supoprt for the Atmel SAME54 SoC. The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts. Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2019-03-14 15:18:59 +01:00
/dts/arm/atmel/sam*5*.dtsi @benpicco
CODEOWNERS: Add SAM E70 code owner Add @nandojve, the SAM V71 platform maintainer, as a code owner for the SAM E70 platform, as these two platforms share the same base and are practically identical. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-24 08:40:45 +01:00
/dts/arm/atmel/same70* @nandojve
CODEOWNERS: add owner for the samv71 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-12-12 02:50:06 +01:00
/dts/arm/atmel/samv71* @nandojve
dts: atmel sam: Add pinctrl support for SAM UART and USART Add pinctl support for the SAM UART and SAM USART devices. We update the UART and USART bindings to have pinctrl-0 bindings that are expected to have 2 phandles to the RX & TX pinctrl nodes. The pinctrl nodes will have an 'atmel,pins' property that describes the GPIO port, pin and periphal configuration for that pin. We add sam*-pinctrl.dtsi files with all the various pin ctrl configuration operations supported by the given SoC family. These files are based on data extracted from the Atmel ASF HAL (in include/sam<FAMILY>/pio/*.h). Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-07 15:19:32 +02:00
/dts/arm/atmel/ @galak
arm: Add Broadcom Valkyrie SoC support Add initial support for Broadcom Valkyrie SoC as part of Zephyr. Signed-off-by: Scott Branden <scott.branden@broadcom.com>
2020-01-08 22:18:10 +01:00
/dts/arm/broadcom/ @sbranden
dts: arm: cypress: Introduce PSoC-6 pinctrl Introduce PSoC-6 pinctrl infraestructure and definitions. This add files to handle devicetree entries and following modifications: - add pinctrl bindings - update gpio bindings with pin-cells - add pinctrl node and move gpio nodes inside - declare pinctrl for current uart entries Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-03-03 02:38:08 +01:00
/dts/arm/cypress/ @nandojve
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 19:29:24 +02:00
/dts/arm/gigadevice/ @nandojve
soc: arm: add infineon_xmc series support Add infineon xmc series with XMC4500 support. XMC series comes with, - CPU operates upto 120MHz - 3 RAM (PSRAM1 - code, DSRAM1 - data and DSRAM2 - communiation) - upto 1MB flash init: clock control & gpio is not done, so SoC initialization directly relies on HAL. Core operating clock is stored in no_init section, which is kept under DSRAM1. Only DSRAM1 is used until clock support. Using PSRAM1 and DSRAM1 needs adaptation in linker script - planned for next revision. Note: SystemInit cannot be consumed directly due to vector table + HAL linker dependency. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-04-21 11:37:42 +02:00
/dts/arm/infineon/ @parthitce
arm/arm64: Fix misc and trivials for ARM/ARM64 split Fix the header guards, comments, github labeler, CODEOWNERS and MAINTAINERS files. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-26 15:22:59 +01:00
/dts/arm64/ @carlocaione
dts: arm64: Add dtsi and dts binding for cortex-R82 Add armv8-r dtsi. Add dts binding yaml file for cortex-R82. Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2020-11-24 06:37:22 +01:00
/dts/arm64/armv8-r.dtsi @povergoing
board: nxp_ls1046ardb: add 2 cores smp for running in Jailhouse 1. add a seperate 2 cores SMP board configuration to run in Jailhouse inmate Cell, root Cell Linux will use Core0 and Core1, Zephyr will run on Core2 and Core3. 2. Refine the code of dts, move SoC common dts nodes into dtsi fiel in dts/arm64/nxp/ directory. 3. Add myself to be code owner of directory dts/arm64/nxp/. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-04-20 05:48:00 +02:00
/dts/arm64/nxp/ @JiafeiPan
dts: add EOS S3 devicetree Add basic devicetree for EOS S3 SoCs. Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
2020-01-15 17:08:15 +01:00
/dts/arm/quicklogic/ @wtatarski @kowalewskijan @kgugala
dts: arm: introduce seeed lora-e5 module This commit adds the dts definitons for the seeed lora-e5 module. Additionally I add myself as codeowner for the new dts/arm/seeed directory. This module packages a stm32wle5jc Sub-GHz Wireless Soc, together with a 32MHz TCXO, a 32.768KHz crystal oscillator, and power and RF circuitry. With the introduction of lora support definitions for the radio will be added in a future commit. Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-06-29 15:25:27 +02:00
/dts/arm/seeed/ @str4t0m
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/dts/arm/st/ @erwango
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 18:47:13 +02:00
/dts/arm/ti/cc13?2* @bwitherspoon
/dts/arm/ti/cc26?2* @bwitherspoon
dts: arm: add device tree file for TI CC3235SF This dtsi file adds definitions for memory regions on the SoC. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-04-26 00:37:55 +02:00
/dts/arm/ti/cc3235* @vanti
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/dts/arm/nordic/ @ioannisg @carlescufi
CODEOWNERS: add code owners to dts/arm/nuvoton/ Move @MulinChao, @WealianLiao, and myself from code owners entry dts/arm/nuvoton/npcx to dts/arm/nuvoton. So we will be chosen as reviewers automatically when dtsi files under dts/arm/nuvoton are touched. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2021-07-19 10:08:20 +02:00
/dts/arm/nuvoton/ @ssekar15 @MulinChao @WealianLiao @ChiHuaL
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/dts/arm/nxp/ @mmahadevan108 @dleach02
dts : arm : Add Microchip MEC1501 SoC device tree Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupts are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 00:05:35 +02:00
/dts/arm/microchip/ @franciscomunoz @albertofloyd @scottwcpg
soc: silabs_exx32: Add support for SiLabs EFM32PG1B SoC This commit adds support for Silicon Labs EFM32PG1B (Pearl Gecko) SoC. Signed-off-by: Rafael Dias Menezes <rdmeneze@gmail.com>
2021-01-09 14:14:16 +01:00
/dts/arm/silabs/efm32_pg_1b.dtsi @rdmeneze
boards/arm: Add initial support for SiLabs Giant Gecko GG11 STK This commit adds initial support for the Silicon Labs EFM32 Giant Gecko GG11 StarterKit. Features supported for now are NVIC, SysTick, GPIO, Flash, Counter, I2C, UART and Ethernet. Support for Watchdog and ADC will follow as soon as their respective PRs are merged. Signed-off-by: Oane Kingma <o.kingma@interay.com>
2019-11-29 21:32:13 +01:00
/dts/arm/silabs/efm32gg11b* @oanerer
arm: exx32: Add Silabs EFM32JG12B soc files The Silicon Labs EFM32 Jade Gecko MCU includes: * Cortex-M3 core at 40MHz * up to 1024KB of flash and 256KB of RAM * multiple low power peripherals This is basically the same as the EFM32 Pearl Gecko, but with an ARM Cortex-M3 core instead of a Cortex-M4F. Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2019-12-04 10:38:47 +01:00
/dts/arm/silabs/efm32_jg_pg* @chrta
soc: silabs_exx32: Add support for SiLabs EFR32BG13P SoC This commit adds support for Silicon Labs EFR32BG13P (Blue Gecko) SoC. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-01-26 22:37:50 +01:00
/dts/arm/silabs/efr32bg13p* @mnkp
soc: silabs_exx32: Add support for EFR32FG13P SoC This commit adds support for Silicon Labs EFR32FG13P (Flex Gecko) SoC. Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2021-03-15 22:52:53 +01:00
/dts/arm/silabs/efr32xg13p* @mnkp
arm: exx32: Add Silabs EFM32JG12B soc files The Silicon Labs EFM32 Jade Gecko MCU includes: * Cortex-M3 core at 40MHz * up to 1024KB of flash and 256KB of RAM * multiple low power peripherals This is basically the same as the EFM32 Pearl Gecko, but with an ARM Cortex-M3 core instead of a Cortex-M4F. Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2019-12-04 10:38:47 +01:00
/dts/arm/silabs/efm32jg12b* @chrta
/dts/arm/silabs/efm32pg12b* @chrta
soc: silabs_exx32: Add support for SiLabs EFM32PG1B SoC This commit adds support for Silicon Labs EFM32PG1B (Pearl Gecko) SoC. Signed-off-by: Rafael Dias Menezes <rdmeneze@gmail.com>
2021-01-09 14:14:16 +01:00
/dts/arm/silabs/efm32pg1b* @rdmeneze
soc: silabs_exx32: Add support for SiLabs EFR32MG21 SoC This commit adds support for Silicon Labs EFR32MG21 (Mighty Gecko) SoC. Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
2020-07-13 17:31:19 +02:00
/dts/arm/silabs/efr32mg21* @l-alfred
soc: silabs_exx32: Add support for EFR32FG13P SoC This commit adds support for Silicon Labs EFR32FG13P (Flex Gecko) SoC. Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2021-03-15 22:52:53 +01:00
/dts/arm/silabs/efr32fg13* @yonsch
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 18:35:27 +01:00
/dts/riscv/ @kgugala @pgielda
boards/riscv: add new riscv platform-it8xxx2 We create a new platform for our chip series it8xxx2. It is a riscv base soc. Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw>
2020-09-09 05:01:57 +02:00
/dts/riscv/it8xxx2.dtsi @ite
riscv32: rename to riscv With the upcoming riscv64 support, it is best to use "riscv" as the subdirectory name and common symbols as riscv32 and riscv64 support code is almost identical. Then later decide whether 32-bit or 64-bit compilation is wanted. Redirects for the web documentation are also included. Then zephyrbot complained about this: " New files added that are not covered in CODEOWNERS: dts/riscv/microsemi-miv.dtsi dts/riscv/riscv32-fe310.dtsi Please add one or more entries in the CODEOWNERS file to cover those files " So I assigned them to those who created them. Feel free to readjust as necessary. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-17 19:17:05 +02:00
/dts/riscv/microsemi-miv.dtsi @galak
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/dts/riscv/rv32m1* @dleach02
riscv32: rename to riscv With the upcoming riscv64 support, it is best to use "riscv" as the subdirectory name and common symbols as riscv32 and riscv64 support code is almost identical. Then later decide whether 32-bit or 64-bit compilation is wanted. Redirects for the web documentation are also included. Then zephyrbot complained about this: " New files added that are not covered in CODEOWNERS: dts/riscv/microsemi-miv.dtsi dts/riscv/riscv32-fe310.dtsi Please add one or more entries in the CODEOWNERS file to cover those files " So I assigned them to those who created them. Feel free to readjust as necessary. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-17 19:17:05 +02:00
/dts/riscv/riscv32-litex-vexriscv.dtsi @mateusz-holenko @kgugala @pgielda
boards: risc-v: add BeagleV Starlight JH7100 board support Adding support for beagleV Starlight board based on Starfive JH7100 SoC. It's a base support, no drivers other than uart has been tested. Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal49@gmail.com>
2021-05-18 02:57:18 +02:00
/dts/riscv/starfive/ @rajnesh-kanwal
codeowners: add owners to andes_v5 soc, board, dts, and drivers. Add myself and Teng-Shih-Wei as owners for andes_v5 soc series, dts, adp_xc7k_ae350 board, and device drivers from Andes. Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-07-02 08:42:45 +02:00
/dts/riscv/andes_v5* @cwshu @Teng-Shih-Wei
arch: arm: Add initial support for Cortex-M55 Core Add initial support for the Cortex-M55 Core which is an implementation of the Armv8.1-M mainline architecture and includes support for the M‑profile Vector Extension (MVE). The support is based on the Cortex-M33 support that already exists in Zephyr. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-13 22:07:37 +01:00
/dts/arm/armv*m.dtsi @galak @ioannisg
CODEOWNERS: Add Cortex-R arch codeowner Add @stephanosio as a code owner for the Cortex-R architecture-related directories and files. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:28:21 +01:00
/dts/arm/armv7-r.dtsi @bbolen @stephanosio
CODEOWNERS: Add Xilinx ZynqMP platform codeowner Add @stephanosio as a code owner for the Xilinx ZynqMP platform, which is used as the primary testing platform for the Cortex-R architecture. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:35:44 +01:00
/dts/arm/xilinx/ @bbolen @stephanosio
soc: arm: add Renesas rcar_gen3 series support Most of the Renesas RCar Gen3 based SoC contains a Cortex R7 processor. This processor has access to the same memory mapped devices than the Cortex-A5x cores. - CPU operates upto 800MHz - Can use ram area from 0x40040000 to 0x42000000 - Has 512 interrupts on GIC-400 compliant with Arm GICv2 Add support for r8a77951 as first SoC of this series which is also known as H3 ES2.0 and is present present on different boards such as Salvator and R-Car Starter Kit(H3ulcb). This first SoC definition is just enough to print Hello World in a ram console. Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-01-13 09:38:41 +01:00
/dts/arm/renesas/ @julien-massot
CODEOWNERS: Add missing x86 entries Add a new entry for x86 DTS files and add Johan to x86 architecture changes. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2020-12-10 20:07:32 +01:00
/dts/x86/ @jhedberg
dts: Restructure xtensa dts directory Restructure xtensa dts directory Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-16 13:17:06 +02:00
/dts/xtensa/xtensa.dtsi @ydamigos
CODEOWNERS: Add @dcpleung as owner for /dts/xtensa/intel/ Add Daniel Leung as code owner for all Intel xtensa dts files. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-12-20 12:26:33 +01:00
/dts/xtensa/intel/ @dcpleung
soc: esp32s2: add initial soc support files for esp32s2 by adding specific soc files for esp32s2 bring-up, such as: - linker script - soc initialization code - initial device tree source files - esp32s2 saola board support. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-09 23:26:11 +02:00
/dts/xtensa/espressif/ @glaubermaroto
CODEOWNERS: add codeowner for SOF with Zephyr on NXP i.MX8 Add myself and Daniel Baluta as codeowners for i.MX8 related files for SOF with Zephyr OS. Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-07-05 18:11:35 +02:00
/dts/xtensa/nxp/ @iuliana-prodan @dbaluta
codeowners: add owner for SPARC Add myself as an owner for SPARC related files. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-02 15:38:36 +01:00
/dts/sparc/ @martin-aberg
CODEOWNERS: add owner for /dts/bindings/ @galak is now the proud owner of /dts/bindings/. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-03-28 14:13:40 +01:00
/dts/bindings/ @galak
CODEOWNERS: fix 3 check-compliance.py issues not reported by github - PR #13722 moved 3 gen_*.py to /arch/x86/ without updating CODEOWNERS - PR #13745 forgot a trailing slash in /dts/bindings/can - PR #13675 forgot a trailing slash in /samples/boards/intel_s1000_crb No idea why github doesn't keep reporting these every time and impossible to tell as CI hides most of its logs. Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2019-03-01 05:56:55 +01:00
/dts/bindings/can/ @alexanderwachter
dts: bindings: fix file names Make sure binding file names match their compatibles. Done with a script. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-10-19 18:39:01 +02:00
/dts/bindings/i2c/zephyr*i2c-emul*.yaml @sjg20
dts: bindings: move ADC devicetree bindings to top level Move the devicetree bindings for Analog-to-Digital Converters (ADCs) from dts/bindings/iio/adc to dts/bindings/adc as Zephyr does not have an IIO layer. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-09-21 11:34:52 +02:00
/dts/bindings/adc/st*stm32-adc.yaml @cybertale
CODEOWNERS: @LairdCP/zephyr team owns HL7800 Change owner of the HL7800 modem driver to the @LairdCP/zephyr team. Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-08-06 18:33:26 +02:00
/dts/bindings/modem/*hl7800.yaml @LairdCP/zephyr
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/dts/bindings/serial/ns16550.yaml @dcpleung @nashif
drivers: wifi: esp_at: rename driver from esp Recently WiFi ESP32 driver (utilizing WiFi radio in ESP32 SoC) was introduced into drivers/wifi/esp32/ and it already caused confusion as there was existing drivers/wifi/esp/ directory for ESP-AT driver (utilizing external WiFi chip, by communicating using AT commands from any serial capable platform). So question has arisen whether it is good to merge both, while they are totally different drivers. Rename ESP-AT driver to be placed in drivers/wifi/esp_at/, so that it is easier to figure out difference between "esp32" and "esp_at" just by looking at driver name. Rename also DT compatible and all Kconfig options for the same reason. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-05-06 10:51:46 +02:00
/dts/bindings/wifi/*esp-at.yaml @mniestroj
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 19:29:24 +02:00
/dts/bindings/*/*gd32* @nandojve
CODEOWNERS: Add reviewers on Nuvoton NPCX series. Adding Nuvoton developers as reviewers on NPCX EC (Embedded Controller) SoC, device-tree, and driver sources. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-02-18 06:43:16 +01:00
/dts/bindings/*/*npcx* @MulinChao @WealianLiao @ChiHuaL
dts: arm: cypress: Introduce PSoC-6 pinctrl Introduce PSoC-6 pinctrl infraestructure and definitions. This add files to handle devicetree entries and following modifications: - add pinctrl bindings - update gpio bindings with pin-cells - add pinctrl node and move gpio nodes inside - declare pinctrl for current uart entries Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-03-03 02:38:08 +01:00
/dts/bindings/*/*psoc6* @nandojve
dts: nrf: Temp device node added to nRF5 devices with yaml binding 1. Temp device node added to all nRF5 DTSI files. 2. Added yaml binding for Nordic Temp node. 3. Set codeowner of nordic dts bindings to @anangl Signed-off-by: Gaute Gamnes <gaute.gamnes@nordicsemi.no>
2019-02-14 09:44:04 +01:00
/dts/bindings/*/nordic* @anangl
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 16:23:57 +02:00
/dts/bindings/*/nxp* @mmahadevan108 @dleach02
/dts/bindings/*/openisa* @dleach02
CODEOWNERS: remove use of commas Commas are not allowed in this file and prevents parsing by github. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 21:27:44 +02:00
/dts/bindings/*/st* @erwango
/dts/bindings/sensor/ams* @alexanderwachter
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 18:35:27 +01:00
/dts/bindings/*/sifive* @mateusz-holenko @kgugala @pgielda
drivers: serial: add LiteUART driver Add LiteX UART driver with bindings for this device. Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-03-28 14:37:03 +01:00
/dts/bindings/*/litex* @mateusz-holenko @kgugala @pgielda
drivers: interrupt_controller: add LiteX interrupt controller driver Add LiteX interrupt controller driver and bindings for this device. Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-03-28 14:44:12 +01:00
/dts/bindings/*/vexriscv* @mateusz-holenko @kgugala @pgielda
codeowners: add owners to andes_v5 soc, board, dts, and drivers. Add myself and Teng-Shih-Wei as owners for andes_v5 soc series, dts, adp_xc7k_ae350 board, and device drivers from Andes. Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-07-02 08:42:45 +02:00
/dts/bindings/*/andes* @cwshu @Teng-Shih-Wei
CODEOWNERS: take ownership of neorv32 specific files Take ownership of all the neorv32 specific files (dts bindings, soc implementation, drivers, and board definition). Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-08-26 19:57:56 +02:00
/dts/bindings/*/neorv32* @henrikbrixandersen
aarch64: pm_cpu_ops: Introduce pm_cpu_ops subsystem AArch64 has support for PSCI. This is especially useful for SMP because PSCI is used to power on the secordary cores. When the PSCI driver was introduced in Zephyr it was designed to rely on a very PSCI-centric subsystem / interface. There are two kinds of problems with this choice: 1. PSCI is only defined for the non-secure world and it is designed to boot CPU cores into non-secure state (that means that PSCI is only supposed to work if Zephyr is running in non-secure state) 2. There can be other ways or standards used to start / stop a core different from PSCI This patch is trying to fix the original wrong assumption by making the interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI only as an actual driver that is a user of this new interface / subsystem. For now the new subsystem is only exposing two methods: cpu_on and cpu_off, others will probably follow according to the needs. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-01 08:57:15 +01:00
/dts/bindings/pm_cpu_ops/* @carlocaione
CODEOWNERS: add code owner for Xilinx GEM driver Add the code owner entries for all files related to the Xilinx GEM Ethernet device driver. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-06-23 17:13:00 +02:00
/dts/bindings/ethernet/*gem.yaml @ibirnbaum
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/dts/posix/ @aescolar @vanwinkeljan @daor-oti
dts : bindings : sensor : bme680 Added support for BME680 Added support to the dts for the BME680 Environmental sensor Signed-off-by: Bosch Sensortec <github@bosch-sensortec.com>
2018-09-27 19:16:44 +02:00
/dts/bindings/sensor/*bme680* @BoschSensortec
CODEWONERS: syntax fix: Remove comma A comma was added to a new path in 9dbdd81abe22dcbc671ea066cfdfc041d71f3c83 But GitHub's CODEOWNERS parsing cannot handle commas in paths => Remove it Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-07-04 08:56:57 +02:00
/dts/bindings/sensor/st* @avisconti
CODEOWNERS: Add code owner for dts/common Add @galak as codeowner for dts/common Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-20 18:44:00 +02:00
/dts/common/ @galak
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/ @nashif @carlescufi @galak @MaureenHelm
drivers: clock control: Add LiteX clock control driver This commit adds LiteX SoC Builder clock control driver for MMCM module. It gives ability to change frequency, phase and duty cycle on up to 7 clock outputs. Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-05-11 13:48:44 +02:00
/include/drivers/*/*litex* @mateusz-holenko @kgugala @pgielda
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/drivers/adc.h @anangl
/include/drivers/can.h @alexanderwachter
/include/drivers/counter.h @nordic-krch
drivers: dac: Add API for DAC peripherals DAC (digital to analog converter) peripheral driver with a generic API suitable for most MCUs (only basic DAC features considered). Signed-off-by: Martin Jäger <martin@libre.solar>
2020-01-10 10:10:12 +01:00
/include/drivers/dac.h @martinjaeger
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/drivers/display.h @vanwinkeljan
drivers: espi: move header to include/drivers Driver APIs need to go into include/drivers/. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-10-01 16:49:26 +02:00
/include/drivers/espi.h @albertofloyd @franciscomunoz @scottwcpg
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/drivers/bluetooth/ @joerchan @jhedberg @Vudentz
CODEOWNERS: extend flash driver ownership Added @nvlsianpu as flash and nrf-flash maintainer Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-10-10 11:14:10 +02:00
/include/drivers/flash.h @nashif @carlescufi @galak @MaureenHelm @nvlsianpu
emul: i2c: Add support for I2C emulators Add an emulation controller which routes I2C traffic to attached emulators depending on the I2C address selected. This allows drivers for I2C peripherals to be tested on systems that don't have that peripheral attached, with the emulator handling the I2C traffic. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-08-20 16:14:35 +02:00
/include/drivers/i2c_emul.h @sjg20
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/drivers/led/ht16k33.h @henrikbrixandersen
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/include/drivers/interrupt_controller/ @dcpleung @nashif
CODEOWNERS: Add ARM GIC interrupt controller driver codeowner Add @stephanosio as a code owner for the ARM Generic Interrupt Controller (GIC) driver. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 09:31:04 +01:00
/include/drivers/interrupt_controller/gic.h @stephanosio
CODEOWNERS: @LairdCP/zephyr team owns HL7800 Change owner of the HL7800 modem driver to the @LairdCP/zephyr team. Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-08-06 18:33:26 +02:00
/include/drivers/modem/hl7800.h @LairdCP/zephyr
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/include/drivers/pcie/ @dcpleung
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/drivers/hwinfo.h @alexanderwachter
/include/drivers/led.h @Mani-Sadhasivam
CODEOWNERS: handle an account change s/mbolivar/mbolivar-nordic/ Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-17 16:40:58 +01:00
/include/drivers/led_strip.h @mbolivar-nordic
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 12:53:50 +02:00
/include/drivers/sensor.h @MaureenHelm
/include/drivers/spi.h @tbursztyka
CODEOWNERS: Add entry for LoRa support Add CODEOWNERS entry for LoRa API, drivers and samples. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-07-22 17:12:47 +02:00
/include/drivers/lora.h @Mani-Sadhasivam
API: peci: Add Platform Environment Control Interface API Add Platform Environment Control Interface API This API defines following calls: - peci_configure - peci_enable - peci_disable - peci_transaction Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-01-24 01:34:57 +01:00
/include/drivers/peci.h @albertofloyd @franciscomunoz @scottwcpg
aarch64: pm_cpu_ops: Introduce pm_cpu_ops subsystem AArch64 has support for PSCI. This is especially useful for SMP because PSCI is used to power on the secordary cores. When the PSCI driver was introduced in Zephyr it was designed to rely on a very PSCI-centric subsystem / interface. There are two kinds of problems with this choice: 1. PSCI is only defined for the non-secure world and it is designed to boot CPU cores into non-secure state (that means that PSCI is only supposed to work if Zephyr is running in non-secure state) 2. There can be other ways or standards used to start / stop a core different from PSCI This patch is trying to fix the original wrong assumption by making the interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI only as an actual driver that is a user of this new interface / subsystem. For now the new subsystem is only exposing two methods: cpu_on and cpu_off, others will probably follow according to the needs. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-01 08:57:15 +01:00
/include/drivers/pm_cpu_ops.h @carlocaione
/include/drivers/pm_cpu_ops/ @carlocaione
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/include/app_memory/ @dcpleung
CODEOWNERS: Add evgeniy-paltsev as an ARC part owner Add @evgeniy-paltsev as an ARC part owner in addition to @abrodkin and @ruuddw, so he will be chosen as a reviewer automatically. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-22 17:46:53 +01:00
/include/arch/arc/ @abrodkin @ruuddw @evgeniy-paltsev
/include/arch/arc/arch.h @abrodkin @ruuddw @evgeniy-paltsev
/include/arch/arc/v2/irq.h @abrodkin @ruuddw @evgeniy-paltsev
arch: arm: Move ARM code to AArch32 sub-directory Before introducing the code for ARM64 (AArch64) we need to relocate the current ARM code to a new AArch32 sub-directory. For now we can assume that no code is shared between ARM and ARM64. There are no functional changes. The code is moved to the new location and the file paths are fixed to reflect this change. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-09 18:49:36 +01:00
/include/arch/arm/aarch32/ @MaureenHelm @galak @ioannisg
arch: arm: aarch32: Rename `cortex_r` to `cortex_a_r` This commit renames the `cortex_r` directory under the AArch32 to `cortex_a_r`, in preparation for the AArch32 Cortex-A support. The rationale for this renaming is that the Cortex-A and Cortex-R share the same base design and the difference between them, other than the MPU vs. MMU, is minimal. Since most of the architecture port code and configurations will be shared between the Cortex-A and Cortex-R architectures, it is advantageous to have them together in the same directory. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-22 15:19:22 +01:00
/include/arch/arm/aarch32/cortex_a_r/ @stephanosio
arm/arm64: Fix misc and trivials for ARM/ARM64 split Fix the header guards, comments, github labeler, CODEOWNERS and MAINTAINERS files. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-26 15:22:59 +01:00
/include/arch/arm64/ @carlocaione
include: arm64: Add mpu data struct definition According to Armv8-R64 Spec, MPU related meta data(region base/limit) is 64 bits. So we need to re-define MPU related data structure here. Signed-off-by: Haibo Xu <haibo.xu@arm.com> Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2021-03-04 07:28:43 +01:00
/include/arch/arm64/cortex_r/ @povergoing
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/include/arch/arm/aarch32/irq.h @carlocaione
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 15:25:23 +01:00
/include/arch/nios2/ @nashif
/include/arch/nios2/arch.h @nashif
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/include/arch/posix/ @aescolar @daor-oti
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 18:35:27 +01:00
/include/arch/riscv/ @kgugala @pgielda
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/include/arch/x86/ @jhedberg @dcpleung
/include/arch/common/ @andyross @nashif
/include/arch/xtensa/ @andyross @dcpleung
codeowners: add owner for SPARC Add myself as an owner for SPARC related files. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-02 15:38:36 +01:00
/include/arch/sparc/ @martin-aberg
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/include/sys/atomic.h @andyross
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/include/bluetooth/ @joerchan @jhedberg @Vudentz
Bluetooth: Audio: Add maintainers/codeowners Add Thalley (emil.gydesen@nordicsemi.no) and asbjornsabo (asbjorn.sabo@nordicsemi.no) as additional maintainers/codeowners for bluetooth audio. (Also adds empty audio.h file, that will later be expanded, so that the include/bluetooth/audio directory now listed in CODEOWNERS actually exists.) Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
2021-03-04 16:17:11 +01:00
/include/bluetooth/audio/ @joerchan @jhedberg @Vudentz @Thalley @asbjornsabo
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/include/cache.h @carlocaione @andyross
canbus: canopen: add object dictionary storage Add support for storing the CANopen object dictionary to non-volatile storage. This fixes #15278. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-09-26 15:06:55 +02:00
/include/canbus/ @alexanderwachter
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 15:25:23 +01:00
/include/tracing/ @nashif
CODEOWNERS: adapt for debug and tracing add subsys/tracing and include/tracing and drivers/debug Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-07 03:00:50 +01:00
/include/debug/ @nashif
debug/coredump: add a primitive coredump mechanism This adds a very primitive coredump mechanism under subsys/debug where during fatal error, register and memory content can be dumped to coredump backend. One such backend utilizing log module for output is included. Once the coredump log is converted to a binary file, it can be used with the ELF output file as inputs to an overly simplified implementation of a GDB server. This GDB server can be attached via the target remote command of GDB and will be serving register and memory content. This allows using GDB to examine stack and memory where the fatal error occurred. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-08-07 19:47:37 +02:00
/include/debug/coredump.h @dcpleung
codeowners: Add myself to gdbstub Add myself as code owner for gdbstub. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-16 18:38:09 +02:00
/include/debug/gdbstub.h @ceolin
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 15:25:23 +01:00
/include/device.h @tbursztyka @nashif
CODEOWNERS: devicetree updates Update maintainers for code and docs. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-20 17:17:16 +01:00
/include/devicetree.h @galak
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/display/ @vanwinkeljan
drivers: clock_control: mcux_mcg: add driver for NXP Kinetis MCG Add driver shim for the NXP Kinetis Multipurpose Clock Generator (MCG) module. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-05-19 23:39:32 +02:00
/include/dt-bindings/clock/kinetis_mcg.h @henrikbrixandersen
soc: arm: ke1xf: add NXP Kinetis KE1xF SoC series support Add initial support for the NXP Kinetis KE1xF SoC series (MKE14F16, MKE16F16, and MKE18F16). Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-05-05 00:01:56 +02:00
/include/dt-bindings/clock/kinetis_scg.h @henrikbrixandersen
CODEOWNERS: add code owner for Xilinx GEM driver Add the code owner entries for all files related to the Xilinx GEM Ethernet device driver. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-06-23 17:13:00 +02:00
/include/dt-bindings/ethernet/xlnx_gem.h @ibirnbaum
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/include/dt-bindings/pcie/ @dcpleung
ITE drivers/pwm: add PWM for it8xxx2 Add pulse width modulator (PWM) for it8xxx2. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-06-07 09:21:22 +02:00
/include/dt-bindings/pwm/*it8xxx2* @RuibinChang
MAINTAINERS: Remove myself as a USB maintainer I have not had time to work with USB recently, so removing myself from MAINTAINERS and CODEOWNERS for the USB subsystem. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-03-08 13:40:06 +01:00
/include/dt-bindings/usb/usb.h @galak
include: Move emul.h to drivers/emul.h Move emul.h out of the top level include/ dir into include/drivers/emul.h and deprecated the old location. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-24 15:12:30 +01:00
/include/drivers/emul.h @sjg20
CODEOWNERS: remove my assignments I won't be supporting Zephyr for the foreseeable future, so remove my association with specific subsystems. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2021-03-17 14:51:38 +01:00
/include/fs/ @nashif @nvlsianpu @de-nordic
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/include/init.h @nashif @andyross
/include/irq.h @dcpleung @nashif @andyross
/include/irq_offload.h @dcpleung @nashif @andyross
/include/kernel.h @dcpleung @nashif @andyross
/include/kernel_version.h @dcpleung @nashif @andyross
/include/linker/app_smem*.ld @dcpleung @nashif
/include/linker/ @dcpleung @nashif @andyross
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/logging/ @nordic-krch
CODEOWNERS: Add entry for LoRaWAN Add CODEOWNERS entry for LoRaWAN Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-03-04 17:54:40 +01:00
/include/lorawan/lorawan.h @Mani-Sadhasivam
CODEOWNERS, MAINTAINERS.yml: Update github username GitHub username @cbsiddharth was changed to @sidcha. Update CODEOWNERS and MAINTAINERS.yml entries. Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2021-05-08 23:57:34 +02:00
/include/mgmt/osdp.h @sidcha
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/include/net/ @rlubos @tbursztyka @pfalcon
/include/net/buf.h @jhedberg @tbursztyka @pfalcon @rlubos
/include/net/coap*.h @rlubos
/include/net/lwm2m*.h @rlubos
/include/net/mqtt.h @rlubos
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/include/posix/ @pfalcon
pm: reorganize headers - Move PM related APIs to `include/pm` so that it follows API `pm_` prefix namespace. In order to make transition easier `include/power/power.h` is kept pointing to `include/pm/pm.h`. - Move most of device PM related content from `include/device.h` to `include/pm/device.h` and `include/pm/runtime.h`. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-29 13:32:28 +02:00
/include/pm/pm.h @nashif @ceolin
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/include/drivers/ptp_clock.h @tbursztyka
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/include/shared_irq.h @dcpleung @nashif @andyross
CODEOWNERS: update due to nickname change Modified nickname from jarz-nordic to jakub-uC Signed-off-by: Jakub Rzeszutko <jakubr@uber.com>
2019-06-06 08:42:20 +02:00
/include/shell/ @jakub-uC @nordic-krch
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/include/sw_isr_table.h @dcpleung @nashif @andyross
/include/sys_clock.h @dcpleung @nashif @andyross
/include/sys/sys_io.h @dcpleung @nashif @andyross
/include/sys/kobject.h @dcpleung @nashif
/include/toolchain.h @dcpleung @andyross @nashif
/include/toolchain/ @dcpleung @nashif @andyross
/include/zephyr.h @dcpleung @nashif @andyross
/kernel/ @dcpleung @nashif @andyross
lib: smf: Add State Machine Framework Add an application agnostic State Machine Framework library to Zephyr that provides an easy way for developers to integrate state machines into their application. Twister passed: twister -T tests/lib/smf/ Signed-off-by: Sam Hurst <sbh1187@gmail.com>
2021-08-29 06:44:17 +02:00
/lib/smf/ @sambhurst
codeowners: add getopt library Add owner for newly created getopt library. Extend ownership of fnmatch library. Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2021-01-20 00:16:18 +01:00
/lib/util/ @carlescufi @jakub-uC
/lib/util/fnmatch/ @carlescufi @jakub-uC
/lib/util/getopt/ @jakub-uC
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/lib/gui/ @vanwinkeljan
lib: open-amp: add helper to add resource table in project The resource table is needed by the Linux kernel OS for a rpmsg generic support, but is also recognised by OpenAMP. This table allows to add trace based on the RAM console and to support rpmsg protocol. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-09-20 11:41:38 +02:00
/lib/open-amp/ @arnopo
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/lib/os/ @dcpleung @nashif @andyross
lib: cbprintf: add support for deferred formatting In applications like logging the call site where arguments to formatting are available may not be suitable for performing the formatting, e.g. when the output operation can sleep. Add API that supports capturing data that may be transient into a buffer that can be saved, and API that then produces the output later using the packaged arguments. [ Documentation and commit log from Peter Bigot. ] Signed-off-by: Nicolas Pitre <npitre@baylibre.com> Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-03-03 05:14:24 +01:00
/lib/os/cbprintf_packaged.c @npitre
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/lib/posix/ @pfalcon
codeowner: path updates path updates after moving directories. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-26 14:55:30 +01:00
/subsys/portability/ @nashif
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/lib/libc/ @nashif
CODEOWNERS: add owners for ARC MWDT libC layer Add condeowner for ARC MWDT libC layer files Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-08-26 16:55:50 +02:00
/lib/libc/arcmwdt/ @abrodkin @ruuddw @evgeniy-paltsev
modules: move module kconfig to main tree Due to in-tree dependencies on Kconfig options defined in modules we end up having warnings and errors when those modules are not part of the manifest. Users should be able to remove unwanted modules from their downstream manifest and still build any board configurations. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-23 23:19:41 +02:00
/modules/ @nashif
MAINTAINERS: include the CANopenNode module in the CAN bus group Include the CANopenNode module integration files in the CAN bus maintainers group and assign ownership to me. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-10-27 15:21:21 +02:00
/modules/canopennode/ @henrikbrixandersen
CODEOWNERS: Add myself and Flavio for Mbed TLS Add us as maintainers for the Mbed TLS module and associated files. Signed-off-by: David Brown <david.brown@linaro.org>
2021-10-19 17:35:20 +02:00
/modules/mbedtls/ @ceolin @d3zd3z
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 19:29:24 +02:00
/modules/hal_gigadevice/ @nandojve
module: moving TFM CMakeLists.txt into Zephyr repo This commit moves TFM CMakeLists.txt into Zephyr and relocates the Kconfig.tfm file under the modules/tfm folder. Updates the manifest to point to related TFM changes. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-12-18 21:33:40 +01:00
/modules/trusted-firmware-m/ @ioannisg @microbuilder
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/kernel/device.c @andyross @nashif
/kernel/idle.c @andyross @nashif
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 20:42:35 +02:00
/samples/ @nashif
samples: basic: Add a minimal sample Add a minimal sample that showcases minimal ROM sizes. It can be built in several configurations, all very restrictive when it comes to features enabled in order to verify the fact that we can fit in small devices and to be able to accurately measure the sizes of the kernel's basic features. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-05-09 19:48:17 +02:00
/samples/basic/minimal/ @carlescufi
samples: basic: servo_motor: Move dts overlays under boards Move the dts overlay under a boards/ dir to make it match conf files. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-31 19:02:50 +02:00
/samples/basic/servo_motor/boards/*microbit* @jhe
CODEOWNERS: Remove sjanc from samples/bluetooth/ Szymon was removed from all Bluetooth paths a while ago, and this is simply an overlooked leftover. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-11-27 16:50:21 +01:00
/samples/bluetooth/ @jhedberg @Vudentz @joerchan
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/samples/boards/intel_s1000_crb/ @sathishkuttan @dcpleung @nashif
CODEOWNERS: update file path for samples Adapt to new location of samples. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-09 14:27:20 +01:00
/samples/subsys/display/ @vanwinkeljan
samples: compression: lz4: lz4 sample application This PR add sample application for minimal lz4 library. lz4 library RFC requested here: #28535 Fixes: #26648 Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
2020-09-19 15:20:01 +02:00
/samples/compression/ @Navin-Sankar
samples: drivers: can: Rename directory for consistency This commit renames the CAN sample directory name from `CAN` to `can` to be consistent with others. Noting that the CAN driver test directory is named `tests/drivers/can`, we have no excuse for naming the CAN driver sample directory `samples/drivers/CAN`. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-29 05:17:00 +02:00
/samples/drivers/can/ @alexanderwachter
samples: drivers: clock control: add sample This adds a sample application for testing the LiteX clock control driver. Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-05-11 13:11:09 +02:00
/samples/drivers/clock_control_litex/ @mateusz-holenko @kgugala @pgielda
samples: display: Added generic display shield sample Added a generic display shield sample. Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-11-11 14:58:18 +01:00
/samples/drivers/display/ @vanwinkeljan
MAINTAINERS: include samples/drivers/eeprom under EEPROM area Include the samples/drivers/eeprom folder under the EEPROM maintainer area. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-06-18 13:32:57 +02:00
/samples/drivers/eeprom/ @henrikbrixandersen
samples: drivers: ht16k33: add sample application for the HT16K33 Add a sample application for showcasing the functionality of the Holtek HT16K33 LED driver with keyscan functionality. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-03-24 20:24:31 +01:00
/samples/drivers/ht16k33/ @henrikbrixandersen
CODEOWNERS: Add entry for LoRa support Add CODEOWNERS entry for LoRa API, drivers and samples. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-07-22 17:12:47 +02:00
/samples/drivers/lora/ @Mani-Sadhasivam
CODEOWNERS: update file path for samples Adapt to new location of samples. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-09 14:27:20 +01:00
/samples/subsys/lorawan/ @Mani-Sadhasivam
MAINTAINERS: include the CANopenNode module in the CAN bus group Include the CANopenNode module integration files in the CAN bus maintainers group and assign ownership to me. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-10-27 15:21:21 +02:00
/samples/modules/canopennode/ @henrikbrixandersen
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/samples/net/ @rlubos @tbursztyka @pfalcon
samples: net: cloud: Introduce TagoIO IoT cloud http post Introduce TagoIO IoT Cloud HTTP post client example. This explorer Zephyr network resources to demonstrate an end to end application. The TagoIO allows that any user can test on a easy way Ethernet, WIFI and Modem (PPP) with BSD sockets. The example provides overlays to configure WIFI and Modem. The application consists an a pseudo temperature sensor that sends periodically data to TagoIO IoT Cloud platform. The data can be visualized on a web browser dashboard, cellphone or tablet. The steps to configure TagoIO are described on the example documentation. Special Variables: - CONFIG_TAGOIO_DEVICE_TOKEN DEVID token generated by TagoIO - CONFIG_TAGOIO_HTTP_WIFI_SSID SSID when using WIFI - CONFIG_TAGOIO_HTTP_WIFI_PSK PASSWD when using WIFI - CONFIG_MODEM_GSM_UART_NAME UART label when using MODEM - CONFIG_MODEM_GSM_APN APN when using MODEM Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-06-19 19:34:49 +02:00
/samples/net/cloud/tagoio_http_post/ @nandojve
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/samples/net/dns_resolve/ @rlubos @tbursztyka @pfalcon
CODEOWNERS: Replace lwm2m and lwm2m_client owner Replace @mike-scott with @rlubos as a code owner for lwm2m library and sample. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-04-28 11:47:08 +02:00
/samples/net/lwm2m_client/ @rlubos
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/samples/net/mqtt_publisher/ @rlubos
CODEOWNERS: Update CoAP codeowner Set myself as the codeowner of the CoAP library. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-10-05 17:39:33 +02:00
/samples/net/sockets/coap_*/ @rlubos
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/samples/net/sockets/ @rlubos @tbursztyka @pfalcon
CODEOWNERS: civetweb update path Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-11-23 12:24:15 +01:00
/samples/net/*civetweb* @Nukersson
CODEOWNERS: Fix sensor samples There were two conflicting entries for sensor samples, which resulted in the wrong person getting assigned as a reviewer. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-11-15 17:28:43 +01:00
/samples/sensor/ @MaureenHelm
sample/shield: add support to x-nucleo-iks01a3 shield Provide two basic example samples to test the x-nucleo-iks01a3 shield: - Standard (Mode 1) - SensorHub (Mode 2) Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-01-28 17:29:39 +01:00
/samples/shields/ @avisconti
CODEOWNERS: update due to nickname change Modified nickname from jarz-nordic to jakub-uC Signed-off-by: Jakub Rzeszutko <jakubr@uber.com>
2019-06-06 08:42:20 +02:00
/samples/subsys/logging/ @nordic-krch @jakub-uC
/samples/subsys/shell/ @jakub-uC @nordic-krch
codeowners: extend smp_svr sample owner list Added myself as the owner. Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2020-04-17 13:00:32 +02:00
/samples/subsys/mgmt/mcumgr/smp_svr/ @aunsbjerg @nvlsianpu
samples: updatehub: Move from net to subsys:mgmt folder Zephyr introduced subsys/mgmt folder for MCU management. Move UpdateHub sample to its correspondent folder at sample/subsys/mgmt folder. Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
2020-08-02 22:41:36 +02:00
/samples/subsys/mgmt/updatehub/ @nandojve @otavio
CODEOWNERS, MAINTAINERS.yml: Update github username GitHub username @cbsiddharth was changed to @sidcha. Update CODEOWNERS and MAINTAINERS.yml entries. Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2021-05-08 23:57:34 +02:00
/samples/subsys/mgmt/osdp/ @sidcha
MAINTAINERS: Remove myself as a USB maintainer I have not had time to work with USB recently, so removing myself from MAINTAINERS and CODEOWNERS for the USB subsystem. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-03-08 13:40:06 +01:00
/samples/subsys/usb/ @jfischer-no
samples: pm: move to pm folder Adjust naming to make things more consistent. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-29 13:48:39 +02:00
/samples/subsys/pm/ @nashif @ceolin
CODEOWNERS: add code owners for the TF-M integration samples Adding code owners for the TF-M integration samples. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-10-14 16:53:25 +02:00
/samples/tfm_integration/ @ioannisg @microbuilder
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/samples/userspace/ @dcpleung @nashif
scripts: add script to extract top-ten bug-bashers This script allows us to programmatically query bug-bashers within a user-supplied time-window. For example, we held a "Bug Bash Week" August 1-7, 2021 (it was announced a week early though). The output of the script prints the "top ten" bug bashers in tab-separated columns in descending order. The first column is the number of bugs squashed and the second column is the github user id. Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-08-17 14:10:07 +02:00
/scripts/release/bug_bash.py @cfriedt
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/scripts/coccicheck @himanshujha199640 @JuliaLawall
/scripts/coccinelle/ @himanshujha199640 @JuliaLawall
debug/coredump: add a primitive coredump mechanism This adds a very primitive coredump mechanism under subsys/debug where during fatal error, register and memory content can be dumped to coredump backend. One such backend utilizing log module for output is included. Once the coredump log is converted to a binary file, it can be used with the ELF output file as inputs to an overly simplified implementation of a GDB server. This GDB server can be attached via the target remote command of GDB and will be serving register and memory content. This allows using GDB to examine stack and memory where the fatal error occurred. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-08-07 19:47:37 +02:00
/scripts/coredump/ @dcpleung
action: footprint tracking Add action and scripts for footprint tracking. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-06-06 23:03:08 +02:00
/scripts/footprint/ @nashif
guiconfig: Add a graphical configuration interface This is a graphical configuration interface written in Tkinter. Like menuconfig.py, it supports showing all symbols (with invisible symbols in red) and jumping directly to symbols. Symbol values can also be changed directly from the jump-to dialog. This interface should feel a lot smoother than menuconfig.py on Windows. When single-menu mode is enabled, a single menu is shown at a time, like in the terminal menuconfig. Only this mode distinguishes between symbols defined with 'config' and symbols defined with 'menuconfig'. Compatible with both Python 2 and Python 3. Has been tested on X11, Windows, and macOS. To avoid having to carry around a bunch of GIFs, the image data is embedded in guiconfig.py. To use separate GIF files instead, change _USE_EMBEDDED_IMAGES to False. The image files can be found in https://github.com/ulfalizer/Kconfiglib/tree/screenshots/guiconfig. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-05-06 14:23:47 +02:00
/scripts/kconfig/ @ulfalizer
logging: add support for dictionary based logging This adds dictionary based logging support. Dictionary based logging is binary based where one big difference is that static strings are stored as pointers instead of the whole string. This results in reduced space requirements for storing log messages in certain scenairos. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-04-02 21:54:53 +02:00
/scripts/logging/dictionary/ @dcpleung
CODEOWNERS: rename sanitycheck Also replace things in CODEOWNER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-07 17:48:41 +01:00
/scripts/pylib/twister/expr_parser.py @nashif
/scripts/schemas/twister/ @nashif
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/scripts/gen_app_partitions.py @dcpleung @nashif
CODEOWNERS: auto-assign reviews in MAINTAINERS.yml, get_maintainer.py Add an entry in CODEOWNERS for auto-assigning reviewers in MAINTAINERS.yml and get_maintainer.py files. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-17 10:55:21 +02:00
/scripts/get_maintainer.py @nashif
CODEOWNERS: Update for dts/scripts @ulfalizer hasn't been active for several months, remove him and add @mbolivar-nordic. We can add @ulfalizer back if he comes back to the project. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-09-02 17:52:36 +02:00
/scripts/dts/ @mbolivar-nordic @galak
scripts: add script for listing closed bugs Script to be used when creating a release. For regular releases this can be called this way: $ list_issues.py -f issues.md -s 2019-09-01 Will list all closed issues since september 1st, 2019 and will create a markdown file with all issues that can be added as is to the release notes. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-10-04 16:41:07 +02:00
/scripts/release/ @nashif
CODEOWNER: add owner for scripts/ci Add files under scripts/ci to CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-03-31 21:37:58 +02:00
/scripts/ci/ @nashif
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/arch/x86/gen_gdt.py @dcpleung @nashif
/arch/x86/gen_idt.py @dcpleung @nashif
/scripts/gen_kobject_list.py @dcpleung @nashif
kernel: generate placeholders for kobj tables before final build Due to the use of gperf to generate hash table for kobjects, the addresses of these kobjects cannot change during the last few phases of linking (especially between zephyr_prebuilt.elf and zephyr.elf). Because of this, the gperf generated data needs to be placed at the end of memory to avoid pushing symbols around in memory. This prevents moving these generated blocks to earlier sections, for example, pinned data section needed for demand paging. So create placeholders for use in intermediate linking to reserve space for these generated blocks. Due to uncertainty on the size of these blocks, more space is being reserved which could result in wasted space. Though, this retains the use of hash table for faster lookup. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-18 22:00:07 +01:00
/scripts/gen_kobject_placeholders.py @dcpleung
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/scripts/gen_syscalls.py @dcpleung @nashif
scripts: add list_boards.py This script is essentially a Python rewrite of the CMake code we're using to print boards in cmake/boards.cmake, plus some extra features. Having this in Python will simplify some later adjustments to our 'usage' build system target in ways that will make its output easier to read, while simultaneously making 'west boards' more useful. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-12-09 21:03:19 +01:00
/scripts/list_boards.py @mbolivar-nordic
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/scripts/process_gperf.py @dcpleung @nashif
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 15:25:23 +01:00
/scripts/gen_relocate_app.py @dcpleung
CODEOWNERS: Fix github username change Change @mbolivar to @mbolivar-nordic. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-09-02 17:49:30 +02:00
/scripts/requirements*.txt @mbolivar-nordic @galak @nashif
CODEOWNERS: rename sanitycheck Also replace things in CODEOWNER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-07 17:48:41 +01:00
/scripts/tests/twister/ @aasthagr
scripts: tests: Add tests for subfolder_list.py This commit implements tests of subfolder_list.py Signed-off-by: Ruslan Mstoi <ruslan.mstoi@intel.com>
2020-07-01 16:38:46 +02:00
/scripts/tests/build/test_subfolder_list.py @rmstoi
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 15:25:23 +01:00
/scripts/tracing/ @nashif
CODEOWNERS: rename sanitycheck Also replace things in CODEOWNER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-07 17:48:41 +01:00
/scripts/pylib/twister/ @nashif
/scripts/twister @nashif
scripts: Add hook calllable series-push-hook script Running checkpatch in pre-commit hook could be a constraint for day to day work. Though, running it before pushing to zephyr repo is highly recommended. Add a series push script callable from pre-push hook. Document how to use it in contribute section. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-08 11:39:59 +01:00
/scripts/series-push-hook.sh @erwango
CODEOWNERS: handle an account change s/mbolivar/mbolivar-nordic/ Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-17 16:40:58 +01:00
/scripts/west_commands/ @mbolivar-nordic
/scripts/west-commands.yml @mbolivar-nordic
cmake: Extracted Zephyr module processing into python script Fixes: #14513 This commit move the functionality of extracting zephyr modules into generated CMake and Kconfig include files from CMake into python. This allows other tools, especially CI to re-use the zephyr module functionality. Signed-off-by: Torsten Rasmussen <torsten.rasmussen@nordicsemi.no>
2019-03-19 10:38:18 +01:00
/scripts/zephyr_module.py @tejlmand
cmake: Add UF2 as an additional build output option. Add ability to build a UF2 (https://github.com/Microsoft/uf2) image as an additional output type. This leverages the code partition offset for the UF2 base address, and a configurable UF2 family ID. Includes an unmodified (except for headers for licensing, pylit disabling) version of the uf2conv.py script copied the UF2 format specification repository, used to convert the bin to UF2. Origin: UF2 file format specification reference utilies License: MIT URL: https://github.com/microsoft/uf2/blob/master/utils/uf2conv.py commit: 587abb8b909266e9b468d6284f2fbd425235d1b5 Signed-off-by: Pete Johanson <peter@peterjohanson.com>
2020-12-31 22:51:52 +01:00
/scripts/uf2conv.py @petejohanson
posix arch: build on aarch64 / allow host-specific cmake includes This change enables specific compiler and linker options to be used in the case that an arch/posix/os.arch.cmake file exists. Note: os and arch in the above case are evaluations of CMAKE_HOST_SYSTEM_NAME and CMAKE_HOST_SYSTEM_PROCESSOR. Otherwise, the existing "generic" compiler and linker flags in arch/posix/CMakeLists.txt are used. Additional flags and checks are provided in arch/posix/Linux.aarch64.cmake. Added scripts/user_wordsize.py to detect if userspace is 64-bit or 32-bit, which should be consistent with the value of CONFIG_64BIT for Aarch64 on Linux. Fixes #24842 Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-05-08 20:52:24 +02:00
/scripts/user_wordsize.py @cfriedt
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/scripts/valgrind.supp @aescolar @daor-oti
cmake: adding ZephyrConfig.cmake to allow an easy way to locate Zephyr Adding ZephyrConfig.cmake and ZephyrConfigVersion.cmake allows projects to use find_package to locate Zephyr. This means that it will be possible to allow users to run CMake without the need to source zephyr-env.sh or run zephyr-env.cmd. This is especially useful for IDEs such as Eclipse or SES, where it will no longer be required to source the above files before launching the IDE. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-02-12 14:55:36 +01:00
/share/zephyr-package/ @tejlmand
cmake: Relocating Zephyr Unittest CMake package. Fixes: #23872 Relocating Zephyr Unittest CMake package to ensure that HINTS ${ZEPHYR_BASE} in find_package(ZephyrUnittest HINTS ${ZEPHYR_BASE}) works correctly when the package has not been exported to CMake user package registry. This ensure that the new package functionality is fully backwards compatible on systems where the package is not exported and ZEPHYR_BASE is set. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-03-27 21:31:36 +01:00
/share/zephyrunittest-package/ @tejlmand
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/subsys/bluetooth/ @joerchan @jhedberg @Vudentz
Bluetooth: Audio: Add maintainers/codeowners Add Thalley (emil.gydesen@nordicsemi.no) and asbjornsabo (asbjorn.sabo@nordicsemi.no) as additional maintainers/codeowners for bluetooth audio. (Also adds empty audio.h file, that will later be expanded, so that the include/bluetooth/audio directory now listed in CODEOWNERS actually exists.) Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
2021-03-04 16:17:11 +01:00
/subsys/bluetooth/audio/ @joerchan @jhedberg @Vudentz @Thalley @asbjornsabo
CODEOWNERS: add Andries to bluetooth/controller Added myself as codeowner to the bluetooth/controller project Signed-off-by: Andries Kruithof <Andries.Kruithof@nordicsemi.no>
2020-10-02 12:51:04 +02:00
/subsys/bluetooth/controller/ @carlescufi @cvinayak @thoh-ot @kruithofa
CODEOWNERS: Add dedicated entry for Bluetooth Mesh Add a dedicated entry for Bluetooth Mesh, and include Trond from Nordic as an owner, since he will be actively participating in maintaining & developing the code. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-08-15 08:11:26 +02:00
/subsys/bluetooth/mesh/ @jhedberg @trond-snekvik @joerchan @Vudentz
canbus: canopen: add zephyr driver layer for CANopenNode Add a Zephyr driver and abstraction layer for use by the 3rd party CANopenNode module. CANopenNode depends on the CO_driver.h file for platform-specific type definitions, locking primitives, and CAN bus driver API. This fixes #15278. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-09-22 20:24:57 +02:00
/subsys/canbus/ @alexanderwachter
CODEOWNERS: remove my assignments I won't be supporting Zephyr for the foreseeable future, so remove my association with specific subsystems. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2021-03-17 14:51:38 +01:00
/subsys/cpp/ @vanwinkeljan
CODEOWNERS: address some unowned files/dirs Add owners for some architecture, soc and subsystem code. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-07 14:31:51 +02:00
/subsys/debug/ @nashif
debug/coredump: add a primitive coredump mechanism This adds a very primitive coredump mechanism under subsys/debug where during fatal error, register and memory content can be dumped to coredump backend. One such backend utilizing log module for output is included. Once the coredump log is converted to a binary file, it can be used with the ELF output file as inputs to an overly simplified implementation of a GDB server. This GDB server can be attached via the target remote command of GDB and will be serving register and memory content. This allows using GDB to examine stack and memory where the fatal error occurred. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-08-07 19:47:37 +02:00
/subsys/debug/coredump/ @dcpleung
codeowners: Add myself to gdbstub Add myself as code owner for gdbstub. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-16 18:38:09 +02:00
/subsys/debug/gdbstub/ @ceolin
/subsys/debug/gdbstub.c @ceolin
codeowners: add subsys/dfu codeowner Added dfu support subsystem codeowner Before this subystem was orphaned. Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2020-03-04 15:39:58 +01:00
/subsys/dfu/ @nvlsianpu
CODEOWNERS: add myself as disk subsystem code-owner Add myself as disk subsystem code-owner Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-02-25 10:09:30 +01:00
/subsys/disk/ @jfischer-no
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 15:25:23 +01:00
/subsys/tracing/ @nashif
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/subsys/debug/asan_hacks.c @vanwinkeljan @aescolar @daor-oti
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/subsys/demand_paging/ @dcpleung @nashif
emul: Create an emulation implementation Create a header file and implementation for emulators. Set up a linker list so that emulators can be found and initialised at start-up. Emulators are used to emulate hardware devices, to support testing of various subsystems. For example, it is possible to write an emulator for an I2C compass such that it appears on the I2C bus and can be used just like a real hardware device. Emulators often implement special features for testing. For example a compass may support returning bogus data if the I2C bus speed is too high, or may return invalid measurements if calibration has not yet been completed. This allows for testing that high-level code can handle these situations correctly. Test coverage can therefore approach 100% if all failure conditions are emulated. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no> Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-20 16:07:29 +02:00
/subsys/emul/ @sjg20
codeowners: update due to Github user name change Update CODEOWNERS and MAINTAINERS due to Github user name change. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2020-11-16 00:04:08 +01:00
/subsys/fb/ @jfischer-no
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/subsys/fs/ @nashif
CODEOWNERS: Add missing trailing / on some directories Gets rid of some warnings from check_compliance.py: Wrong syntax: /home/ulf/z/subsys/fs/fcb Wrong syntax: /home/ulf/z/subsys/fs/nvs Wrong syntax: /home/ulf/z/subsys/storage Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-02-24 20:29:12 +01:00
/subsys/fs/fcb/ @nvlsianpu
native_posix: Added support to access flash via FUSE Added support to access flash device partitions from host through FUSE. Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-01-14 20:49:31 +01:00
/subsys/fs/fuse_fs_access.c @vanwinkeljan
CODEOWNERS: Add missing trailing / on some directories Gets rid of some warnings from check_compliance.py: Wrong syntax: /home/ulf/z/subsys/fs/fcb Wrong syntax: /home/ulf/z/subsys/fs/nvs Wrong syntax: /home/ulf/z/subsys/storage Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-02-24 20:29:12 +01:00
/subsys/fs/nvs/ @Laczen
ipc: RPMsg service to register multiple endpoints This patch implements a service that adds multiendpoint capabilities to RPMsg. Multiple endpoints are intended to be used when multiple modules need services from a remote processor. Each module may register one or more RPMsg endpoints. The implementation separates backend from the service, what allows to extend this module to support other topologies like Linux <-> Zephyr. Co-authored-by: Piotr Szkotak <piotr.szkotak@nordicsemi.no> Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
2021-01-18 12:19:49 +01:00
/subsys/ipc/ @ioannisg
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/subsys/logging/ @nordic-krch
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/subsys/logging/log_backend_net.c @nordic-krch @rlubos
CODEOWNERS: Add entry for LoRaWAN Add CODEOWNERS entry for LoRaWAN Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-03-04 17:54:40 +01:00
/subsys/lorawan/ @Mani-Sadhasivam
ec_host_cmd: add ec host command handler framework Add a generic host command handler framework that allows users to declare new host command handlers with the HOST_COMMAND_HANDLER macro at build time. The framework will handle incoming messages from the host command peripheral device and forwards the incoming data to the appropriate host command handler, which is looked up by id. The framework will also send the response from the handler back to the host command peripheral device. The device handles sending the data on the physical bus. This type of host command communication is typically done on an embedded controller for a notebook or computer. The host would be the main application processor (aka AP, CPU, SoC). Signed-off-by: Jett Rink <jettrink@google.com>
2020-08-31 23:53:42 +02:00
/subsys/mgmt/ec_host_cmd/ @jettr
mgmt: Move mcumgr into its own folder In order to be able to add more entries under 'subsys/mgmt', move the current contents of it, which relate exclusively to MCUMgr, to its own folder. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2020-07-30 18:01:18 +02:00
/subsys/mgmt/mcumgr/ @carlescufi @nvlsianpu
mgmt: hawkbit: Add Hawkbit FOTA Support Add Hawkbit FOTA support Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
2020-07-24 19:24:49 +02:00
/subsys/mgmt/hawkbit/ @Navin-Sankar
mgmt: Move mcumgr into its own folder In order to be able to add more entries under 'subsys/mgmt', move the current contents of it, which relate exclusively to MCUMgr, to its own folder. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2020-07-30 18:01:18 +02:00
/subsys/mgmt/mcumgr/smp_udp.c @aunsbjerg
updatehub: Move from lib to subsys:mgmt folder Zephyr introduced subsys/mgmt folder for MCU management. Move UpdateHub to this newly and dedicated space. Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
2020-07-31 00:58:32 +02:00
/subsys/mgmt/updatehub/ @nandojve @otavio
CODEOWNERS, MAINTAINERS.yml: Update github username GitHub username @cbsiddharth was changed to @sidcha. Update CODEOWNERS and MAINTAINERS.yml entries. Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2021-05-08 23:57:34 +02:00
/subsys/mgmt/osdp/ @sidcha
CODEOWNERS: add codeowner for modbus Add myself as codeowner for modbus subsys. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-03-15 15:31:07 +01:00
/subsys/modbus/ @jfischer-no
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/subsys/net/buf.c @jhedberg @tbursztyka @pfalcon @rlubos
/subsys/net/ip/ @rlubos @tbursztyka @pfalcon
/subsys/net/lib/ @rlubos @tbursztyka @pfalcon
/subsys/net/lib/dns/ @rlubos @tbursztyka @pfalcon @cfriedt
CODEOWNERS: Replace lwm2m and lwm2m_client owner Replace @mike-scott with @rlubos as a code owner for lwm2m library and sample. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-04-28 11:47:08 +02:00
/subsys/net/lib/lwm2m/ @rlubos
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/subsys/net/lib/config/ @rlubos @tbursztyka @pfalcon
/subsys/net/lib/mqtt/ @rlubos
CODEOWNERS: Update CoAP codeowner Set myself as the codeowner of the CoAP library. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-10-05 17:39:33 +02:00
/subsys/net/lib/coap/ @rlubos
net: socket: syscall for socketpair(2) Working: * non-blocking reads / writes * blocking reads / writes * send(2) / recv(2) / sendto(2) / recvfrom(2) / sendmsg(2) * select(2) * poll(2) Fixes #24366 Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-05-09 05:04:23 +02:00
/subsys/net/lib/sockets/socketpair.c @cfriedt
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/subsys/net/lib/sockets/ @rlubos @tbursztyka @pfalcon
CODEOWNERS: Update networking files Some networking related files were missing owner. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-04-24 16:53:49 +02:00
/subsys/net/lib/tls_credentials/ @rlubos
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/subsys/net/l2/ @rlubos @tbursztyka
/subsys/net/l2/canbus/ @alexanderwachter
CODEOWNERS: Cover all OpenThread directories in net Current entry covered only /subsys/net/lib/openthread and not /subsys/net/l2/openthread. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-05-05 12:43:34 +02:00
/subsys/net/*/openthread/ @rlubos
pm: move power subsystem to pm Adjust naming to make things consistent. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-29 13:45:57 +02:00
/subsys/pm/ @nashif @ceolin
subsys/random: Add cryptographically secure and bulk fill functions 1) Add cryptographically secure random functions to provide FIPS 140-2 compliant random functions. 2) Add name to random function choice selectors to ease selection in SOC .defconfig files 3) Add bulk fill random functions. Signed-off-by: David Leach <david.leach@nxp.com>
2019-07-23 21:16:24 +02:00
/subsys/random/ @dleach02
CODEOWNERS: Add owners for storage-related subsystems Storage was not properly covered in terms of maintainership, add maintainers for the corresponding subystems. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-02-20 13:20:43 +01:00
/subsys/settings/ @nvlsianpu
CODEOWNERS: update due to nickname change Modified nickname from jarz-nordic to jakub-uC Signed-off-by: Jakub Rzeszutko <jakubr@uber.com>
2019-06-06 08:42:20 +02:00
/subsys/shell/ @jakub-uC @nordic-krch
Kconfig: cleanup subsystems Sort entries alphabetically and cleanup top level menu for each subsystem. Move stats subsystem Kconfig from debug into its own Kconfig. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-22 19:07:14 +02:00
/subsys/stats/ @nvlsianpu
CODEOWNERS: Add missing trailing / on some directories Gets rid of some warnings from check_compliance.py: Wrong syntax: /home/ulf/z/subsys/fs/fcb Wrong syntax: /home/ulf/z/subsys/fs/nvs Wrong syntax: /home/ulf/z/subsys/storage Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-02-24 20:29:12 +01:00
/subsys/storage/ @nvlsianpu
task_wdt: add task-level watchdog subsystem This new subsystem can be used to supervise individual threads. It is based on a regularly updated kernel timer, whose ISR is never actually called in regular system operation. An existing hardware watchdog can be used as an optional fallback if the task watchdog itself gets stuck. Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-18 16:23:17 +01:00
/subsys/task_wdt/ @martinjaeger
CODEOWNERS: address some unowned files/dirs Add owners for some architecture, soc and subsystem code. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-07 14:31:51 +02:00
/subsys/testsuite/ @nashif
timing: introduce timing functions as a generic feature Add timing functions and APIs. This is now used with some of the tests we have for performance and metrics and will be used whereever timing informations are needed, for example for tracing, profiling and other operations where timing info is critical. Signed-off-by: Daniel Leung <daniel.leung@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-05 21:57:00 +02:00
/subsys/timing/ @nashif @dcpleung
MAINTAINERS: Remove myself as a USB maintainer I have not had time to work with USB recently, so removing myself from MAINTAINERS and CODEOWNERS for the USB subsystem. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-03-08 13:40:06 +01:00
/subsys/usb/ @jfischer-no
CODEOWNERS: Update path to usb_dfu.c This is a follow-up to commit 1c89837e7957e1f94a9bc2af74cef727d9cf0775. Update the path to dfu_usb.c after the file was moved, to prevent compliance checks from failing because of non-existing file listed in CODEOWNERS. Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-12-21 09:45:47 +01:00
/subsys/usb/class/dfu/usb_dfu.c @nvlsianpu
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 20:42:35 +02:00
/tests/ @nashif
CODEOWNERS: Auto-assign @stephanosio in tests/arch/arm suite reviews Add @stephanosio as a code-owner for the tests/arch/arm test suites, so they get auto-assigned in reviews. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-03-19 10:39:19 +01:00
/tests/arch/arm/ @ioannisg @stephanosio
CODEOWNERS: Add CMSIS-DSP test code owner This commit adds @stephanosio as a code owner for the CMSIS-DSP tests. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-24 07:39:02 +02:00
/tests/benchmarks/cmsis_dsp/ @stephanosio
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/tests/boards/native_posix/ @aescolar @daor-oti
CODEOWNERS: update code owners Replace owners who are not working on Zephyr anymore. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-23 15:43:31 +02:00
/tests/boards/intel_s1000_crb/ @dcpleung @sathishkuttan
CODEOWNERS: Add joerchan and remove sjanc for Bluetooth host paths Szymon is no longer actively looking at Bluetooth code, whereas Joakim from Nordic has been assigned for Bluetooth host support. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-05-07 09:26:21 +02:00
/tests/bluetooth/ @joerchan @jhedberg @Vudentz
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/tests/bluetooth/bsim_bt/ @joerchan @jhedberg @Vudentz @aescolar @wopu-ot
CODEOWNERS: Add @Thalley and @asbjornsabo to bsim audio test Adds @Thalley and @asbjornsabo (and the others from the parent directory) to the babblesim audio test directory. Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2021-06-15 12:57:53 +02:00
/tests/bluetooth/bsim_bt/bsim_test_audio/ @joerchan @jhedberg @Vudentz @aescolar @wopu-ot @Thalley @asbjornsabo
codeowners: Add sjanc to Bluetooth tester app This is used by autoPTS project so make sure Szymon is aware of all changes in tester application. Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2021-10-14 12:06:08 +02:00
/tests/bluetooth/tester/ @joerchan @jhedberg @Vudentz @sjanc
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/tests/posix/ @pfalcon
/tests/crypto/ @ceolin
CODEOWNERS: Add myself and Flavio for Mbed TLS Add us as maintainers for the Mbed TLS module and associated files. Signed-off-by: David Brown <david.brown@linaro.org>
2021-10-19 17:35:20 +02:00
/tests/crypto/mbedtls/ @nashif @ceolin @d3zd3z
CODEOWNERS: CAN ownership Add @alexanderwachter as CAN maintainer Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-25 17:15:06 +01:00
/tests/drivers/can/ @alexanderwachter
CODEOWNERS: Adding codeowner for tests/drivers/counter Added @nordic-krch as the codeowner. Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2019-04-24 07:27:46 +02:00
/tests/drivers/counter/ @nordic-krch
CODEOWNERS: add additional code owner for EEPROM tests Add myself as code owner for the EEPROM test suites. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-09-02 12:53:40 +02:00
/tests/drivers/eeprom/ @henrikbrixandersen @sjg20
tests: drivers: add flash_simulator driver This commit adds a tests for flash simulator driver implementation for qemu_x86 boards. Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no> Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
2019-04-18 14:55:38 +02:00
/tests/drivers/flash_simulator/ @nvlsianpu
CODEOWNERS: remove my assignments I won't be supporting Zephyr for the foreseeable future, so remove my association with specific subsystems. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2021-03-17 14:51:38 +01:00
/tests/drivers/gpio/ @mnkp
CODEOWNERS: Add hwinfo ownership Add @alexanderwachter as hwinfo maintainer. Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-25 17:22:06 +01:00
/tests/drivers/hwinfo/ @alexanderwachter
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 22:02:05 +01:00
/tests/drivers/spi/ @tbursztyka
tests: uart: Add nrf9160_pca10090 to UART async test Add nrf9160_pca10090 to UART async test. Add myself as codeowner to uart_async_api tests. Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2019-02-20 09:59:48 +01:00
/tests/drivers/uart/uart_async_api/ @Mierunski
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/tests/kernel/ @dcpleung @andyross @nashif
codeowner: add codeowners for /test/lib Add codeowners for /test/lib Signed-off-by: Benoit Leforestier <benoit.leforestier@gmail.com>
2019-04-26 17:45:01 +02:00
/tests/lib/ @nashif
CODEOWNERS: Add CMSIS-DSP test code owner This commit adds @stephanosio as a code owner for the CMSIS-DSP tests. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-24 07:39:02 +02:00
/tests/lib/cmsis_dsp/ @stephanosio
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/tests/net/ @rlubos @tbursztyka @pfalcon
/tests/net/buf/ @jhedberg @tbursztyka @pfalcon
/tests/net/lib/ @rlubos @tbursztyka @pfalcon
/tests/net/lib/http_header_fields/ @rlubos @tbursztyka
/tests/net/lib/mqtt_packet/ @rlubos
CODEOWNERS: Update CoAP codeowner Set myself as the codeowner of the CoAP library. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-10-05 17:39:33 +02:00
/tests/net/lib/coap/ @rlubos
tests: socket: socketpair: tests for socketpair(2) syscall Tests for issue #24366 Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-05-09 05:06:16 +02:00
/tests/net/socket/socketpair/ @cfriedt
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 17:18:40 +02:00
/tests/net/socket/ @rlubos @tbursztyka @pfalcon
tests: add a test for coredump This adds a simple test for coredump. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-08-07 19:45:20 +02:00
/tests/subsys/debug/coredump/ @dcpleung
CODEOWNERS: remove my assignments I won't be supporting Zephyr for the foreseeable future, so remove my association with specific subsystems. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2021-03-17 14:51:38 +01:00
/tests/subsys/fs/ @nashif @nvlsianpu @de-nordic
CODEOWNERS: Add owners for tests of settings subsystems The settings tests was not properly covered in terms of maintainership, add maintainers for the corresponding subystems. Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-03-04 10:51:08 +01:00
/tests/subsys/settings/ @nvlsianpu
CODEOWNERS: update due to nickname change Modified nickname from jarz-nordic to jakub-uC Signed-off-by: Jakub Rzeszutko <jakubr@uber.com>
2019-06-06 08:42:20 +02:00
/tests/subsys/shell/ @jakub-uC @nordic-krch
doc: CODEOWNERS for .rst files Move *.rst to end of the list to ensure all .rst files get reviewed by our tech writer (last match takes precedence). Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-22 17:41:52 +02:00
# Get all docs reviewed
CODEOWNERS: add @nashif for docs Add @nashif as codeowner for docs temporarily until we have a dedicated owner. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-30 04:57:08 +01:00
*.rst @nashif
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 13:32:45 +01:00
/doc/reference/kernel/ @andyross @nashif
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
*posix*.rst @aescolar @daor-oti
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